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      1 /*
      2  * Copyright 2017 Advanced Micro Devices, Inc.
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the "Software"),
      6  * to deal in the Software without restriction, including without limitation
      7  * on the rights to use, copy, modify, merge, publish, distribute, sub
      8  * license, and/or sell copies of the Software, and to permit persons to whom
      9  * the Software is furnished to do so, subject to the following conditions:
     10  *
     11  * The above copyright notice and this permission notice (including the next
     12  * paragraph) shall be included in all copies or substantial portions of the
     13  * Software.
     14  *
     15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
     18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
     19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
     20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
     21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
     22  */
     23 
     24 #ifndef AC_SHADER_ABI_H
     25 #define AC_SHADER_ABI_H
     26 
     27 #include <llvm-c/Core.h>
     28 
     29 struct nir_variable;
     30 
     31 enum ac_descriptor_type {
     32 	AC_DESC_IMAGE,
     33 	AC_DESC_FMASK,
     34 	AC_DESC_SAMPLER,
     35 	AC_DESC_BUFFER,
     36 };
     37 
     38 /* Document the shader ABI during compilation. This is what allows radeonsi and
     39  * radv to share a compiler backend.
     40  */
     41 struct ac_shader_abi {
     42 	LLVMValueRef base_vertex;
     43 	LLVMValueRef start_instance;
     44 	LLVMValueRef draw_id;
     45 	LLVMValueRef vertex_id;
     46 	LLVMValueRef instance_id;
     47 	LLVMValueRef tcs_patch_id;
     48 	LLVMValueRef tcs_rel_ids;
     49 	LLVMValueRef tes_patch_id;
     50 	LLVMValueRef gs_prim_id;
     51 	LLVMValueRef gs_invocation_id;
     52 	LLVMValueRef frag_pos[4];
     53 	LLVMValueRef front_face;
     54 	LLVMValueRef ancillary;
     55 	LLVMValueRef sample_coverage;
     56 
     57 	/* For VS and PS: pre-loaded shader inputs.
     58 	 *
     59 	 * Currently only used for NIR shaders; indexed by variables'
     60 	 * driver_location.
     61 	 */
     62 	LLVMValueRef *inputs;
     63 
     64 	void (*emit_outputs)(struct ac_shader_abi *abi,
     65 			     unsigned max_outputs,
     66 			     LLVMValueRef *addrs);
     67 
     68 	void (*emit_vertex)(struct ac_shader_abi *abi,
     69 			    unsigned stream,
     70 			    LLVMValueRef *addrs);
     71 
     72 	void (*emit_primitive)(struct ac_shader_abi *abi,
     73 			       unsigned stream);
     74 
     75 	LLVMValueRef (*load_inputs)(struct ac_shader_abi *abi,
     76 				    unsigned location,
     77 				    unsigned driver_location,
     78 				    unsigned component,
     79 				    unsigned num_components,
     80 				    unsigned vertex_index,
     81 				    unsigned const_index,
     82 				    LLVMTypeRef type);
     83 
     84 	LLVMValueRef (*load_tess_varyings)(struct ac_shader_abi *abi,
     85 					   LLVMValueRef vertex_index,
     86 					   LLVMValueRef param_index,
     87 					   unsigned const_index,
     88 					   unsigned location,
     89 					   unsigned driver_location,
     90 					   unsigned component,
     91 					   unsigned num_components,
     92 					   bool is_patch,
     93 					   bool is_compact,
     94 					   bool load_inputs);
     95 
     96 	void (*store_tcs_outputs)(struct ac_shader_abi *abi,
     97 				  const struct nir_variable *var,
     98 				  LLVMValueRef vertex_index,
     99 				  LLVMValueRef param_index,
    100 				  unsigned const_index,
    101 				  LLVMValueRef src,
    102 				  unsigned writemask);
    103 
    104 	LLVMValueRef (*load_tess_coord)(struct ac_shader_abi *abi,
    105 					LLVMTypeRef type,
    106 					unsigned num_components);
    107 
    108 	LLVMValueRef (*load_patch_vertices_in)(struct ac_shader_abi *abi);
    109 
    110 	LLVMValueRef (*load_tess_level)(struct ac_shader_abi *abi,
    111 					unsigned varying_id);
    112 
    113 
    114 	LLVMValueRef (*load_ubo)(struct ac_shader_abi *abi, LLVMValueRef index);
    115 
    116 	/**
    117 	 * Load the descriptor for the given buffer.
    118 	 *
    119 	 * \param buffer the buffer as presented in NIR: this is the descriptor
    120 	 *               in Vulkan, and the buffer index in OpenGL/Gallium
    121 	 * \param write whether buffer contents will be written
    122 	 */
    123 	LLVMValueRef (*load_ssbo)(struct ac_shader_abi *abi,
    124 				  LLVMValueRef buffer, bool write);
    125 
    126 	/**
    127 	 * Load a descriptor associated to a sampler.
    128 	 *
    129 	 * \param descriptor_set the descriptor set index (only for Vulkan)
    130 	 * \param base_index the base index of the sampler variable
    131 	 * \param constant_index constant part of an array index (or 0, if the
    132 	 *                       sampler variable is not an array)
    133 	 * \param index non-constant part of an array index (may be NULL)
    134 	 * \param desc_type the type of descriptor to load
    135 	 * \param image whether the descriptor is loaded for an image operation
    136 	 */
    137 	LLVMValueRef (*load_sampler_desc)(struct ac_shader_abi *abi,
    138 					  unsigned descriptor_set,
    139 					  unsigned base_index,
    140 					  unsigned constant_index,
    141 					  LLVMValueRef index,
    142 					  enum ac_descriptor_type desc_type,
    143 					  bool image, bool write);
    144 
    145 	/* Whether to clamp the shadow reference value to [0,1]on VI. Radeonsi currently
    146 	 * uses it due to promoting D16 to D32, but radv needs it off. */
    147 	bool clamp_shadow_reference;
    148 
    149 	/* Whether to workaround GFX9 ignoring the stride for the buffer size if IDXEN=0
    150 	* and LLVM optimizes an indexed load with constant index to IDXEN=0. */
    151 	bool gfx9_stride_size_workaround;
    152 };
    153 
    154 #endif /* AC_SHADER_ABI_H */
    155