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      1 /*
      2  * Copyright (C) 2013 - ARM Ltd
      3  * Author: Marc Zyngier <marc.zyngier (at) arm.com>
      4  *
      5  * This program is free software; you can redistribute it and/or modify
      6  * it under the terms of the GNU General Public License version 2 as
      7  * published by the Free Software Foundation.
      8  *
      9  * This program is distributed in the hope that it will be useful,
     10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
     11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     12  * GNU General Public License for more details.
     13  *
     14  * You should have received a copy of the GNU General Public License
     15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
     16  */
     17 
     18 #ifndef __ARM_PSCI_H__
     19 #define __ARM_PSCI_H__
     20 
     21 #define ARM_PSCI_VER_1_0		(0x00010000)
     22 #define ARM_PSCI_VER_0_2		(0x00000002)
     23 
     24 /* PSCI 0.1 interface */
     25 #define ARM_PSCI_FN_BASE		0x95c1ba5e
     26 #define ARM_PSCI_FN(n)			(ARM_PSCI_FN_BASE + (n))
     27 
     28 #define ARM_PSCI_FN_CPU_SUSPEND		ARM_PSCI_FN(0)
     29 #define ARM_PSCI_FN_CPU_OFF		ARM_PSCI_FN(1)
     30 #define ARM_PSCI_FN_CPU_ON		ARM_PSCI_FN(2)
     31 #define ARM_PSCI_FN_MIGRATE		ARM_PSCI_FN(3)
     32 
     33 #define ARM_PSCI_RET_SUCCESS		0
     34 #define ARM_PSCI_RET_NI			(-1)
     35 #define ARM_PSCI_RET_INVAL		(-2)
     36 #define ARM_PSCI_RET_DENIED		(-3)
     37 #define ARM_PSCI_RET_ALREADY_ON		(-4)
     38 #define ARM_PSCI_RET_ON_PENDING		(-5)
     39 #define ARM_PSCI_RET_INTERNAL_FAILURE	(-6)
     40 #define ARM_PSCI_RET_NOT_PRESENT	(-7)
     41 #define ARM_PSCI_RET_DISABLED		(-8)
     42 #define ARM_PSCI_RET_INVALID_ADDRESS	(-9)
     43 
     44 /* PSCI 0.2 interface */
     45 #define ARM_PSCI_0_2_FN_BASE			0x84000000
     46 #define ARM_PSCI_0_2_FN(n)			(ARM_PSCI_0_2_FN_BASE + (n))
     47 
     48 #define ARM_PSCI_0_2_FN64_BASE			0xC4000000
     49 #define ARM_PSCI_0_2_FN64(n)			(ARM_PSCI_0_2_FN64_BASE + (n))
     50 
     51 #define ARM_PSCI_0_2_FN_PSCI_VERSION		ARM_PSCI_0_2_FN(0)
     52 #define ARM_PSCI_0_2_FN_CPU_SUSPEND		ARM_PSCI_0_2_FN(1)
     53 #define ARM_PSCI_0_2_FN_CPU_OFF			ARM_PSCI_0_2_FN(2)
     54 #define ARM_PSCI_0_2_FN_CPU_ON			ARM_PSCI_0_2_FN(3)
     55 #define ARM_PSCI_0_2_FN_AFFINITY_INFO		ARM_PSCI_0_2_FN(4)
     56 #define ARM_PSCI_0_2_FN_MIGRATE			ARM_PSCI_0_2_FN(5)
     57 #define ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE	ARM_PSCI_0_2_FN(6)
     58 #define ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU	ARM_PSCI_0_2_FN(7)
     59 #define ARM_PSCI_0_2_FN_SYSTEM_OFF		ARM_PSCI_0_2_FN(8)
     60 #define ARM_PSCI_0_2_FN_SYSTEM_RESET		ARM_PSCI_0_2_FN(9)
     61 
     62 #define ARM_PSCI_0_2_FN64_CPU_SUSPEND		ARM_PSCI_0_2_FN64(1)
     63 #define ARM_PSCI_0_2_FN64_CPU_ON		ARM_PSCI_0_2_FN64(3)
     64 #define ARM_PSCI_0_2_FN64_AFFINITY_INFO		ARM_PSCI_0_2_FN64(4)
     65 #define ARM_PSCI_0_2_FN64_MIGRATE		ARM_PSCI_0_2_FN64(5)
     66 #define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU	ARM_PSCI_0_2_FN64(7)
     67 
     68 /* PSCI 1.0 interface */
     69 #define ARM_PSCI_1_0_FN_PSCI_FEATURES		ARM_PSCI_0_2_FN(10)
     70 #define ARM_PSCI_1_0_FN_CPU_FREEZE		ARM_PSCI_0_2_FN(11)
     71 #define ARM_PSCI_1_0_FN_CPU_DEFAULT_SUSPEND	ARM_PSCI_0_2_FN(12)
     72 #define ARM_PSCI_1_0_FN_NODE_HW_STATE		ARM_PSCI_0_2_FN(13)
     73 #define ARM_PSCI_1_0_FN_SYSTEM_SUSPEND		ARM_PSCI_0_2_FN(14)
     74 #define ARM_PSCI_1_0_FN_SET_SUSPEND_MODE	ARM_PSCI_0_2_FN(15)
     75 #define ARM_PSCI_1_0_FN_STAT_RESIDENCY		ARM_PSCI_0_2_FN(16)
     76 #define ARM_PSCI_1_0_FN_STAT_COUNT		ARM_PSCI_0_2_FN(17)
     77 
     78 #define ARM_PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND	ARM_PSCI_0_2_FN64(12)
     79 #define ARM_PSCI_1_0_FN64_NODE_HW_STATE		ARM_PSCI_0_2_FN64(13)
     80 #define ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND	ARM_PSCI_0_2_FN64(14)
     81 #define ARM_PSCI_1_0_FN64_STAT_RESIDENCY	ARM_PSCI_0_2_FN64(16)
     82 #define ARM_PSCI_1_0_FN64_STAT_COUNT		ARM_PSCI_0_2_FN64(17)
     83 
     84 /* 1KB stack per core */
     85 #define ARM_PSCI_STACK_SHIFT	10
     86 #define ARM_PSCI_STACK_SIZE	(1 << ARM_PSCI_STACK_SHIFT)
     87 
     88 /* PSCI affinity level state returned by AFFINITY_INFO */
     89 #define PSCI_AFFINITY_LEVEL_ON		0
     90 #define PSCI_AFFINITY_LEVEL_OFF		1
     91 #define PSCI_AFFINITY_LEVEL_ON_PENDING	2
     92 
     93 #ifndef __ASSEMBLY__
     94 #include <asm/types.h>
     95 
     96 /* These 3 helper functions assume cpu < CONFIG_ARMV7_PSCI_NR_CPUS */
     97 u32 psci_get_target_pc(int cpu);
     98 u32 psci_get_context_id(int cpu);
     99 void psci_save(int cpu, u32 pc, u32 context_id);
    100 
    101 void psci_cpu_entry(void);
    102 u32 psci_get_cpu_id(void);
    103 void psci_cpu_off_common(void);
    104 
    105 int psci_update_dt(void *fdt);
    106 void psci_board_init(void);
    107 int fdt_psci(void *fdt);
    108 
    109 void psci_v7_flush_dcache_all(void);
    110 #endif /* ! __ASSEMBLY__ */
    111 
    112 #endif /* __ARM_PSCI_H__ */
    113