1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2017 lvaro Fernndez Rojas <noltari (at) gmail.com> 4 * 5 * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h 6 */ 7 8 #ifndef __DT_BINDINGS_CLOCK_BCM63268_H 9 #define __DT_BINDINGS_CLOCK_BCM63268_H 10 11 #define BCM63268_CLK_GLESS 0 12 #define BCM63268_CLK_VDSL_QPROC 1 13 #define BCM63268_CLK_VDSL_AFE 2 14 #define BCM63268_CLK_VDSL 3 15 #define BCM63268_CLK_MIPS 4 16 #define BCM63268_CLK_WLAN_OCP 5 17 #define BCM63268_CLK_DECT 6 18 #define BCM63268_CLK_FAP0 7 19 #define BCM63268_CLK_FAP1 8 20 #define BCM63268_CLK_SAR 9 21 #define BCM63268_CLK_ROBOSW 10 22 #define BCM63268_CLK_PCM 11 23 #define BCM63268_CLK_USBD 12 24 #define BCM63268_CLK_USBH 13 25 #define BCM63268_CLK_IPSEC 14 26 #define BCM63268_CLK_SPI 15 27 #define BCM63268_CLK_HSSPI 16 28 #define BCM63268_CLK_PCIE 17 29 #define BCM63268_CLK_PHYMIPS 18 30 #define BCM63268_CLK_GMAC 19 31 #define BCM63268_CLK_NAND 20 32 #define BCM63268_CLK_TBUS 27 33 #define BCM63268_CLK_ROBOSW250 31 34 35 #define BCM63268_TCLK_EPHY1 0 36 #define BCM63268_TCLK_EPHY2 1 37 #define BCM63268_TCLK_EPHY3 2 38 #define BCM63268_TCLK_GPHY 3 39 #define BCM63268_TCLK_DSL 4 40 #define BCM63268_TCLK_WO_EPHY 5 41 #define BCM63268_TCLK_WO_DSL 6 42 #define BCM63268_TCLK_FAP1 11 43 #define BCM63268_TCLK_FAP2 15 44 #define BCM63268_TCLK_UTO_50 16 45 #define BCM63268_TCLK_UTO_EXT 17 46 #define BCM63268_TCLK_USB_REF 18 47 #define BCM63268_TCLK_SW_RST 29 48 #define BCM63268_TCLK_HW_RST 30 49 #define BCM63268_TCLK_POR_RST 31 50 51 #endif /* __DT_BINDINGS_CLOCK_BCM63268_H */ 52
