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      1 /* SPDX-License-Identifier: GPL-2.0+ */
      2 /*
      3  * Copyright (c) 2015 Google, Inc
      4  * Written by Simon Glass <sjg (at) chromium.org>
      5  */
      6 
      7 #ifndef __pch_h
      8 #define __pch_h
      9 
     10 #define PCH_RCBA		0xf0
     11 
     12 #define BIOS_CTRL_BIOSWE	BIT(0)
     13 
     14 /* Operations for the Platform Controller Hub */
     15 struct pch_ops {
     16 	/**
     17 	 * get_spi_base() - get the address of SPI base
     18 	 *
     19 	 * @dev:	PCH device to check
     20 	 * @sbasep:	Returns address of SPI base if available, else 0
     21 	 * @return 0 if OK, -ve on error (e.g. there is no SPI base)
     22 	 */
     23 	int (*get_spi_base)(struct udevice *dev, ulong *sbasep);
     24 
     25 	/**
     26 	 * set_spi_protect() - set whether SPI flash is protected or not
     27 	 *
     28 	 * @dev:	PCH device to adjust
     29 	 * @protect:	true to protect, false to unprotect
     30 	 *
     31 	 * @return 0 on success, -ENOSYS if not implemented
     32 	 */
     33 	int (*set_spi_protect)(struct udevice *dev, bool protect);
     34 
     35 	/**
     36 	 * get_gpio_base() - get the address of GPIO base
     37 	 *
     38 	 * @dev:	PCH device to check
     39 	 * @gbasep:	Returns address of GPIO base if available, else 0
     40 	 * @return 0 if OK, -ve on error (e.g. there is no GPIO base)
     41 	 */
     42 	int (*get_gpio_base)(struct udevice *dev, u32 *gbasep);
     43 
     44 	/**
     45 	 * get_io_base() - get the address of IO base
     46 	 *
     47 	 * @dev:	PCH device to check
     48 	 * @iobasep:	Returns address of IO base if available, else 0
     49 	 * @return 0 if OK, -ve on error (e.g. there is no IO base)
     50 	 */
     51 	int (*get_io_base)(struct udevice *dev, u32 *iobasep);
     52 };
     53 
     54 #define pch_get_ops(dev)        ((struct pch_ops *)(dev)->driver->ops)
     55 
     56 /**
     57  * pch_get_spi_base() - get the address of SPI base
     58  *
     59  * @dev:	PCH device to check
     60  * @sbasep:	Returns address of SPI base if available, else 0
     61  * @return 0 if OK, -ve on error (e.g. there is no SPI base)
     62  */
     63 int pch_get_spi_base(struct udevice *dev, ulong *sbasep);
     64 
     65 /**
     66  * set_spi_protect() - set whether SPI flash is protected or not
     67  *
     68  * @dev:	PCH device to adjust
     69  * @protect:	true to protect, false to unprotect
     70  *
     71  * @return 0 on success, -ENOSYS if not implemented
     72  */
     73 int pch_set_spi_protect(struct udevice *dev, bool protect);
     74 
     75 /**
     76  * pch_get_gpio_base() - get the address of GPIO base
     77  *
     78  * @dev:	PCH device to check
     79  * @gbasep:	Returns address of GPIO base if available, else 0
     80  * @return 0 if OK, -ve on error (e.g. there is no GPIO base)
     81  */
     82 int pch_get_gpio_base(struct udevice *dev, u32 *gbasep);
     83 
     84 /**
     85  * pch_get_io_base() - get the address of IO base
     86  *
     87  * @dev:	PCH device to check
     88  * @iobasep:	Returns address of IO base if available, else 0
     89  * @return 0 if OK, -ve on error (e.g. there is no IO base)
     90  */
     91 int pch_get_io_base(struct udevice *dev, u32 *iobasep);
     92 
     93 #endif
     94