1 /******************************************************************************* 2 * Copyright 2012-2018 Intel Corporation 3 * All Rights Reserved. 4 * 5 * If this software was obtained under the Intel Simplified Software License, 6 * the following terms apply: 7 * 8 * The source code, information and material ("Material") contained herein is 9 * owned by Intel Corporation or its suppliers or licensors, and title to such 10 * Material remains with Intel Corporation or its suppliers or licensors. The 11 * Material contains proprietary information of Intel or its suppliers and 12 * licensors. The Material is protected by worldwide copyright laws and treaty 13 * provisions. No part of the Material may be used, copied, reproduced, 14 * modified, published, uploaded, posted, transmitted, distributed or disclosed 15 * in any way without Intel's prior express written permission. No license under 16 * any patent, copyright or other intellectual property rights in the Material 17 * is granted to or conferred upon you, either expressly, by implication, 18 * inducement, estoppel or otherwise. Any license under such intellectual 19 * property rights must be express and approved by Intel in writing. 20 * 21 * Unless otherwise agreed by Intel in writing, you may not remove or alter this 22 * notice or any other notice embedded in Materials by Intel or Intel's 23 * suppliers or licensors in any way. 24 * 25 * 26 * If this software was obtained under the Apache License, Version 2.0 (the 27 * "License"), the following terms apply: 28 * 29 * You may not use this file except in compliance with the License. You may 30 * obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 31 * 32 * 33 * Unless required by applicable law or agreed to in writing, software 34 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT 35 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 36 * 37 * See the License for the specific language governing permissions and 38 * limitations under the License. 39 *******************************************************************************/ 40 41 /* 42 // Purpose: 43 // Intel(R) Integrated Performance Primitives. 44 // BNU data type definition 45 // 46 // 47 // 48 */ 49 50 #if !defined(_CP_BNU_IMPL_H) 51 #define _CP_BNU_IMPL_H 52 53 #define BNU_CHUNK_64BIT (64) 54 #define BNU_CHUNK_32BIT (32) 55 56 57 /* 58 // define BNU chunk data type 59 */ 60 #if ((_IPP_ARCH == _IPP_ARCH_EM64T) || (_IPP_ARCH == _IPP_ARCH_LP64) || (_IPP_ARCH == _IPP_ARCH_LRB) || (_IPP_ARCH == _IPP_ARCH_LRB2)) 61 typedef Ipp64u BNU_CHUNK_T; 62 typedef Ipp64s BNS_CHUNK_T; 63 #define BNU_CHUNK_LOG2 (6) 64 #define BNU_CHUNK_BITS BNU_CHUNK_64BIT 65 66 #else 67 typedef Ipp32u BNU_CHUNK_T; 68 typedef Ipp32s BNS_CHUNK_T; 69 #define BNU_CHUNK_LOG2 (5) 70 #define BNU_CHUNK_BITS BNU_CHUNK_32BIT 71 #endif 72 73 #define BNU_CHUNK_MASK (~(BNU_CHUNK_T)(0)) 74 75 #if (BNU_CHUNK_BITS == BNU_CHUNK_64BIT) 76 #pragma message ("BNU_CHUNK_BITS = 64 bit") 77 #elif (BNU_CHUNK_BITS == BNU_CHUNK_32BIT) 78 #pragma message ("BNU_CHUNK_BITS = 32 bit") 79 #else 80 #error BNU_CHUNK_BITS should be either 64 or 32 bit! 81 #endif 82 83 84 #ifdef _MSC_VER 85 // #pragma warning( disable : 4127 4711 4206) 86 # pragma warning( disable : 4127) 87 #endif 88 89 /* user's API BNU chunk data type */ 90 typedef Ipp32u API_BNU_CHUNK_T; 91 92 /* convert API_BNU_CHUNK_T (usual Ipp32u) length into the BNU_CHUNK_T length */ 93 #define INTERNAL_BNU_LENGTH(apiLen) \ 94 ((apiLen) + sizeof(BNU_CHUNK_T)/sizeof(API_BNU_CHUNK_T) -1)/(sizeof(BNU_CHUNK_T)/sizeof(API_BNU_CHUNK_T)) 95 96 /* Low and High parts of BNU_CHUNK_T value */ 97 #define BNU_CHUNK_2H ((BNU_CHUNK_T)1 << (BNU_CHUNK_BITS/2)) 98 #define LO_CHUNK(c) ((BNU_CHUNK_T)(c) & (BNU_CHUNK_2H - 1)) 99 #define HI_CHUNK(c) ((BNU_CHUNK_T)(c) >> (BNU_CHUNK_BITS/2)) 100 101 /* (carry,R) = A+B */ 102 #define ADD_AB(CARRY,R, A,B) \ 103 do { \ 104 BNU_CHUNK_T __s = (A) + (B); \ 105 (CARRY) = __s < (A); \ 106 (R) = __s; \ 107 } while(0) 108 109 /* (carry,R) = A+B+C */ 110 #define ADD_ABC(CARRY,R, A,B,C) \ 111 do { \ 112 BNU_CHUNK_T __s = (A) + (B); \ 113 BNU_CHUNK_T __t1= __s < (A); \ 114 BNU_CHUNK_T __r = __s + (C); \ 115 BNU_CHUNK_T __t2 = __r < __s; \ 116 (CARRY) = __t1 + __t2; \ 117 (R) = __r; \ 118 } while(0) 119 120 /* (borrow,R) = A-B */ 121 #define SUB_AB(BORROW,R, A,B) \ 122 do { \ 123 (BORROW) = (A)<(B); \ 124 (R) = (A)-(B); \ 125 } while(0) 126 127 /* (borrow,R) = A-B-C */ 128 #define SUB_ABC(BORROW,R, A,B,C) \ 129 do { \ 130 BNU_CHUNK_T __s = (A) -( B); \ 131 BNU_CHUNK_T __t1= __s > (A); \ 132 BNU_CHUNK_T __r = __s - (C); \ 133 BNU_CHUNK_T __t2 = __r > __s; \ 134 (BORROW) = __t1 + __t2; \ 135 (R) = __r; \ 136 } while(0) 137 138 /* (RH,RL) = A*B */ 139 #define MUL_AB(RH, RL, A, B) \ 140 do { \ 141 BNU_CHUNK_T __aL = LO_CHUNK((A)); \ 142 BNU_CHUNK_T __aH = HI_CHUNK((A)); \ 143 BNU_CHUNK_T __bL = LO_CHUNK((B)); \ 144 BNU_CHUNK_T __bH = HI_CHUNK((B)); \ 145 \ 146 BNU_CHUNK_T __x0 = (BNU_CHUNK_T) __aL * __bL; \ 147 BNU_CHUNK_T __x1 = (BNU_CHUNK_T) __aL * __bH; \ 148 BNU_CHUNK_T __x2 = (BNU_CHUNK_T) __aH * __bL; \ 149 BNU_CHUNK_T __x3 = (BNU_CHUNK_T) __aH * __bH; \ 150 \ 151 __x1 += HI_CHUNK(__x0); \ 152 __x1 += __x2; \ 153 if(__x1 < __x2) \ 154 __x3 += BNU_CHUNK_2H; \ 155 \ 156 (RH) = __x3 + HI_CHUNK(__x1); \ 157 (RL) = (__x1 << BNU_CHUNK_BITS/2) + LO_CHUNK(__x0); \ 158 } while (0) 159 160 #endif /* _CP_BNU_IMPL_H */ 161
