Home | History | Annotate | Download | only in configs
      1 /* SPDX-License-Identifier: GPL-2.0+ */
      2 /*
      3  * (C) Copyright 2006-2008
      4  * Texas Instruments.
      5  * Richard Woodruff <r-woodruff2 (at) ti.com>
      6  * Syed Mohammed Khasim <x0khasim (at) ti.com>
      7  *
      8  * (C) Copyright 2009
      9  * Frederik Kriewitz <frederik (at) kriewitz.eu>
     10  *
     11  * Configuration settings for the DevKit8000 board.
     12  */
     13 
     14 #ifndef __CONFIG_H
     15 #define __CONFIG_H
     16 
     17 /* High Level Configuration Options */
     18 #define CONFIG_MACH_TYPE	MACH_TYPE_DEVKIT8000
     19 
     20 /*
     21  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
     22  * 64 bytes before this address should be set aside for u-boot.img's
     23  * header. That is 0x800FFFC0--0x80100000 should not be used for any
     24  * other needs.
     25  */
     26 
     27 #define CONFIG_SPL_BSS_START_ADDR       0x80000500 /* leave space for bootargs*/
     28 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
     29 
     30 #define CONFIG_SYS_SPL_MALLOC_START	0x80208000
     31 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000	/* 1 MB */
     32 
     33 /*  Physical Memory Map  */
     34 #define CONFIG_NR_DRAM_BANKS		2 /* CS1 may or may not be populated */
     35 
     36 #include <configs/ti_omap3_common.h>
     37 
     38 #define CONFIG_MISC_INIT_R
     39 
     40 #define CONFIG_REVISION_TAG		1
     41 
     42 /* Size of malloc() pool */
     43 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
     44 						/* Sector */
     45 #undef CONFIG_SYS_MALLOC_LEN
     46 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))
     47 
     48 /* Hardware drivers */
     49 /* DM9000 */
     50 #define CONFIG_NET_RETRY_COUNT		20
     51 #define	CONFIG_DRIVER_DM9000		1
     52 #define	CONFIG_DM9000_BASE		0x2c000000
     53 #define	DM9000_IO			CONFIG_DM9000_BASE
     54 #define	DM9000_DATA			(CONFIG_DM9000_BASE + 0x400)
     55 #define	CONFIG_DM9000_USE_16BIT		1
     56 #define CONFIG_DM9000_NO_SROM		1
     57 #undef	CONFIG_DM9000_DEBUG
     58 
     59 /* TWL4030 */
     60 #define CONFIG_TWL4030_LED		1
     61 
     62 /* Board NAND Info */
     63 
     64 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
     65 							/* to access nand */
     66 #define CONFIG_JFFS2_NAND
     67 /* nand device jffs2 lives on */
     68 #define CONFIG_JFFS2_DEV		"nand0"
     69 /* start of jffs2 partition */
     70 #define CONFIG_JFFS2_PART_OFFSET	0x680000
     71 #define CONFIG_JFFS2_PART_SIZE		0xf980000	/* size of jffs2 */
     72 							/* partition */
     73 
     74 /* BOOTP/DHCP options */
     75 #define CONFIG_BOOTP_NISDOMAIN
     76 #define CONFIG_BOOTP_BOOTFILESIZE
     77 #define CONFIG_BOOTP_DNS2
     78 #define CONFIG_BOOTP_SEND_HOSTNAME
     79 #define CONFIG_BOOTP_TIMEOFFSET
     80 #undef CONFIG_BOOTP_VENDOREX
     81 
     82 /* Environment information */
     83 #define CONFIG_EXTRA_ENV_SETTINGS \
     84 	"loadaddr=0x82000000\0" \
     85 	"console=ttyO2,115200n8\0" \
     86 	"mmcdev=0\0" \
     87 	"vram=12M\0" \
     88 	"dvimode=1024x768MR-16@60\0" \
     89 	"defaultdisplay=dvi\0" \
     90 	"nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \
     91 	"kernelopts=rw\0" \
     92 	"commonargs=" \
     93 		"setenv bootargs console=${console} " \
     94 		"vram=${vram} " \
     95 		"omapfb.mode=dvi:${dvimode} " \
     96 		"omapdss.def_disp=${defaultdisplay}\0" \
     97 	"mmcargs=" \
     98 		"run commonargs; " \
     99 		"setenv bootargs ${bootargs} " \
    100 		"root=/dev/mmcblk0p2 " \
    101 		"rootwait " \
    102 		"${kernelopts}\0" \
    103 	"nandargs=" \
    104 		"run commonargs; " \
    105 		"setenv bootargs ${bootargs} " \
    106 		"omapfb.mode=dvi:${dvimode} " \
    107 		"omapdss.def_disp=${defaultdisplay} " \
    108 		"root=/dev/mtdblock4 " \
    109 		"rootfstype=jffs2 " \
    110 		"${kernelopts}\0" \
    111 	"netargs=" \
    112 		"run commonargs; " \
    113 		"setenv bootargs ${bootargs} " \
    114 		"root=/dev/nfs " \
    115 		"nfsroot=${serverip}:${rootpath},${nfsopts} " \
    116 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \
    117 		"${kernelopts} " \
    118 		"dnsip1=${dnsip} " \
    119 		"dnsip2=${dnsip2}\0" \
    120 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
    121 	"bootscript=echo Running bootscript from mmc ...; " \
    122 		"source ${loadaddr}\0" \
    123 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
    124 	"eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \
    125 	"mmcboot=echo Booting from mmc ...; " \
    126 		"run mmcargs; " \
    127 		"bootm ${loadaddr}\0" \
    128 	"nandboot=echo Booting from nand ...; " \
    129 		"run nandargs; " \
    130 		"nand read ${loadaddr} 280000 400000; " \
    131 		"bootm ${loadaddr}\0" \
    132 	"netboot=echo Booting from network ...; " \
    133 		"dhcp ${loadaddr}; " \
    134 		"run netargs; " \
    135 		"bootm ${loadaddr}\0" \
    136 	"autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
    137 			"if run loadbootscript; then " \
    138 				"run bootscript; " \
    139 			"else " \
    140 				"if run loaduimage; then " \
    141 					"run mmcboot; " \
    142 				"else run nandboot; " \
    143 				"fi; " \
    144 			"fi; " \
    145 		"else run nandboot; fi\0"
    146 
    147 #define CONFIG_BOOTCOMMAND "run autoboot"
    148 
    149 /* Boot Argument Buffer Size */
    150 #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0 + 0x07000000)
    151 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
    152 					0x01000000) /* 16MB */
    153 
    154 /* NAND and environment organization  */
    155 
    156 #define CONFIG_ENV_OFFSET		0x260000
    157 
    158 /* SRAM config */
    159 #define CONFIG_SYS_SRAM_START              0x40200000
    160 #define CONFIG_SYS_SRAM_SIZE               0x10000
    161 
    162 /* Defines for SPL */
    163 
    164 #undef CONFIG_SPL_TEXT_BASE
    165 #define CONFIG_SPL_TEXT_BASE		0x40200000 /*CONFIG_SYS_SRAM_START*/
    166 
    167 /* NAND boot config */
    168 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
    169 #define CONFIG_SYS_NAND_PAGE_COUNT	64
    170 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
    171 #define CONFIG_SYS_NAND_OOBSIZE		64
    172 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
    173 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
    174 #define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
    175 						10, 11, 12, 13}
    176 
    177 #define CONFIG_SYS_NAND_ECCSIZE		512
    178 #define CONFIG_SYS_NAND_ECCBYTES	3
    179 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_HW
    180 
    181 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
    182 #define CONFIG_SYS_NAND_U_BOOT_SIZE	0x200000
    183 
    184 /* SPL OS boot options */
    185 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
    186 
    187 #undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
    188 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
    189 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
    190 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x500 /* address 0xa0000 */
    191 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x8   /* address 0x1000 */
    192 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	8     /* 4KB */
    193 
    194 #undef CONFIG_SYS_SPL_ARGS_ADDR
    195 #define CONFIG_SYS_SPL_ARGS_ADDR        (PHYS_SDRAM_1 + 0x100)
    196 
    197 #endif /* __CONFIG_H */
    198