1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2015 CompuLab, Ltd. 4 * 5 * Configuration settings for the CompuLab CL-SOM-iMX7 System-on-Module. 6 */ 7 8 #ifndef __CL_SOM_IMX7_CONFIG_H 9 #define __CL_SOM_IMX7_CONFIG_H 10 11 #include "mx7_common.h" 12 13 #define CONFIG_DBG_MONITOR 14 15 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 16 17 /* Size of malloc() pool */ 18 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) 19 20 #define CONFIG_BOARD_LATE_INIT 21 22 /* Uncomment to enable secure boot support */ 23 /* #define CONFIG_SECURE_BOOT */ 24 #define CONFIG_CSF_SIZE 0x4000 25 26 /* Network */ 27 #define CONFIG_FEC_MXC 28 #define CONFIG_MII 29 #define CONFIG_FEC_XCV_TYPE RGMII 30 #define CONFIG_ETHPRIME "FEC" 31 #define CONFIG_FEC_MXC_PHYADDR 0 32 33 #define CONFIG_PHYLIB 34 #define CONFIG_PHY_ATHEROS 35 /* ENET1 */ 36 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR 37 38 /* PMIC */ 39 #define CONFIG_POWER 40 #define CONFIG_POWER_I2C 41 #define CONFIG_POWER_PFUZE3000 42 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 43 44 #undef CONFIG_BOOTM_NETBSD 45 #undef CONFIG_BOOTM_PLAN9 46 #undef CONFIG_BOOTM_RTEMS 47 48 /* I2C configs */ 49 #define CONFIG_SYS_I2C 50 #define CONFIG_SYS_I2C_MXC 51 #define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */ 52 #define CONFIG_SYS_I2C_SPEED 100000 53 #define SYS_I2C_BUS_SOM 0 54 55 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 56 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 57 #define CONFIG_SYS_I2C_EEPROM_BUS SYS_I2C_BUS_SOM 58 59 #define CONFIG_PCA953X 60 #define CONFIG_CMD_PCA953X 61 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20 62 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } 63 64 #undef CONFIG_SYS_AUTOLOAD 65 #undef CONFIG_EXTRA_ENV_SETTINGS 66 #undef CONFIG_BOOTCOMMAND 67 #undef CONFIG_BOOTDELAY 68 69 #define CONFIG_BOOTDELAY 3 70 #define CONFIG_SYS_AUTOLOAD "no" 71 72 #define CONFIG_EXTRA_ENV_SETTINGS \ 73 "autoload=off\0" \ 74 "script=boot.scr\0" \ 75 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \ 76 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \ 77 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${fdtfile};\0" \ 78 "bootscript=echo Running bootscript from ${storagetype} ...; source ${loadaddr};\0" \ 79 "storagebootcmd=echo Booting from ${storagetype} ...; run ${storagetype}args; run doboot;\0" \ 80 "kernel=zImage\0" \ 81 "console=ttymxc0\0" \ 82 "fdt_high=0xffffffff\0" \ 83 "initrd_high=0xffffffff\0" \ 84 "fdtfile=imx7d-sbc-imx7.dtb\0" \ 85 "fdtaddr=0x83000000\0" \ 86 "mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \ 87 "usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \ 88 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 89 "usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \ 90 "doboot=bootz ${loadaddr} - ${fdtaddr}\0" \ 91 "mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \ 92 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 93 "root=/dev/mmcblk${mmcblk}p2 rootwait rw\0" \ 94 "mmcbootscript=" \ 95 "if run mmc_config; then " \ 96 "setenv storagetype mmc;" \ 97 "setenv storagedev ${mmcdev}:${mmcpart};" \ 98 "if run loadscript; then " \ 99 "run bootscript; " \ 100 "fi; " \ 101 "fi;\0" \ 102 "mmcboot=" \ 103 "if run mmc_config; then " \ 104 "setenv storagetype mmc;" \ 105 "setenv storagedev ${mmcdev}:${mmcpart};" \ 106 "if run loadkernel; then " \ 107 "if run loadfdt; then " \ 108 "run storagebootcmd;" \ 109 "fi; " \ 110 "fi; " \ 111 "fi;\0" \ 112 "sdbootscript=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; " \ 113 "run mmcbootscript\0" \ 114 "usbbootscript=setenv usbdev ${usbdev_def}; " \ 115 "setenv storagetype usb;" \ 116 "setenv storagedev ${usbdev}:${usbpart};" \ 117 "if run loadscript; then " \ 118 "run bootscript; " \ 119 "fi; " \ 120 "sdboot=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; run mmcboot\0" \ 121 "emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \ 122 "emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \ 123 124 #define CONFIG_BOOTCOMMAND \ 125 "echo SD boot attempt ...; run sdbootscript; run sdboot; " \ 126 "echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \ 127 "echo USB boot attempt ...; run usbbootscript; " 128 129 #define CONFIG_SYS_MEMTEST_START 0x80000000 130 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 131 132 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 133 #define CONFIG_SYS_HZ 1000 134 135 /* Physical Memory Map */ 136 #define CONFIG_NR_DRAM_BANKS 1 137 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 138 139 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 140 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 141 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 142 143 #define CONFIG_SYS_INIT_SP_OFFSET \ 144 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 145 #define CONFIG_SYS_INIT_SP_ADDR \ 146 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 147 148 /* SPI Flash support */ 149 #define CONFIG_SF_DEFAULT_BUS 0 150 #define CONFIG_SF_DEFAULT_CS 0 151 #define CONFIG_SF_DEFAULT_SPEED 20000000 152 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 153 154 /* FLASH and environment organization */ 155 #define CONFIG_ENV_SIZE SZ_8K 156 #define CONFIG_ENV_OFFSET (768 * 1024) 157 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 158 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 159 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 160 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 161 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 162 163 /* MMC Config*/ 164 #define CONFIG_FSL_USDHC 165 #ifdef CONFIG_FSL_USDHC 166 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR 167 168 #define CONFIG_SYS_FSL_USDHC_NUM 2 169 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ 170 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 171 #endif 172 173 /* USB Configs */ 174 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 175 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 176 #define CONFIG_MXC_USB_FLAGS 0 177 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 178 179 /* Uncomment to enable iMX thermal driver support */ 180 /*#define CONFIG_IMX_THERMAL*/ 181 182 /* SPL */ 183 #include "imx7_spl.h" 184 #ifdef CONFIG_SPL_BUILD 185 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 186 #endif /* CONFIG_SPL_BUILD */ 187 188 #endif /* __CONFIG_H */ 189
