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      1 /* SPDX-License-Identifier: GPL-2.0+ */
      2 /*
      3  * Copyright (C) 2014 Stefan Roese <sr (at) denx.de>
      4  * Copyright (C) 2016 Mario Six <mario.six (at) gdsys.cc>
      5  */
      6 
      7 #ifndef _CONFIG_CONTROLCENTERDC_H
      8 #define _CONFIG_CONTROLCENTERDC_H
      9 
     10 /*
     11  * High Level Configuration Options (easy to change)
     12  */
     13 #define CONFIG_CUSTOMER_BOARD_SUPPORT
     14 
     15 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
     16 #define CONFIG_BOARD_LATE_INIT
     17 
     18 /*
     19  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
     20  * for DDR ECC byte filling in the SPL before loading the main
     21  * U-Boot into it.
     22  */
     23 
     24 #define CONFIG_SYS_TCLK		250000000	/* 250MHz */
     25 
     26 #define CONFIG_LOADADDR 		1000000
     27 
     28 /*
     29  * Commands configuration
     30  */
     31 #define CONFIG_CMD_I2C
     32 #define CONFIG_CMD_SPI
     33 
     34 /* SPI NOR flash default params, used by sf commands */
     35 #define CONFIG_SF_DEFAULT_BUS		1
     36 #define CONFIG_SF_DEFAULT_SPEED		1000000
     37 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
     38 
     39 /*
     40  * SDIO/MMC Card Configuration
     41  */
     42 #define CONFIG_SYS_MMC_BASE		MVEBU_SDIO_BASE
     43 
     44 /*
     45  * SATA/SCSI/AHCI configuration
     46  */
     47 #define CONFIG_SCSI_AHCI_PLAT
     48 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	2
     49 #define CONFIG_SYS_SCSI_MAX_LUN		1
     50 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
     51 					 CONFIG_SYS_SCSI_MAX_LUN)
     52 
     53 /* USB/EHCI configuration */
     54 #define CONFIG_EHCI_IS_TDI
     55 
     56 /* Environment in SPI NOR flash */
     57 #define CONFIG_ENV_SPI_BUS		1
     58 #define CONFIG_ENV_OFFSET		(1 << 20) /* 1MiB in */
     59 #define CONFIG_ENV_SIZE			(64 << 10) /* 64KiB */
     60 #define CONFIG_ENV_SECT_SIZE		(256 << 10) /* 256KiB sectors */
     61 
     62 #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
     63 
     64 /* PCIe support */
     65 #ifndef CONFIG_SPL_BUILD
     66 #define CONFIG_PCI
     67 #define CONFIG_PCI_MVEBU
     68 #define CONFIG_PCI_PNP
     69 #define CONFIG_PCI_SCAN_SHOW
     70 #endif
     71 
     72 /*
     73  * Software (bit-bang) MII driver configuration
     74  */
     75 #define CONFIG_BITBANGMII		/* bit-bang MII PHY management */
     76 #define CONFIG_BITBANGMII_MULTI
     77 
     78 /* SPL */
     79 /*
     80  * Select the boot device here
     81  *
     82  * Currently supported are:
     83  * SPL_BOOT_SPI_NOR_FLASH	- Booting via SPI NOR flash
     84  * SPL_BOOT_SDIO_MMC_CARD	- Booting via SDIO/MMC card (partition 1)
     85  */
     86 #define SPL_BOOT_SPI_NOR_FLASH		1
     87 #define SPL_BOOT_SDIO_MMC_CARD		2
     88 #define CONFIG_SPL_BOOT_DEVICE		SPL_BOOT_SPI_NOR_FLASH
     89 
     90 /* Defines for SPL */
     91 #define CONFIG_SPL_SIZE			(160 << 10)
     92 
     93 #if defined(CONFIG_SECURED_MODE_IMAGE)
     94 #define CONFIG_SPL_TEXT_BASE		0x40002614
     95 #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_SIZE - 0x2614)
     96 #else
     97 #define CONFIG_SPL_TEXT_BASE		0x40000030
     98 #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_SIZE - 0x30)
     99 #endif
    100 
    101 #define CONFIG_SPL_BSS_START_ADDR	(0x40000000 + CONFIG_SPL_SIZE)
    102 #define CONFIG_SPL_BSS_MAX_SIZE		(16 << 10)
    103 
    104 #ifdef CONFIG_SPL_BUILD
    105 #define CONFIG_SYS_MALLOC_SIMPLE
    106 #endif
    107 
    108 #define CONFIG_SPL_STACK		(0x40000000 + ((212 - 16) << 10))
    109 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
    110 
    111 #define CONFIG_SPL_LIBCOMMON_SUPPORT
    112 #define CONFIG_SPL_LIBGENERIC_SUPPORT
    113 #define CONFIG_SPL_I2C_SUPPORT
    114 
    115 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
    116 /* SPL related SPI defines */
    117 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x30000
    118 #define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
    119 #endif
    120 
    121 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
    122 /* SPL related MMC defines */
    123 #define CONFIG_SPL_MMC_SUPPORT
    124 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
    125 #define CONFIG_SYS_MMC_U_BOOT_OFFS		(168 << 10)
    126 #define CONFIG_SYS_U_BOOT_OFFS			CONFIG_SYS_MMC_U_BOOT_OFFS
    127 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	(CONFIG_SYS_U_BOOT_OFFS / 512)
    128 #ifdef CONFIG_SPL_BUILD
    129 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	0x00180000	/* in SDRAM */
    130 #endif
    131 #endif
    132 
    133 /*
    134  * Environment Configuration
    135  */
    136 #define CONFIG_ENV_OVERWRITE
    137 
    138 #define CONFIG_BAUDRATE 115200
    139 
    140 #define CONFIG_HOSTNAME		"ccdc"
    141 #define CONFIG_ROOTPATH		"/opt/nfsroot"
    142 #define CONFIG_BOOTFILE		"ccdc.img"
    143 
    144 #define CONFIG_PREBOOT		/* enable preboot variable */
    145 
    146 #define CONFIG_EXTRA_ENV_SETTINGS						\
    147 	"netdev=eth1\0"						\
    148 	"consoledev=ttyS1\0"							\
    149 	"u-boot=u-boot.bin\0"							\
    150 	"bootfile_addr=1000000\0"						\
    151 	"keyprogram_addr=3000000\0"						\
    152 	"keyprogram_file=keyprogram.img\0"						\
    153 	"fdtfile=controlcenterdc.dtb\0"						\
    154 	"load=tftpboot ${loadaddr} ${u-boot}\0"					\
    155 	"mmcdev=0:2\0"								\
    156 	"update=sf probe 1:0;"							\
    157 		" sf erase 0 +${filesize};"					\
    158 		" sf write ${fileaddr} 0 ${filesize}\0"				\
    159 	"upd=run load update\0"							\
    160 	"fdt_high=0x10000000\0"							\
    161 	"initrd_high=0x10000000\0"						\
    162 	"loadkeyprogram=tpm flush_keys;"					\
    163 		" mmc rescan;"							\
    164 		" ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
    165 		" source ${keyprogram_addr}:script@1\0"				\
    166 	"gpio1=gpio@22_25\0"							\
    167 	"gpio2=A29\0"								\
    168 	"blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 "	\
    169 		  "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0"	\
    170 	"bootfail=for i in ${blinkseq}; do"					\
    171 		" if test $i -eq 0; then"					\
    172 		" gpio clear ${gpio1}; gpio set ${gpio2};"			\
    173 		" elif test $i -eq 1; then"					\
    174 		" gpio clear ${gpio1}; gpio clear ${gpio2};"			\
    175 		" elif test $i -eq 2; then"					\
    176 		" gpio set ${gpio1}; gpio set ${gpio2};"			\
    177 		" else;"							\
    178 		" gpio clear ${gpio1}; gpio set ${gpio2};"			\
    179 		" fi; sleep 0.12; done\0"
    180 
    181 #define CONFIG_NFSBOOTCOMMAND								\
    182 	"setenv bootargs root=/dev/nfs rw "						\
    183 	"nfsroot=${serverip}:${rootpath} "						\
    184 	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off "	\
    185 	"console=${consoledev},${baudrate} ${othbootargs}; "				\
    186 	"tftpboot ${bootfile_addr} ${bootfile}; "						\
    187 	"bootm ${bootfile_addr}"
    188 
    189 #define CONFIG_MMCBOOTCOMMAND					\
    190 	"setenv bootargs root=/dev/mmcblk0p3 rw rootwait "	\
    191 	"console=${consoledev},${baudrate} ${othbootargs}; "	\
    192 	"ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; "	\
    193 	"bootm ${bootfile_addr}"
    194 
    195 #define CONFIG_BOOTCOMMAND			\
    196 	"if env exists keyprogram; then;"	\
    197 	" setenv keyprogram; run nfsboot;"	\
    198         " fi;"					\
    199         " run dobootfail"
    200 
    201 /*
    202  * mv-common.h should be defined after CMD configs since it used them
    203  * to enable certain macros
    204  */
    205 #include "mv-common.h"
    206 
    207 #endif /* _CONFIG_CONTROLCENTERDC_H */
    208