| /device/google/contexthub/firmware/os/platform/stm32/ |
| usart.c | 30 volatile uint16_t CR1;
114 block->CR1 = (block->CR1 &~ 0x1600) | wordLengthVals[data_bits] | parityVals[parity] | 0x800C;
129 block->CR1 |= 0x2000;
137 block->CR1 &=~ 0x2000;
|
| spi.c | 69 volatile uint32_t CR1;
197 regs->CR1 &= ~SPI_CR1_BR_MASK;
198 regs->CR1 |= SPI_CR1_BR(div);
202 regs->CR1 &= ~SPI_CR1_CPOL;
204 regs->CR1 |= SPI_CR1_CPOL;
207 regs->CR1 &= ~SPI_CR1_CPHA;
209 regs->CR1 |= SPI_CR1_CPHA;
212 regs->CR1 &= ~SPI_CR1_DFF;
214 regs->CR1 |= SPI_CR1_DFF;
217 regs->CR1 &= ~SPI_CR1_LSBFIRST
[all...] |
| bl.c | 20 volatile uint32_t CR1;
461 SPI->CR1 = 0x00000040; //spi is on, configured same as bootloader would
|
| platform.c | 57 volatile uint16_t CR1;
287 TIM2->CR1 = (TIM2->CR1 &~ 0x03E1) | 0x0010; //count down mode with no clock division, disabled
342 tim->CR1 &=~ 1;
392 tim->CR1 &=~ 1;
401 tim->CR1 |= 1;
476 tim->CR1 &=~ 1;
|
| i2c.c | 110 volatile uint32_t CR1;
253 pdev->cfg->regs->CR1 |= I2C_CR1_ACK;
258 pdev->cfg->regs->CR1 &= ~I2C_CR1_ACK;
275 while (regs->CR1 & (I2C_CR1_STOP | I2C_CR1_START))
277 regs->CR1 |= I2C_CR1_STOP;
284 while (regs->CR1 & (I2C_CR1_STOP | I2C_CR1_START))
286 regs->CR1 |= I2C_CR1_START;
303 pdev->cfg->regs->CR1 |= I2C_CR1_PE;
308 pdev->cfg->regs->CR1 &= ~I2C_CR1_PE;
|
| /external/u-boot/board/renesas/sh7752evb/ |
| spi-boot.c | 27 #define CR1 0xFE002008
32 /* CR1 */
70 spi_write(0x02, CR1);
75 spi_write(0x00, CR1);
97 spi_write(spi_read(CR1) | SPI_SSDB, CR1);
98 spi_write(spi_read(CR1) | SPI_SSA, CR1);
104 spi_write(0, CR1);
|
| /external/u-boot/board/renesas/sh7753evb/ |
| spi-boot.c | 23 #define CR1 0xFE002008
30 /* CR1 */
75 spi_write(0x02, CR1);
80 spi_write(0x00, CR1);
110 spi_write(spi_read(CR1) | SPI_SSDB, CR1);
111 spi_write(spi_read(CR1) | SPI_SSA, CR1);
117 spi_write(0, CR1);
|
| /external/u-boot/board/renesas/sh7757lcr/ |
| spi-boot.c | 31 #define CR1 0xFE002008
36 /* CR1 */
69 spi_write(0xfe, CR1);
72 spi_write(0x00, CR1);
92 spi_write(spi_read(CR1) | SPI_SSDB, CR1);
93 spi_write(spi_read(CR1) | SPI_SSA, CR1);
|
| /bionic/libc/kernel/uapi/asm-generic/ |
| termbits.h | 99 #define CR1 0001000
|
| /bionic/libc/kernel/uapi/asm-mips/asm/ |
| termbits.h | 100 #define CR1 0001000
|
| /external/kernel-headers/original/uapi/asm-generic/ |
| termbits.h | 93 #define CR1 0001000
|
| /external/kernel-headers/original/uapi/asm-mips/asm/ |
| termbits.h | 113 #define CR1 0001000
|
| /external/python/cpython2/Lib/plat-irix5/ |
| IOCTL.py | 108 CR1 = 0001000
|
| /external/python/cpython2/Lib/plat-irix6/ |
| IOCTL.py | 108 CR1 = 0001000
|
| /external/mesa3d/src/mesa/x86/ |
| assyntax.h | 125 #define CR1 cr1
187 #define CR1 %cr1
[all...] |
| /external/syzkaller/vendor/golang.org/x/sys/unix/ |
| zerrors_solaris_amd64.go | 178 CR1 = 0x200
[all...] |
| zerrors_darwin_386.go | 236 CR1 = 0x1000
[all...] |
| zerrors_darwin_amd64.go | 236 CR1 = 0x1000
[all...] |
| zerrors_darwin_arm.go | 236 CR1 = 0x1000
[all...] |
| zerrors_darwin_arm64.go | 236 CR1 = 0x1000
[all...] |
| zerrors_linux_386.go | 314 CR1 = 0x200
[all...] |
| zerrors_linux_amd64.go | 314 CR1 = 0x200
[all...] |
| zerrors_linux_arm.go | 314 CR1 = 0x200
[all...] |
| zerrors_linux_arm64.go | 314 CR1 = 0x200
[all...] |
| zerrors_linux_mips.go | 314 CR1 = 0x200
[all...] |
