/external/llvm/lib/Target/X86/ |
X86SelectionDAGInfo.cpp | 266 EVT DstVT = Dst.getValueType(); 270 DAG.getNode(ISD::ADD, dl, DstVT, Dst, 272 DstVT)),
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X86ISelDAGToDAG.cpp | 595 MVT DstVT = N->getSimpleValueType(0); 598 if (SrcVT.isVector() || DstVT.isVector()) 606 bool DstIsSSE = X86Lowering->isScalarFPTypeInSSEReg(DstVT); 624 MemVT = DstVT; // FP_ROUND must use DstVT, we can't do a 'trunc load'. 626 MemVT = SrcIsSSE ? SrcVT : DstVT; 636 SDValue Result = CurDAG->getExtLoad(ISD::EXTLOAD, dl, DstVT, Store, MemTmp, [all...] |
X86FastISel.cpp | 97 bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT, 693 /// type SrcVT to type DstVT using the specified extension opcode Opc (e.g. 695 bool X86FastISel::X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, 698 unsigned RR = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
X86SelectionDAGInfo.cpp | 243 EVT DstVT = Dst.getValueType(); 247 DAG.getNode(ISD::ADD, dl, DstVT, Dst, 248 DAG.getConstant(Offset, DstVT)),
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X86FastISel.cpp | 86 bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT, 308 /// type SrcVT to type DstVT using the specified extension opcode Opc (e.g. 310 bool X86FastISel::X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, 313 unsigned RR = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, 755 EVT DstVT = VA.getValVT(); 757 if (SrcVT != DstVT) { 764 assert(DstVT == MVT::i32 && "X86 should always ext to i32"); 774 SrcReg = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Op, [all...] |
X86ISelDAGToDAG.cpp | 478 EVT DstVT = N->getValueType(0); 481 if (SrcVT.isVector() || DstVT.isVector()) 487 bool DstIsSSE = X86Lowering.isScalarFPTypeInSSEReg(DstVT); 505 MemVT = DstVT; // FP_ROUND must use DstVT, we can't do a 'trunc load'. 507 MemVT = SrcIsSSE ? SrcVT : DstVT; 517 SDValue Result = CurDAG->getExtLoad(ISD::EXTLOAD, dl, DstVT, Store, MemTmp, [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
X86SelectionDAGInfo.cpp | 278 EVT DstVT = Dst.getValueType(); 282 DAG.getNode(ISD::ADD, dl, DstVT, Dst, 284 DstVT)),
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X86ISelDAGToDAG.cpp | 773 MVT DstVT = N->getSimpleValueType(0); 776 if (SrcVT.isVector() || DstVT.isVector()) 784 bool DstIsSSE = X86Lowering->isScalarFPTypeInSSEReg(DstVT); 802 MemVT = DstVT; // FP_ROUND must use DstVT, we can't do a 'trunc load'. 804 MemVT = SrcIsSSE ? SrcVT : DstVT; 813 SDValue Result = CurDAG->getExtLoad(ISD::EXTLOAD, dl, DstVT, Store, MemTmp, [all...] |
X86FastISel.cpp | 97 bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT, 716 /// type SrcVT to type DstVT using the specified extension opcode Opc (e.g. 718 bool X86FastISel::X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, 721 unsigned RR = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64TargetTransformInfo.cpp | 315 auto DstVT = TLI->getValueType(DL, Dst); 321 if (!VecLT.second.isVector() || !TLI->isTypeLegal(DstVT)) 326 if (DstVT.getSizeInBits() < SrcVT.getSizeInBits()) 341 if (DstVT.getSizeInBits() != 64u || SrcVT.getSizeInBits() == 32u)
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AArch64ISelDAGToDAG.cpp | [all...] |
/external/llvm/lib/Transforms/Scalar/ |
Scalarizer.cpp | 491 VectorType *DstVT = dyn_cast<VectorType>(BCI.getDestTy()); 493 if (!DstVT || !SrcVT) 496 unsigned DstNumElems = DstVT->getNumElements(); 505 Res[I] = Builder.CreateBitCast(Op0[I], DstVT->getElementType(), 511 Type *MidTy = VectorType::get(DstVT->getElementType(), FanOut); 537 Res[ResI] = Builder.CreateBitCast(V, DstVT->getElementType(),
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/external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/ |
CodeGenPrepare.cpp | 368 EVT DstVT = TLI.getValueType(CI->getType()); 371 if (SrcVT.isInteger() != DstVT.isInteger()) 376 if (SrcVT.bitsLT(DstVT)) return false; 384 if (TLI.getTypeAction(CI->getContext(), DstVT) == 386 DstVT = TLI.getTypeToTransformTo(CI->getContext(), DstVT); 389 if (SrcVT != DstVT) [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
AArch64TargetTransformInfo.cpp | 418 auto DstVT = TLI->getValueType(DL, Dst); 424 if (!VecLT.second.isVector() || !TLI->isTypeLegal(DstVT)) 429 if (DstVT.getSizeInBits() < SrcVT.getSizeInBits()) 444 if (DstVT.getSizeInBits() != 64u || SrcVT.getSizeInBits() == 32u) [all...] |
AArch64ISelDAGToDAG.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
Scalarizer.cpp | 609 VectorType *DstVT = dyn_cast<VectorType>(BCI.getDestTy()); 611 if (!DstVT || !SrcVT) 614 unsigned DstNumElems = DstVT->getNumElements(); 623 Res[I] = Builder.CreateBitCast(Op0[I], DstVT->getElementType(), 629 Type *MidTy = VectorType::get(DstVT->getElementType(), FanOut); 655 Res[ResI] = Builder.CreateBitCast(V, DstVT->getElementType(),
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
FastISel.cpp | 666 EVT DstVT = TLI.getValueType(I->getType()); 669 DstVT == MVT::Other || !DstVT.isSimple()) 674 if (!TLI.isTypeLegal(DstVT)) 689 DstVT.getSimpleVT(), 711 EVT DstVT = TLI.getValueType(I->getType()); 714 DstVT == MVT::Other || !DstVT.isSimple() || 715 !TLI.isTypeLegal(SrcVT) || !TLI.isTypeLegal(DstVT)) 728 if (SrcVT.getSimpleVT() == DstVT.getSimpleVT()) [all...] |
LegalizeIntegerTypes.cpp | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
FastISel.cpp | [all...] |
LegalizeIntegerTypes.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCFastISel.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
FastISel.cpp | [all...] |
LegalizeIntegerTypes.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
PPCFastISel.cpp | [all...] |
/external/llvm/lib/CodeGen/ |
CodeGenPrepare.cpp | 810 EVT DstVT = TLI.getValueType(DL, CI->getType()); 813 if (SrcVT.isInteger() != DstVT.isInteger()) 818 if (SrcVT.bitsLT(DstVT)) return false; 826 if (TLI.getTypeAction(CI->getContext(), DstVT) == 828 DstVT = TLI.getTypeToTransformTo(CI->getContext(), DstVT); 831 if (SrcVT != DstVT) [all...] |