1 /* 2 * Copyright (C) 2014 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef ART_COMPILER_OPTIMIZING_CODE_GENERATOR_H_ 18 #define ART_COMPILER_OPTIMIZING_CODE_GENERATOR_H_ 19 20 #include "arch/instruction_set.h" 21 #include "arch/instruction_set_features.h" 22 #include "base/arena_containers.h" 23 #include "base/arena_object.h" 24 #include "base/array_ref.h" 25 #include "base/bit_field.h" 26 #include "base/bit_utils.h" 27 #include "base/enums.h" 28 #include "base/globals.h" 29 #include "base/memory_region.h" 30 #include "dex/string_reference.h" 31 #include "dex/type_reference.h" 32 #include "graph_visualizer.h" 33 #include "locations.h" 34 #include "nodes.h" 35 #include "optimizing_compiler_stats.h" 36 #include "read_barrier_option.h" 37 #include "stack.h" 38 #include "utils/label.h" 39 40 namespace art { 41 42 // Binary encoding of 2^32 for type double. 43 static int64_t constexpr k2Pow32EncodingForDouble = INT64_C(0x41F0000000000000); 44 // Binary encoding of 2^31 for type double. 45 static int64_t constexpr k2Pow31EncodingForDouble = INT64_C(0x41E0000000000000); 46 47 // Minimum value for a primitive integer. 48 static int32_t constexpr kPrimIntMin = 0x80000000; 49 // Minimum value for a primitive long. 50 static int64_t constexpr kPrimLongMin = INT64_C(0x8000000000000000); 51 52 // Maximum value for a primitive integer. 53 static int32_t constexpr kPrimIntMax = 0x7fffffff; 54 // Maximum value for a primitive long. 55 static int64_t constexpr kPrimLongMax = INT64_C(0x7fffffffffffffff); 56 57 static constexpr ReadBarrierOption kCompilerReadBarrierOption = 58 kEmitCompilerReadBarrier ? kWithReadBarrier : kWithoutReadBarrier; 59 60 class Assembler; 61 class CodeGenerator; 62 class CompilerOptions; 63 class StackMapStream; 64 class ParallelMoveResolver; 65 66 namespace linker { 67 class LinkerPatch; 68 } // namespace linker 69 70 class CodeAllocator { 71 public: 72 CodeAllocator() {} 73 virtual ~CodeAllocator() {} 74 75 virtual uint8_t* Allocate(size_t size) = 0; 76 virtual ArrayRef<const uint8_t> GetMemory() const = 0; 77 78 private: 79 DISALLOW_COPY_AND_ASSIGN(CodeAllocator); 80 }; 81 82 class SlowPathCode : public DeletableArenaObject<kArenaAllocSlowPaths> { 83 public: 84 explicit SlowPathCode(HInstruction* instruction) : instruction_(instruction) { 85 for (size_t i = 0; i < kMaximumNumberOfExpectedRegisters; ++i) { 86 saved_core_stack_offsets_[i] = kRegisterNotSaved; 87 saved_fpu_stack_offsets_[i] = kRegisterNotSaved; 88 } 89 } 90 91 virtual ~SlowPathCode() {} 92 93 virtual void EmitNativeCode(CodeGenerator* codegen) = 0; 94 95 // Save live core and floating-point caller-save registers and 96 // update the stack mask in `locations` for registers holding object 97 // references. 98 virtual void SaveLiveRegisters(CodeGenerator* codegen, LocationSummary* locations); 99 // Restore live core and floating-point caller-save registers. 100 virtual void RestoreLiveRegisters(CodeGenerator* codegen, LocationSummary* locations); 101 102 bool IsCoreRegisterSaved(int reg) const { 103 return saved_core_stack_offsets_[reg] != kRegisterNotSaved; 104 } 105 106 bool IsFpuRegisterSaved(int reg) const { 107 return saved_fpu_stack_offsets_[reg] != kRegisterNotSaved; 108 } 109 110 uint32_t GetStackOffsetOfCoreRegister(int reg) const { 111 return saved_core_stack_offsets_[reg]; 112 } 113 114 uint32_t GetStackOffsetOfFpuRegister(int reg) const { 115 return saved_fpu_stack_offsets_[reg]; 116 } 117 118 virtual bool IsFatal() const { return false; } 119 120 virtual const char* GetDescription() const = 0; 121 122 Label* GetEntryLabel() { return &entry_label_; } 123 Label* GetExitLabel() { return &exit_label_; } 124 125 HInstruction* GetInstruction() const { 126 return instruction_; 127 } 128 129 uint32_t GetDexPc() const { 130 return instruction_ != nullptr ? instruction_->GetDexPc() : kNoDexPc; 131 } 132 133 protected: 134 static constexpr size_t kMaximumNumberOfExpectedRegisters = 32; 135 static constexpr uint32_t kRegisterNotSaved = -1; 136 // The instruction where this slow path is happening. 137 HInstruction* instruction_; 138 uint32_t saved_core_stack_offsets_[kMaximumNumberOfExpectedRegisters]; 139 uint32_t saved_fpu_stack_offsets_[kMaximumNumberOfExpectedRegisters]; 140 141 private: 142 Label entry_label_; 143 Label exit_label_; 144 145 DISALLOW_COPY_AND_ASSIGN(SlowPathCode); 146 }; 147 148 class InvokeDexCallingConventionVisitor { 149 public: 150 virtual Location GetNextLocation(DataType::Type type) = 0; 151 virtual Location GetReturnLocation(DataType::Type type) const = 0; 152 virtual Location GetMethodLocation() const = 0; 153 154 protected: 155 InvokeDexCallingConventionVisitor() {} 156 virtual ~InvokeDexCallingConventionVisitor() {} 157 158 // The current index for core registers. 159 uint32_t gp_index_ = 0u; 160 // The current index for floating-point registers. 161 uint32_t float_index_ = 0u; 162 // The current stack index. 163 uint32_t stack_index_ = 0u; 164 165 private: 166 DISALLOW_COPY_AND_ASSIGN(InvokeDexCallingConventionVisitor); 167 }; 168 169 class FieldAccessCallingConvention { 170 public: 171 virtual Location GetObjectLocation() const = 0; 172 virtual Location GetFieldIndexLocation() const = 0; 173 virtual Location GetReturnLocation(DataType::Type type) const = 0; 174 virtual Location GetSetValueLocation(DataType::Type type, bool is_instance) const = 0; 175 virtual Location GetFpuLocation(DataType::Type type) const = 0; 176 virtual ~FieldAccessCallingConvention() {} 177 178 protected: 179 FieldAccessCallingConvention() {} 180 181 private: 182 DISALLOW_COPY_AND_ASSIGN(FieldAccessCallingConvention); 183 }; 184 185 class CodeGenerator : public DeletableArenaObject<kArenaAllocCodeGenerator> { 186 public: 187 // Compiles the graph to executable instructions. 188 void Compile(CodeAllocator* allocator); 189 static std::unique_ptr<CodeGenerator> Create(HGraph* graph, 190 const CompilerOptions& compiler_options, 191 OptimizingCompilerStats* stats = nullptr); 192 virtual ~CodeGenerator(); 193 194 // Get the graph. This is the outermost graph, never the graph of a method being inlined. 195 HGraph* GetGraph() const { return graph_; } 196 197 HBasicBlock* GetNextBlockToEmit() const; 198 HBasicBlock* FirstNonEmptyBlock(HBasicBlock* block) const; 199 bool GoesToNextBlock(HBasicBlock* current, HBasicBlock* next) const; 200 201 size_t GetStackSlotOfParameter(HParameterValue* parameter) const { 202 // Note that this follows the current calling convention. 203 return GetFrameSize() 204 + static_cast<size_t>(InstructionSetPointerSize(GetInstructionSet())) // Art method 205 + parameter->GetIndex() * kVRegSize; 206 } 207 208 virtual void Initialize() = 0; 209 virtual void Finalize(CodeAllocator* allocator); 210 virtual void EmitLinkerPatches(ArenaVector<linker::LinkerPatch>* linker_patches); 211 virtual bool NeedsThunkCode(const linker::LinkerPatch& patch) const; 212 virtual void EmitThunkCode(const linker::LinkerPatch& patch, 213 /*out*/ ArenaVector<uint8_t>* code, 214 /*out*/ std::string* debug_name); 215 virtual void GenerateFrameEntry() = 0; 216 virtual void GenerateFrameExit() = 0; 217 virtual void Bind(HBasicBlock* block) = 0; 218 virtual void MoveConstant(Location destination, int32_t value) = 0; 219 virtual void MoveLocation(Location dst, Location src, DataType::Type dst_type) = 0; 220 virtual void AddLocationAsTemp(Location location, LocationSummary* locations) = 0; 221 222 virtual Assembler* GetAssembler() = 0; 223 virtual const Assembler& GetAssembler() const = 0; 224 virtual size_t GetWordSize() const = 0; 225 virtual size_t GetFloatingPointSpillSlotSize() const = 0; 226 virtual uintptr_t GetAddressOf(HBasicBlock* block) = 0; 227 void InitializeCodeGeneration(size_t number_of_spill_slots, 228 size_t maximum_safepoint_spill_size, 229 size_t number_of_out_slots, 230 const ArenaVector<HBasicBlock*>& block_order); 231 // Backends can override this as necessary. For most, no special alignment is required. 232 virtual uint32_t GetPreferredSlotsAlignment() const { return 1; } 233 234 uint32_t GetFrameSize() const { return frame_size_; } 235 void SetFrameSize(uint32_t size) { frame_size_ = size; } 236 uint32_t GetCoreSpillMask() const { return core_spill_mask_; } 237 uint32_t GetFpuSpillMask() const { return fpu_spill_mask_; } 238 239 size_t GetNumberOfCoreRegisters() const { return number_of_core_registers_; } 240 size_t GetNumberOfFloatingPointRegisters() const { return number_of_fpu_registers_; } 241 virtual void SetupBlockedRegisters() const = 0; 242 243 virtual void ComputeSpillMask() { 244 core_spill_mask_ = allocated_registers_.GetCoreRegisters() & core_callee_save_mask_; 245 DCHECK_NE(core_spill_mask_, 0u) << "At least the return address register must be saved"; 246 fpu_spill_mask_ = allocated_registers_.GetFloatingPointRegisters() & fpu_callee_save_mask_; 247 } 248 249 static uint32_t ComputeRegisterMask(const int* registers, size_t length) { 250 uint32_t mask = 0; 251 for (size_t i = 0, e = length; i < e; ++i) { 252 mask |= (1 << registers[i]); 253 } 254 return mask; 255 } 256 257 virtual void DumpCoreRegister(std::ostream& stream, int reg) const = 0; 258 virtual void DumpFloatingPointRegister(std::ostream& stream, int reg) const = 0; 259 virtual InstructionSet GetInstructionSet() const = 0; 260 261 const CompilerOptions& GetCompilerOptions() const { return compiler_options_; } 262 263 // Saves the register in the stack. Returns the size taken on stack. 264 virtual size_t SaveCoreRegister(size_t stack_index, uint32_t reg_id) = 0; 265 // Restores the register from the stack. Returns the size taken on stack. 266 virtual size_t RestoreCoreRegister(size_t stack_index, uint32_t reg_id) = 0; 267 268 virtual size_t SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) = 0; 269 virtual size_t RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) = 0; 270 271 virtual bool NeedsTwoRegisters(DataType::Type type) const = 0; 272 // Returns whether we should split long moves in parallel moves. 273 virtual bool ShouldSplitLongMoves() const { return false; } 274 275 size_t GetNumberOfCoreCalleeSaveRegisters() const { 276 return POPCOUNT(core_callee_save_mask_); 277 } 278 279 size_t GetNumberOfCoreCallerSaveRegisters() const { 280 DCHECK_GE(GetNumberOfCoreRegisters(), GetNumberOfCoreCalleeSaveRegisters()); 281 return GetNumberOfCoreRegisters() - GetNumberOfCoreCalleeSaveRegisters(); 282 } 283 284 bool IsCoreCalleeSaveRegister(int reg) const { 285 return (core_callee_save_mask_ & (1 << reg)) != 0; 286 } 287 288 bool IsFloatingPointCalleeSaveRegister(int reg) const { 289 return (fpu_callee_save_mask_ & (1 << reg)) != 0; 290 } 291 292 uint32_t GetSlowPathSpills(LocationSummary* locations, bool core_registers) const { 293 DCHECK(locations->OnlyCallsOnSlowPath() || 294 (locations->Intrinsified() && locations->CallsOnMainAndSlowPath() && 295 !locations->HasCustomSlowPathCallingConvention())); 296 uint32_t live_registers = core_registers 297 ? locations->GetLiveRegisters()->GetCoreRegisters() 298 : locations->GetLiveRegisters()->GetFloatingPointRegisters(); 299 if (locations->HasCustomSlowPathCallingConvention()) { 300 // Save only the live registers that the custom calling convention wants us to save. 301 uint32_t caller_saves = core_registers 302 ? locations->GetCustomSlowPathCallerSaves().GetCoreRegisters() 303 : locations->GetCustomSlowPathCallerSaves().GetFloatingPointRegisters(); 304 return live_registers & caller_saves; 305 } else { 306 // Default ABI, we need to spill non-callee-save live registers. 307 uint32_t callee_saves = core_registers ? core_callee_save_mask_ : fpu_callee_save_mask_; 308 return live_registers & ~callee_saves; 309 } 310 } 311 312 size_t GetNumberOfSlowPathSpills(LocationSummary* locations, bool core_registers) const { 313 return POPCOUNT(GetSlowPathSpills(locations, core_registers)); 314 } 315 316 size_t GetStackOffsetOfShouldDeoptimizeFlag() const { 317 DCHECK(GetGraph()->HasShouldDeoptimizeFlag()); 318 DCHECK_GE(GetFrameSize(), FrameEntrySpillSize() + kShouldDeoptimizeFlagSize); 319 return GetFrameSize() - FrameEntrySpillSize() - kShouldDeoptimizeFlagSize; 320 } 321 322 // Record native to dex mapping for a suspend point. Required by runtime. 323 void RecordPcInfo(HInstruction* instruction, 324 uint32_t dex_pc, 325 SlowPathCode* slow_path = nullptr, 326 bool native_debug_info = false); 327 // Check whether we have already recorded mapping at this PC. 328 bool HasStackMapAtCurrentPc(); 329 // Record extra stack maps if we support native debugging. 330 void MaybeRecordNativeDebugInfo(HInstruction* instruction, 331 uint32_t dex_pc, 332 SlowPathCode* slow_path = nullptr); 333 334 bool CanMoveNullCheckToUser(HNullCheck* null_check); 335 void MaybeRecordImplicitNullCheck(HInstruction* instruction); 336 LocationSummary* CreateThrowingSlowPathLocations( 337 HInstruction* instruction, RegisterSet caller_saves = RegisterSet::Empty()); 338 void GenerateNullCheck(HNullCheck* null_check); 339 virtual void GenerateImplicitNullCheck(HNullCheck* null_check) = 0; 340 virtual void GenerateExplicitNullCheck(HNullCheck* null_check) = 0; 341 342 // Records a stack map which the runtime might use to set catch phi values 343 // during exception delivery. 344 // TODO: Replace with a catch-entering instruction that records the environment. 345 void RecordCatchBlockInfo(); 346 347 // Get the ScopedArenaAllocator used for codegen memory allocation. 348 ScopedArenaAllocator* GetScopedAllocator(); 349 350 void AddSlowPath(SlowPathCode* slow_path); 351 352 ScopedArenaVector<uint8_t> BuildStackMaps(const dex::CodeItem* code_item_for_osr_check); 353 size_t GetNumberOfJitRoots() const; 354 355 // Fills the `literals` array with literals collected during code generation. 356 // Also emits literal patches. 357 void EmitJitRoots(uint8_t* code, 358 const uint8_t* roots_data, 359 /*out*/std::vector<Handle<mirror::Object>>* roots) 360 REQUIRES_SHARED(Locks::mutator_lock_); 361 362 bool IsLeafMethod() const { 363 return is_leaf_; 364 } 365 366 void MarkNotLeaf() { 367 is_leaf_ = false; 368 requires_current_method_ = true; 369 } 370 371 void SetRequiresCurrentMethod() { 372 requires_current_method_ = true; 373 } 374 375 bool RequiresCurrentMethod() const { 376 return requires_current_method_; 377 } 378 379 // Clears the spill slots taken by loop phis in the `LocationSummary` of the 380 // suspend check. This is called when the code generator generates code 381 // for the suspend check at the back edge (instead of where the suspend check 382 // is, which is the loop entry). At this point, the spill slots for the phis 383 // have not been written to. 384 void ClearSpillSlotsFromLoopPhisInStackMap(HSuspendCheck* suspend_check, 385 HParallelMove* spills) const; 386 387 bool* GetBlockedCoreRegisters() const { return blocked_core_registers_; } 388 bool* GetBlockedFloatingPointRegisters() const { return blocked_fpu_registers_; } 389 390 bool IsBlockedCoreRegister(size_t i) { return blocked_core_registers_[i]; } 391 bool IsBlockedFloatingPointRegister(size_t i) { return blocked_fpu_registers_[i]; } 392 393 // Helper that returns the offset of the array's length field. 394 // Note: Besides the normal arrays, we also use the HArrayLength for 395 // accessing the String's `count` field in String intrinsics. 396 static uint32_t GetArrayLengthOffset(HArrayLength* array_length); 397 398 // Helper that returns the offset of the array's data. 399 // Note: Besides the normal arrays, we also use the HArrayGet for 400 // accessing the String's `value` field in String intrinsics. 401 static uint32_t GetArrayDataOffset(HArrayGet* array_get); 402 403 void EmitParallelMoves(Location from1, 404 Location to1, 405 DataType::Type type1, 406 Location from2, 407 Location to2, 408 DataType::Type type2); 409 410 static bool InstanceOfNeedsReadBarrier(HInstanceOf* instance_of) { 411 // Used only for kExactCheck, kAbstractClassCheck, kClassHierarchyCheck and kArrayObjectCheck. 412 DCHECK(instance_of->GetTypeCheckKind() == TypeCheckKind::kExactCheck || 413 instance_of->GetTypeCheckKind() == TypeCheckKind::kAbstractClassCheck || 414 instance_of->GetTypeCheckKind() == TypeCheckKind::kClassHierarchyCheck || 415 instance_of->GetTypeCheckKind() == TypeCheckKind::kArrayObjectCheck) 416 << instance_of->GetTypeCheckKind(); 417 // If the target class is in the boot image, it's non-moveable and it doesn't matter 418 // if we compare it with a from-space or to-space reference, the result is the same. 419 // It's OK to traverse a class hierarchy jumping between from-space and to-space. 420 return kEmitCompilerReadBarrier && !instance_of->GetTargetClass()->IsInBootImage(); 421 } 422 423 static ReadBarrierOption ReadBarrierOptionForInstanceOf(HInstanceOf* instance_of) { 424 return InstanceOfNeedsReadBarrier(instance_of) ? kWithReadBarrier : kWithoutReadBarrier; 425 } 426 427 static bool IsTypeCheckSlowPathFatal(HCheckCast* check_cast) { 428 switch (check_cast->GetTypeCheckKind()) { 429 case TypeCheckKind::kExactCheck: 430 case TypeCheckKind::kAbstractClassCheck: 431 case TypeCheckKind::kClassHierarchyCheck: 432 case TypeCheckKind::kArrayObjectCheck: 433 case TypeCheckKind::kInterfaceCheck: { 434 bool needs_read_barrier = 435 kEmitCompilerReadBarrier && !check_cast->GetTargetClass()->IsInBootImage(); 436 // We do not emit read barriers for HCheckCast, so we can get false negatives 437 // and the slow path shall re-check and simply return if the cast is actually OK. 438 return !needs_read_barrier; 439 } 440 case TypeCheckKind::kArrayCheck: 441 case TypeCheckKind::kUnresolvedCheck: 442 return false; 443 case TypeCheckKind::kBitstringCheck: 444 return true; 445 } 446 LOG(FATAL) << "Unreachable"; 447 UNREACHABLE(); 448 } 449 450 static LocationSummary::CallKind GetCheckCastCallKind(HCheckCast* check_cast) { 451 return (IsTypeCheckSlowPathFatal(check_cast) && !check_cast->CanThrowIntoCatchBlock()) 452 ? LocationSummary::kNoCall // In fact, call on a fatal (non-returning) slow path. 453 : LocationSummary::kCallOnSlowPath; 454 } 455 456 static bool StoreNeedsWriteBarrier(DataType::Type type, HInstruction* value) { 457 // Check that null value is not represented as an integer constant. 458 DCHECK(type != DataType::Type::kReference || !value->IsIntConstant()); 459 return type == DataType::Type::kReference && !value->IsNullConstant(); 460 } 461 462 463 // Performs checks pertaining to an InvokeRuntime call. 464 void ValidateInvokeRuntime(QuickEntrypointEnum entrypoint, 465 HInstruction* instruction, 466 SlowPathCode* slow_path); 467 468 // Performs checks pertaining to an InvokeRuntimeWithoutRecordingPcInfo call. 469 static void ValidateInvokeRuntimeWithoutRecordingPcInfo(HInstruction* instruction, 470 SlowPathCode* slow_path); 471 472 void AddAllocatedRegister(Location location) { 473 allocated_registers_.Add(location); 474 } 475 476 bool HasAllocatedRegister(bool is_core, int reg) const { 477 return is_core 478 ? allocated_registers_.ContainsCoreRegister(reg) 479 : allocated_registers_.ContainsFloatingPointRegister(reg); 480 } 481 482 void AllocateLocations(HInstruction* instruction); 483 484 // Tells whether the stack frame of the compiled method is 485 // considered "empty", that is either actually having a size of zero, 486 // or just containing the saved return address register. 487 bool HasEmptyFrame() const { 488 return GetFrameSize() == (CallPushesPC() ? GetWordSize() : 0); 489 } 490 491 static int8_t GetInt8ValueOf(HConstant* constant) { 492 DCHECK(constant->IsIntConstant()); 493 return constant->AsIntConstant()->GetValue(); 494 } 495 496 static int16_t GetInt16ValueOf(HConstant* constant) { 497 DCHECK(constant->IsIntConstant()); 498 return constant->AsIntConstant()->GetValue(); 499 } 500 501 static int32_t GetInt32ValueOf(HConstant* constant) { 502 if (constant->IsIntConstant()) { 503 return constant->AsIntConstant()->GetValue(); 504 } else if (constant->IsNullConstant()) { 505 return 0; 506 } else { 507 DCHECK(constant->IsFloatConstant()); 508 return bit_cast<int32_t, float>(constant->AsFloatConstant()->GetValue()); 509 } 510 } 511 512 static int64_t GetInt64ValueOf(HConstant* constant) { 513 if (constant->IsIntConstant()) { 514 return constant->AsIntConstant()->GetValue(); 515 } else if (constant->IsNullConstant()) { 516 return 0; 517 } else if (constant->IsFloatConstant()) { 518 return bit_cast<int32_t, float>(constant->AsFloatConstant()->GetValue()); 519 } else if (constant->IsLongConstant()) { 520 return constant->AsLongConstant()->GetValue(); 521 } else { 522 DCHECK(constant->IsDoubleConstant()); 523 return bit_cast<int64_t, double>(constant->AsDoubleConstant()->GetValue()); 524 } 525 } 526 527 size_t GetFirstRegisterSlotInSlowPath() const { 528 return first_register_slot_in_slow_path_; 529 } 530 531 uint32_t FrameEntrySpillSize() const { 532 return GetFpuSpillSize() + GetCoreSpillSize(); 533 } 534 535 virtual ParallelMoveResolver* GetMoveResolver() = 0; 536 537 static void CreateCommonInvokeLocationSummary( 538 HInvoke* invoke, InvokeDexCallingConventionVisitor* visitor); 539 540 void GenerateInvokeStaticOrDirectRuntimeCall( 541 HInvokeStaticOrDirect* invoke, Location temp, SlowPathCode* slow_path); 542 543 void GenerateInvokeUnresolvedRuntimeCall(HInvokeUnresolved* invoke); 544 545 void GenerateInvokePolymorphicCall(HInvokePolymorphic* invoke); 546 547 void GenerateInvokeCustomCall(HInvokeCustom* invoke); 548 549 void CreateUnresolvedFieldLocationSummary( 550 HInstruction* field_access, 551 DataType::Type field_type, 552 const FieldAccessCallingConvention& calling_convention); 553 554 void GenerateUnresolvedFieldAccess( 555 HInstruction* field_access, 556 DataType::Type field_type, 557 uint32_t field_index, 558 uint32_t dex_pc, 559 const FieldAccessCallingConvention& calling_convention); 560 561 static void CreateLoadClassRuntimeCallLocationSummary(HLoadClass* cls, 562 Location runtime_type_index_location, 563 Location runtime_return_location); 564 void GenerateLoadClassRuntimeCall(HLoadClass* cls); 565 566 static void CreateLoadMethodHandleRuntimeCallLocationSummary(HLoadMethodHandle* method_handle, 567 Location runtime_handle_index_location, 568 Location runtime_return_location); 569 void GenerateLoadMethodHandleRuntimeCall(HLoadMethodHandle* method_handle); 570 571 static void CreateLoadMethodTypeRuntimeCallLocationSummary(HLoadMethodType* method_type, 572 Location runtime_type_index_location, 573 Location runtime_return_location); 574 void GenerateLoadMethodTypeRuntimeCall(HLoadMethodType* method_type); 575 576 uint32_t GetBootImageOffset(HLoadClass* load_class); 577 uint32_t GetBootImageOffset(HLoadString* load_string); 578 uint32_t GetBootImageOffset(HInvokeStaticOrDirect* invoke); 579 580 static void CreateSystemArrayCopyLocationSummary(HInvoke* invoke); 581 582 void SetDisassemblyInformation(DisassemblyInformation* info) { disasm_info_ = info; } 583 DisassemblyInformation* GetDisassemblyInformation() const { return disasm_info_; } 584 585 virtual void InvokeRuntime(QuickEntrypointEnum entrypoint, 586 HInstruction* instruction, 587 uint32_t dex_pc, 588 SlowPathCode* slow_path = nullptr) = 0; 589 590 // Check if the desired_string_load_kind is supported. If it is, return it, 591 // otherwise return a fall-back kind that should be used instead. 592 virtual HLoadString::LoadKind GetSupportedLoadStringKind( 593 HLoadString::LoadKind desired_string_load_kind) = 0; 594 595 // Check if the desired_class_load_kind is supported. If it is, return it, 596 // otherwise return a fall-back kind that should be used instead. 597 virtual HLoadClass::LoadKind GetSupportedLoadClassKind( 598 HLoadClass::LoadKind desired_class_load_kind) = 0; 599 600 static LocationSummary::CallKind GetLoadStringCallKind(HLoadString* load) { 601 switch (load->GetLoadKind()) { 602 case HLoadString::LoadKind::kBssEntry: 603 DCHECK(load->NeedsEnvironment()); 604 return LocationSummary::kCallOnSlowPath; 605 case HLoadString::LoadKind::kRuntimeCall: 606 DCHECK(load->NeedsEnvironment()); 607 return LocationSummary::kCallOnMainOnly; 608 case HLoadString::LoadKind::kJitTableAddress: 609 DCHECK(!load->NeedsEnvironment()); 610 return kEmitCompilerReadBarrier 611 ? LocationSummary::kCallOnSlowPath 612 : LocationSummary::kNoCall; 613 break; 614 default: 615 DCHECK(!load->NeedsEnvironment()); 616 return LocationSummary::kNoCall; 617 } 618 } 619 620 // Check if the desired_dispatch_info is supported. If it is, return it, 621 // otherwise return a fall-back info that should be used instead. 622 virtual HInvokeStaticOrDirect::DispatchInfo GetSupportedInvokeStaticOrDirectDispatch( 623 const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, 624 ArtMethod* method) = 0; 625 626 // Generate a call to a static or direct method. 627 virtual void GenerateStaticOrDirectCall( 628 HInvokeStaticOrDirect* invoke, Location temp, SlowPathCode* slow_path = nullptr) = 0; 629 // Generate a call to a virtual method. 630 virtual void GenerateVirtualCall( 631 HInvokeVirtual* invoke, Location temp, SlowPathCode* slow_path = nullptr) = 0; 632 633 // Copy the result of a call into the given target. 634 virtual void MoveFromReturnRegister(Location trg, DataType::Type type) = 0; 635 636 virtual void GenerateNop() = 0; 637 638 static QuickEntrypointEnum GetArrayAllocationEntrypoint(HNewArray* new_array); 639 640 protected: 641 // Patch info used for recording locations of required linker patches and their targets, 642 // i.e. target method, string, type or code identified by their dex file and index, 643 // or .data.bimg.rel.ro entries identified by the boot image offset. 644 template <typename LabelType> 645 struct PatchInfo { 646 PatchInfo(const DexFile* dex_file, uint32_t off_or_idx) 647 : target_dex_file(dex_file), offset_or_index(off_or_idx), label() { } 648 649 // Target dex file or null for .data.bmig.rel.ro patches. 650 const DexFile* target_dex_file; 651 // Either the boot image offset (to write to .data.bmig.rel.ro) or string/type/method index. 652 uint32_t offset_or_index; 653 // Label for the instruction to patch. 654 LabelType label; 655 }; 656 657 CodeGenerator(HGraph* graph, 658 size_t number_of_core_registers, 659 size_t number_of_fpu_registers, 660 size_t number_of_register_pairs, 661 uint32_t core_callee_save_mask, 662 uint32_t fpu_callee_save_mask, 663 const CompilerOptions& compiler_options, 664 OptimizingCompilerStats* stats); 665 666 virtual HGraphVisitor* GetLocationBuilder() = 0; 667 virtual HGraphVisitor* GetInstructionVisitor() = 0; 668 669 // Returns the location of the first spilled entry for floating point registers, 670 // relative to the stack pointer. 671 uint32_t GetFpuSpillStart() const { 672 return GetFrameSize() - FrameEntrySpillSize(); 673 } 674 675 uint32_t GetFpuSpillSize() const { 676 return POPCOUNT(fpu_spill_mask_) * GetFloatingPointSpillSlotSize(); 677 } 678 679 uint32_t GetCoreSpillSize() const { 680 return POPCOUNT(core_spill_mask_) * GetWordSize(); 681 } 682 683 virtual bool HasAllocatedCalleeSaveRegisters() const { 684 // We check the core registers against 1 because it always comprises the return PC. 685 return (POPCOUNT(allocated_registers_.GetCoreRegisters() & core_callee_save_mask_) != 1) 686 || (POPCOUNT(allocated_registers_.GetFloatingPointRegisters() & fpu_callee_save_mask_) != 0); 687 } 688 689 bool CallPushesPC() const { 690 InstructionSet instruction_set = GetInstructionSet(); 691 return instruction_set == InstructionSet::kX86 || instruction_set == InstructionSet::kX86_64; 692 } 693 694 // Arm64 has its own type for a label, so we need to templatize these methods 695 // to share the logic. 696 697 template <typename LabelType> 698 LabelType* CommonInitializeLabels() { 699 // We use raw array allocations instead of ArenaVector<> because Labels are 700 // non-constructible and non-movable and as such cannot be held in a vector. 701 size_t size = GetGraph()->GetBlocks().size(); 702 LabelType* labels = 703 GetGraph()->GetAllocator()->AllocArray<LabelType>(size, kArenaAllocCodeGenerator); 704 for (size_t i = 0; i != size; ++i) { 705 new(labels + i) LabelType(); 706 } 707 return labels; 708 } 709 710 template <typename LabelType> 711 LabelType* CommonGetLabelOf(LabelType* raw_pointer_to_labels_array, HBasicBlock* block) const { 712 block = FirstNonEmptyBlock(block); 713 return raw_pointer_to_labels_array + block->GetBlockId(); 714 } 715 716 SlowPathCode* GetCurrentSlowPath() { 717 return current_slow_path_; 718 } 719 720 StackMapStream* GetStackMapStream(); 721 722 void ReserveJitStringRoot(StringReference string_reference, Handle<mirror::String> string); 723 uint64_t GetJitStringRootIndex(StringReference string_reference); 724 void ReserveJitClassRoot(TypeReference type_reference, Handle<mirror::Class> klass); 725 uint64_t GetJitClassRootIndex(TypeReference type_reference); 726 727 // Emit the patches assocatied with JIT roots. Only applies to JIT compiled code. 728 virtual void EmitJitRootPatches(uint8_t* code, const uint8_t* roots_data); 729 730 // Frame size required for this method. 731 uint32_t frame_size_; 732 uint32_t core_spill_mask_; 733 uint32_t fpu_spill_mask_; 734 uint32_t first_register_slot_in_slow_path_; 735 736 // Registers that were allocated during linear scan. 737 RegisterSet allocated_registers_; 738 739 // Arrays used when doing register allocation to know which 740 // registers we can allocate. `SetupBlockedRegisters` updates the 741 // arrays. 742 bool* const blocked_core_registers_; 743 bool* const blocked_fpu_registers_; 744 size_t number_of_core_registers_; 745 size_t number_of_fpu_registers_; 746 size_t number_of_register_pairs_; 747 const uint32_t core_callee_save_mask_; 748 const uint32_t fpu_callee_save_mask_; 749 750 // The order to use for code generation. 751 const ArenaVector<HBasicBlock*>* block_order_; 752 753 DisassemblyInformation* disasm_info_; 754 755 private: 756 class CodeGenerationData; 757 758 void InitializeCodeGenerationData(); 759 size_t GetStackOffsetOfSavedRegister(size_t index); 760 void GenerateSlowPaths(); 761 void BlockIfInRegister(Location location, bool is_out = false) const; 762 void EmitEnvironment(HEnvironment* environment, SlowPathCode* slow_path); 763 764 OptimizingCompilerStats* stats_; 765 766 HGraph* const graph_; 767 const CompilerOptions& compiler_options_; 768 769 // The current slow-path that we're generating code for. 770 SlowPathCode* current_slow_path_; 771 772 // The current block index in `block_order_` of the block 773 // we are generating code for. 774 size_t current_block_index_; 775 776 // Whether the method is a leaf method. 777 bool is_leaf_; 778 779 // Whether an instruction in the graph accesses the current method. 780 // TODO: Rename: this actually indicates that some instruction in the method 781 // needs the environment including a valid stack frame. 782 bool requires_current_method_; 783 784 // The CodeGenerationData contains a ScopedArenaAllocator intended for reusing the 785 // ArenaStack memory allocated in previous passes instead of adding to the memory 786 // held by the ArenaAllocator. This ScopedArenaAllocator is created in 787 // CodeGenerator::Compile() and remains alive until the CodeGenerator is destroyed. 788 std::unique_ptr<CodeGenerationData> code_generation_data_; 789 790 friend class OptimizingCFITest; 791 792 DISALLOW_COPY_AND_ASSIGN(CodeGenerator); 793 }; 794 795 template <typename C, typename F> 796 class CallingConvention { 797 public: 798 CallingConvention(const C* registers, 799 size_t number_of_registers, 800 const F* fpu_registers, 801 size_t number_of_fpu_registers, 802 PointerSize pointer_size) 803 : registers_(registers), 804 number_of_registers_(number_of_registers), 805 fpu_registers_(fpu_registers), 806 number_of_fpu_registers_(number_of_fpu_registers), 807 pointer_size_(pointer_size) {} 808 809 size_t GetNumberOfRegisters() const { return number_of_registers_; } 810 size_t GetNumberOfFpuRegisters() const { return number_of_fpu_registers_; } 811 812 C GetRegisterAt(size_t index) const { 813 DCHECK_LT(index, number_of_registers_); 814 return registers_[index]; 815 } 816 817 F GetFpuRegisterAt(size_t index) const { 818 DCHECK_LT(index, number_of_fpu_registers_); 819 return fpu_registers_[index]; 820 } 821 822 size_t GetStackOffsetOf(size_t index) const { 823 // We still reserve the space for parameters passed by registers. 824 // Add space for the method pointer. 825 return static_cast<size_t>(pointer_size_) + index * kVRegSize; 826 } 827 828 private: 829 const C* registers_; 830 const size_t number_of_registers_; 831 const F* fpu_registers_; 832 const size_t number_of_fpu_registers_; 833 const PointerSize pointer_size_; 834 835 DISALLOW_COPY_AND_ASSIGN(CallingConvention); 836 }; 837 838 /** 839 * A templated class SlowPathGenerator with a templated method NewSlowPath() 840 * that can be used by any code generator to share equivalent slow-paths with 841 * the objective of reducing generated code size. 842 * 843 * InstructionType: instruction that requires SlowPathCodeType 844 * SlowPathCodeType: subclass of SlowPathCode, with constructor SlowPathCodeType(InstructionType *) 845 */ 846 template <typename InstructionType> 847 class SlowPathGenerator { 848 static_assert(std::is_base_of<HInstruction, InstructionType>::value, 849 "InstructionType is not a subclass of art::HInstruction"); 850 851 public: 852 SlowPathGenerator(HGraph* graph, CodeGenerator* codegen) 853 : graph_(graph), 854 codegen_(codegen), 855 slow_path_map_(std::less<uint32_t>(), 856 graph->GetAllocator()->Adapter(kArenaAllocSlowPaths)) {} 857 858 // Creates and adds a new slow-path, if needed, or returns existing one otherwise. 859 // Templating the method (rather than the whole class) on the slow-path type enables 860 // keeping this code at a generic, non architecture-specific place. 861 // 862 // NOTE: This approach assumes each InstructionType only generates one SlowPathCodeType. 863 // To relax this requirement, we would need some RTTI on the stored slow-paths, 864 // or template the class as a whole on SlowPathType. 865 template <typename SlowPathCodeType> 866 SlowPathCodeType* NewSlowPath(InstructionType* instruction) { 867 static_assert(std::is_base_of<SlowPathCode, SlowPathCodeType>::value, 868 "SlowPathCodeType is not a subclass of art::SlowPathCode"); 869 static_assert(std::is_constructible<SlowPathCodeType, InstructionType*>::value, 870 "SlowPathCodeType is not constructible from InstructionType*"); 871 // Iterate over potential candidates for sharing. Currently, only same-typed 872 // slow-paths with exactly the same dex-pc are viable candidates. 873 // TODO: pass dex-pc/slow-path-type to run-time to allow even more sharing? 874 const uint32_t dex_pc = instruction->GetDexPc(); 875 auto iter = slow_path_map_.find(dex_pc); 876 if (iter != slow_path_map_.end()) { 877 const ArenaVector<std::pair<InstructionType*, SlowPathCode*>>& candidates = iter->second; 878 for (const auto& it : candidates) { 879 InstructionType* other_instruction = it.first; 880 SlowPathCodeType* other_slow_path = down_cast<SlowPathCodeType*>(it.second); 881 // Determine if the instructions allow for slow-path sharing. 882 if (HaveSameLiveRegisters(instruction, other_instruction) && 883 HaveSameStackMap(instruction, other_instruction)) { 884 // Can share: reuse existing one. 885 return other_slow_path; 886 } 887 } 888 } else { 889 // First time this dex-pc is seen. 890 iter = slow_path_map_.Put(dex_pc, 891 {{}, {graph_->GetAllocator()->Adapter(kArenaAllocSlowPaths)}}); 892 } 893 // Cannot share: create and add new slow-path for this particular dex-pc. 894 SlowPathCodeType* slow_path = 895 new (codegen_->GetScopedAllocator()) SlowPathCodeType(instruction); 896 iter->second.emplace_back(std::make_pair(instruction, slow_path)); 897 codegen_->AddSlowPath(slow_path); 898 return slow_path; 899 } 900 901 private: 902 // Tests if both instructions have same set of live physical registers. This ensures 903 // the slow-path has exactly the same preamble on saving these registers to stack. 904 bool HaveSameLiveRegisters(const InstructionType* i1, const InstructionType* i2) const { 905 const uint32_t core_spill = ~codegen_->GetCoreSpillMask(); 906 const uint32_t fpu_spill = ~codegen_->GetFpuSpillMask(); 907 RegisterSet* live1 = i1->GetLocations()->GetLiveRegisters(); 908 RegisterSet* live2 = i2->GetLocations()->GetLiveRegisters(); 909 return (((live1->GetCoreRegisters() & core_spill) == 910 (live2->GetCoreRegisters() & core_spill)) && 911 ((live1->GetFloatingPointRegisters() & fpu_spill) == 912 (live2->GetFloatingPointRegisters() & fpu_spill))); 913 } 914 915 // Tests if both instructions have the same stack map. This ensures the interpreter 916 // will find exactly the same dex-registers at the same entries. 917 bool HaveSameStackMap(const InstructionType* i1, const InstructionType* i2) const { 918 DCHECK(i1->HasEnvironment()); 919 DCHECK(i2->HasEnvironment()); 920 // We conservatively test if the two instructions find exactly the same instructions 921 // and location in each dex-register. This guarantees they will have the same stack map. 922 HEnvironment* e1 = i1->GetEnvironment(); 923 HEnvironment* e2 = i2->GetEnvironment(); 924 if (e1->GetParent() != e2->GetParent() || e1->Size() != e2->Size()) { 925 return false; 926 } 927 for (size_t i = 0, sz = e1->Size(); i < sz; ++i) { 928 if (e1->GetInstructionAt(i) != e2->GetInstructionAt(i) || 929 !e1->GetLocationAt(i).Equals(e2->GetLocationAt(i))) { 930 return false; 931 } 932 } 933 return true; 934 } 935 936 HGraph* const graph_; 937 CodeGenerator* const codegen_; 938 939 // Map from dex-pc to vector of already existing instruction/slow-path pairs. 940 ArenaSafeMap<uint32_t, ArenaVector<std::pair<InstructionType*, SlowPathCode*>>> slow_path_map_; 941 942 DISALLOW_COPY_AND_ASSIGN(SlowPathGenerator); 943 }; 944 945 class InstructionCodeGenerator : public HGraphVisitor { 946 public: 947 InstructionCodeGenerator(HGraph* graph, CodeGenerator* codegen) 948 : HGraphVisitor(graph), 949 deopt_slow_paths_(graph, codegen) {} 950 951 protected: 952 // Add slow-path generator for each instruction/slow-path combination that desires sharing. 953 // TODO: under current regime, only deopt sharing make sense; extend later. 954 SlowPathGenerator<HDeoptimize> deopt_slow_paths_; 955 }; 956 957 } // namespace art 958 959 #endif // ART_COMPILER_OPTIMIZING_CODE_GENERATOR_H_ 960