1 /** @file 2 * 3 * Copyright (c) 2016-2017, Linaro Ltd. All rights reserved. 4 * 5 * This program and the accompanying materials 6 * are licensed and made available under the terms and conditions of the BSD License 7 * which accompanies this distribution. The full text of the license may be found at 8 * http://opensource.org/licenses/bsd-license.php 9 * 10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 * 13 **/ 14 15 #ifndef __HKADC_H__ 16 #define __HKADC_H__ 17 18 #include <Hi3660.h> 19 20 #define HKADC_DSP_START (HKADC_SSI_REG_BASE + 0x000) 21 #define HKADC_WR_NUM (HKADC_SSI_REG_BASE + 0x008) 22 #define HKADC_DSP_START_CLR (HKADC_SSI_REG_BASE + 0x01C) 23 #define HKADC_WR01_DATA (HKADC_SSI_REG_BASE + 0x020) 24 25 #define WR1_WRITE_MODE BIT31 26 #define WR1_READ_MODE (0 << 31) 27 #define WR1_ADDR(x) (((x) & 0x7F) << 24) 28 #define WR1_DATA(x) (((x) & 0xFF) << 16) 29 #define WR0_WRITE_MODE BIT15 30 #define WR0_READ_MODE (0 << 15) 31 #define WR0_ADDR(x) (((x) & 0x7F) << 8) 32 #define WR0_DATA(x) ((x) & 0xFF) 33 34 #define HKADC_WR23_DATA (HKADC_SSI_REG_BASE + 0x024) 35 #define HKADC_WR45_DATA (HKADC_SSI_REG_BASE + 0x028) 36 #define HKADC_DELAY01 (HKADC_SSI_REG_BASE + 0x030) 37 #define HKADC_DELAY23 (HKADC_SSI_REG_BASE + 0x034) 38 #define HKADC_DELAY45 (HKADC_SSI_REG_BASE + 0x038) 39 #define HKADC_DSP_RD2_DATA (HKADC_SSI_REG_BASE + 0x048) 40 #define HKADC_DSP_RD3_DATA (HKADC_SSI_REG_BASE + 0x04C) 41 42 // HKADC Internal Registers 43 #define HKADC_CTRL_ADDR 0x00 44 #define HKADC_START_ADDR 0x01 45 #define HKADC_DATA1_ADDR 0x03 // high 8 bits 46 #define HKADC_DATA0_ADDR 0x04 // low 8 bits 47 #define HKADC_MODE_CFG 0x0A 48 49 #define HKADC_VALUE_HIGH 0x0FF0 50 #define HKADC_VALUE_LOW 0x000F 51 #define HKADC_VALID_VALUE 0x0FFF 52 53 #define HKADC_CHANNEL_MAX 15 54 #define HKADC_VREF_1V8 1800 55 #define HKADC_ACCURACY 0x0FFF 56 57 #define HKADC_WR01_VALUE ((HKADC_START_ADDR << 24) | (0x1 << 16)) 58 #define HKADC_WR23_VALUE ((0x1 << 31) | (HKADC_DATA0_ADDR << 24) | (1 << 15) | (HKADC_DATA1_ADDR << 8)) 59 #define HKADC_WR45_VALUE (0x80) 60 #define HKADC_CHANNEL0_DELAY01_VALUE ((0x0700 << 16) | 0xFFFF) 61 #define HKADC_DELAY01_VALUE ((0x0700 << 16) | 0x0200) 62 #define HKADC_DELAY23_VALUE ((0x00C8 << 16) | 0x00C8) 63 #define START_DELAY_TIMEOUT 2000 64 #define HKADC_WR_NUM_VALUE 4 65 66 #endif /* __HKADC_H__ */ 67
