1 /* 2 * Copyright 2006 Freescale Semiconductor. 3 * Jeffrey Brown 4 * Srikanth Srinivasan (srikanth.srinivasan (at) freescale.com) 5 */ 6 7 #ifndef __MPC86xx_H__ 8 #define __MPC86xx_H__ 9 10 #include <asm/fsl_lbc.h> 11 12 #define EXC_OFF_SYS_RESET 0x0100 /* System reset offset */ 13 #define _START_OFFSET EXC_OFF_SYS_RESET 14 15 /* 16 * platform register addresses 17 */ 18 19 #define GUTS_SVR (CONFIG_SYS_CCSRBAR + 0xE00A4) 20 #define MCM_ABCR (CONFIG_SYS_CCSRBAR + 0x01000) 21 #define MCM_DBCR (CONFIG_SYS_CCSRBAR + 0x01008) 22 23 /* 24 * l2cr values. Look in config_<BOARD>.h for the actual setup 25 */ 26 #define l2cr 1017 27 28 #define L2CR_L2E 0x80000000 /* bit 0 - enable */ 29 #define L2CR_L2PE 0x40000000 /* bit 1 - data parity */ 30 #define L2CR_L2I 0x00200000 /* bit 10 - global invalidate bit */ 31 #define L2CR_L2CTL 0x00100000 /* bit 11 - l2 ram control */ 32 #define L2CR_L2DO 0x00010000 /* bit 15 - data-only mode */ 33 #define L2CR_REP 0x00001000 /* bit 19 - l2 replacement alg */ 34 #define L2CR_HWF 0x00000800 /* bit 20 - hardware flush */ 35 #define L2CR_L2IP 0x00000001 /* global invalidate in progress */ 36 37 #define HID0_XBSEN 0x00000100 38 #define HID0_HIGH_BAT_EN 0x00800000 39 #define HID0_XAEN 0x00020000 40 41 #ifndef __ASSEMBLY__ 42 43 typedef struct { 44 unsigned long freq_processor; 45 unsigned long freq_systembus; 46 unsigned long freq_localbus; 47 } MPC86xx_SYS_INFO; 48 49 #define l1icache_enable icache_enable 50 51 void l2cache_enable(void); 52 void l1dcache_enable(void); 53 54 static __inline__ unsigned long get_hid0 (void) 55 { 56 unsigned long hid0; 57 asm volatile("mfspr %0, 1008" : "=r" (hid0) :); 58 return hid0; 59 } 60 61 static __inline__ unsigned long get_hid1 (void) 62 { 63 unsigned long hid1; 64 asm volatile("mfspr %0, 1009" : "=r" (hid1) :); 65 return hid1; 66 } 67 68 static __inline__ void set_hid0 (unsigned long hid0) 69 { 70 asm volatile("mtspr 1008, %0" : : "r" (hid0)); 71 } 72 73 static __inline__ void set_hid1 (unsigned long hid1) 74 { 75 asm volatile("mtspr 1009, %0" : : "r" (hid1)); 76 } 77 78 79 static __inline__ unsigned long get_l2cr (void) 80 { 81 unsigned long l2cr_val; 82 asm volatile("mfspr %0, 1017" : "=r" (l2cr_val) :); 83 return l2cr_val; 84 } 85 86 void setup_ddr_bat(phys_addr_t dram_size); 87 extern void setup_bats(void); 88 89 #endif /* _ASMLANGUAGE */ 90 #endif /* __MPC86xx_H__ */ 91
