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      1 /*
      2  * Copyright  2008-2012 Intel Corporation
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the "Software"),
      6  * to deal in the Software without restriction, including without limitation
      7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8  * and/or sell copies of the Software, and to permit persons to whom the
      9  * Software is furnished to do so, subject to the following conditions:
     10  *
     11  * The above copyright notice and this permission notice (including the next
     12  * paragraph) shall be included in all copies or substantial portions of the
     13  * Software.
     14  *
     15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
     21  * IN THE SOFTWARE.
     22  *
     23  * Authors:
     24  *    Eric Anholt <eric (at) anholt.net>
     25  *
     26  */
     27 
     28 /**
     29  * @file brw_bufmgr.h
     30  *
     31  * Public definitions of Intel-specific bufmgr functions.
     32  */
     33 
     34 #ifndef INTEL_BUFMGR_H
     35 #define INTEL_BUFMGR_H
     36 
     37 #include <stdbool.h>
     38 #include <stdint.h>
     39 #include <stdio.h>
     40 #include "util/u_atomic.h"
     41 #include "util/list.h"
     42 
     43 #if defined(__cplusplus)
     44 extern "C" {
     45 #endif
     46 
     47 struct gen_device_info;
     48 struct brw_context;
     49 
     50 struct brw_bo {
     51    /**
     52     * Size in bytes of the buffer object.
     53     *
     54     * The size may be larger than the size originally requested for the
     55     * allocation, such as being aligned to page size.
     56     */
     57    uint64_t size;
     58 
     59    /**
     60     * Alignment requirement for object
     61     *
     62     * Used for GTT mapping & pinning the object.
     63     */
     64    uint64_t align;
     65 
     66    /** Buffer manager context associated with this buffer object */
     67    struct brw_bufmgr *bufmgr;
     68 
     69    /** The GEM handle for this buffer object. */
     70    uint32_t gem_handle;
     71 
     72    /**
     73     * Offset of the buffer inside the Graphics Translation Table.
     74     *
     75     * This is effectively our GPU address for the buffer and we use it
     76     * as our base for all state pointers into the buffer. However, since the
     77     * kernel may be forced to move it around during the course of the
     78     * buffer's lifetime, we can only know where the buffer was on the last
     79     * execbuf. We presume, and are usually right, that the buffer will not
     80     * move and so we use that last offset for the next batch and by doing
     81     * so we can avoid having the kernel perform a relocation fixup pass as
     82     * our pointers inside the batch will be using the correct base offset.
     83     *
     84     * Since we do use it as a base address for the next batch of pointers,
     85     * the kernel treats our offset as a request, and if possible will
     86     * arrange the buffer to placed at that address (trying to balance
     87     * the cost of buffer migration versus the cost of performing
     88     * relocations). Furthermore, we can force the kernel to place the buffer,
     89     * or report a failure if we specified a conflicting offset, at our chosen
     90     * offset by specifying EXEC_OBJECT_PINNED.
     91     *
     92     * Note the GTT may be either per context, or shared globally across the
     93     * system. On a shared system, our buffers have to contend for address
     94     * space with both aperture mappings and framebuffers and so are more
     95     * likely to be moved. On a full ppGTT system, each batch exists in its
     96     * own GTT, and so each buffer may have their own offset within each
     97     * context.
     98     */
     99    uint64_t gtt_offset;
    100 
    101    /**
    102     * The validation list index for this buffer, or -1 when not in a batch.
    103     * Note that a single buffer may be in multiple batches (contexts), and
    104     * this is a global field, which refers to the last batch using the BO.
    105     * It should not be considered authoritative, but can be used to avoid a
    106     * linear walk of the validation list in the common case by guessing that
    107     * exec_bos[bo->index] == bo and confirming whether that's the case.
    108     */
    109    unsigned index;
    110 
    111    /**
    112     * Boolean of whether the GPU is definitely not accessing the buffer.
    113     *
    114     * This is only valid when reusable, since non-reusable
    115     * buffers are those that have been shared with other
    116     * processes, so we don't know their state.
    117     */
    118    bool idle;
    119 
    120    int refcount;
    121    const char *name;
    122 
    123 #ifndef EXEC_OBJECT_CAPTURE
    124 #define EXEC_OBJECT_CAPTURE            (1<<7)
    125 #endif
    126    uint64_t kflags;
    127 
    128    /**
    129     * Kenel-assigned global name for this object
    130     *
    131     * List contains both flink named and prime fd'd objects
    132     */
    133    unsigned int global_name;
    134 
    135    /**
    136     * Current tiling mode
    137     */
    138    uint32_t tiling_mode;
    139    uint32_t swizzle_mode;
    140    uint32_t stride;
    141 
    142    time_t free_time;
    143 
    144    /** Mapped address for the buffer, saved across map/unmap cycles */
    145    void *map_cpu;
    146    /** GTT virtual address for the buffer, saved across map/unmap cycles */
    147    void *map_gtt;
    148    /** WC CPU address for the buffer, saved across map/unmap cycles */
    149    void *map_wc;
    150 
    151    /** BO cache list */
    152    struct list_head head;
    153 
    154    /**
    155     * Boolean of whether this buffer can be re-used
    156     */
    157    bool reusable;
    158 
    159    /**
    160     * Boolean of whether this buffer has been shared with an external client.
    161     */
    162    bool external;
    163 
    164    /**
    165     * Boolean of whether this buffer is cache coherent
    166     */
    167    bool cache_coherent;
    168 };
    169 
    170 #define BO_ALLOC_BUSY       (1<<0)
    171 #define BO_ALLOC_ZEROED     (1<<1)
    172 
    173 /**
    174  * Allocate a buffer object.
    175  *
    176  * Buffer objects are not necessarily initially mapped into CPU virtual
    177  * address space or graphics device aperture.  They must be mapped
    178  * using brw_bo_map() to be used by the CPU.
    179  */
    180 struct brw_bo *brw_bo_alloc(struct brw_bufmgr *bufmgr, const char *name,
    181                             uint64_t size, uint64_t alignment);
    182 
    183 /**
    184  * Allocate a tiled buffer object.
    185  *
    186  * Alignment for tiled objects is set automatically; the 'flags'
    187  * argument provides a hint about how the object will be used initially.
    188  *
    189  * Valid tiling formats are:
    190  *  I915_TILING_NONE
    191  *  I915_TILING_X
    192  *  I915_TILING_Y
    193  */
    194 struct brw_bo *brw_bo_alloc_tiled(struct brw_bufmgr *bufmgr,
    195                                   const char *name,
    196                                   uint64_t size,
    197                                   uint32_t tiling_mode,
    198                                   uint32_t pitch,
    199                                   unsigned flags);
    200 
    201 /**
    202  * Allocate a tiled buffer object.
    203  *
    204  * Alignment for tiled objects is set automatically; the 'flags'
    205  * argument provides a hint about how the object will be used initially.
    206  *
    207  * Valid tiling formats are:
    208  *  I915_TILING_NONE
    209  *  I915_TILING_X
    210  *  I915_TILING_Y
    211  *
    212  * Note the tiling format may be rejected; callers should check the
    213  * 'tiling_mode' field on return, as well as the pitch value, which
    214  * may have been rounded up to accommodate for tiling restrictions.
    215  */
    216 struct brw_bo *brw_bo_alloc_tiled_2d(struct brw_bufmgr *bufmgr,
    217                                      const char *name,
    218                                      int x, int y, int cpp,
    219                                      uint32_t tiling_mode,
    220                                      uint32_t *pitch,
    221                                      unsigned flags);
    222 
    223 /** Takes a reference on a buffer object */
    224 static inline void
    225 brw_bo_reference(struct brw_bo *bo)
    226 {
    227    p_atomic_inc(&bo->refcount);
    228 }
    229 
    230 /**
    231  * Releases a reference on a buffer object, freeing the data if
    232  * no references remain.
    233  */
    234 void brw_bo_unreference(struct brw_bo *bo);
    235 
    236 /* Must match MapBufferRange interface (for convenience) */
    237 #define MAP_READ        GL_MAP_READ_BIT
    238 #define MAP_WRITE       GL_MAP_WRITE_BIT
    239 #define MAP_ASYNC       GL_MAP_UNSYNCHRONIZED_BIT
    240 #define MAP_PERSISTENT  GL_MAP_PERSISTENT_BIT
    241 #define MAP_COHERENT    GL_MAP_COHERENT_BIT
    242 /* internal */
    243 #define MAP_INTERNAL_MASK       (0xff << 24)
    244 #define MAP_RAW                 (0x01 << 24)
    245 
    246 /**
    247  * Maps the buffer into userspace.
    248  *
    249  * This function will block waiting for any existing execution on the
    250  * buffer to complete, first.  The resulting mapping is returned.
    251  */
    252 MUST_CHECK void *brw_bo_map(struct brw_context *brw, struct brw_bo *bo, unsigned flags);
    253 
    254 /**
    255  * Reduces the refcount on the userspace mapping of the buffer
    256  * object.
    257  */
    258 static inline int brw_bo_unmap(struct brw_bo *bo) { return 0; }
    259 
    260 /** Write data into an object. */
    261 int brw_bo_subdata(struct brw_bo *bo, uint64_t offset,
    262                    uint64_t size, const void *data);
    263 /**
    264  * Waits for rendering to an object by the GPU to have completed.
    265  *
    266  * This is not required for any access to the BO by bo_map,
    267  * bo_subdata, etc.  It is merely a way for the driver to implement
    268  * glFinish.
    269  */
    270 void brw_bo_wait_rendering(struct brw_bo *bo);
    271 
    272 /**
    273  * Tears down the buffer manager instance.
    274  */
    275 void brw_bufmgr_destroy(struct brw_bufmgr *bufmgr);
    276 
    277 /**
    278  * Get the current tiling (and resulting swizzling) mode for the bo.
    279  *
    280  * \param buf Buffer to get tiling mode for
    281  * \param tiling_mode returned tiling mode
    282  * \param swizzle_mode returned swizzling mode
    283  */
    284 int brw_bo_get_tiling(struct brw_bo *bo, uint32_t *tiling_mode,
    285                       uint32_t *swizzle_mode);
    286 
    287 /**
    288  * Create a visible name for a buffer which can be used by other apps
    289  *
    290  * \param buf Buffer to create a name for
    291  * \param name Returned name
    292  */
    293 int brw_bo_flink(struct brw_bo *bo, uint32_t *name);
    294 
    295 /**
    296  * Returns 1 if mapping the buffer for write could cause the process
    297  * to block, due to the object being active in the GPU.
    298  */
    299 int brw_bo_busy(struct brw_bo *bo);
    300 
    301 /**
    302  * Specify the volatility of the buffer.
    303  * \param bo Buffer to create a name for
    304  * \param madv The purgeable status
    305  *
    306  * Use I915_MADV_DONTNEED to mark the buffer as purgeable, and it will be
    307  * reclaimed under memory pressure. If you subsequently require the buffer,
    308  * then you must pass I915_MADV_WILLNEED to mark the buffer as required.
    309  *
    310  * Returns 1 if the buffer was retained, or 0 if it was discarded whilst
    311  * marked as I915_MADV_DONTNEED.
    312  */
    313 int brw_bo_madvise(struct brw_bo *bo, int madv);
    314 
    315 /* drm_bacon_bufmgr_gem.c */
    316 struct brw_bufmgr *brw_bufmgr_init(struct gen_device_info *devinfo, int fd);
    317 struct brw_bo *brw_bo_gem_create_from_name(struct brw_bufmgr *bufmgr,
    318                                            const char *name,
    319                                            unsigned int handle);
    320 void brw_bufmgr_enable_reuse(struct brw_bufmgr *bufmgr);
    321 
    322 int brw_bo_wait(struct brw_bo *bo, int64_t timeout_ns);
    323 
    324 uint32_t brw_create_hw_context(struct brw_bufmgr *bufmgr);
    325 
    326 #define BRW_CONTEXT_LOW_PRIORITY ((I915_CONTEXT_MIN_USER_PRIORITY-1)/2)
    327 #define BRW_CONTEXT_MEDIUM_PRIORITY (I915_CONTEXT_DEFAULT_PRIORITY)
    328 #define BRW_CONTEXT_HIGH_PRIORITY ((I915_CONTEXT_MAX_USER_PRIORITY+1)/2)
    329 
    330 int brw_hw_context_set_priority(struct brw_bufmgr *bufmgr,
    331                                 uint32_t ctx_id,
    332                                 int priority);
    333 
    334 void brw_destroy_hw_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id);
    335 
    336 int brw_bo_gem_export_to_prime(struct brw_bo *bo, int *prime_fd);
    337 struct brw_bo *brw_bo_gem_create_from_prime(struct brw_bufmgr *bufmgr,
    338                                             int prime_fd);
    339 struct brw_bo *brw_bo_gem_create_from_prime_tiled(struct brw_bufmgr *bufmgr,
    340                                                   int prime_fd,
    341                                                   uint32_t tiling_mode,
    342                                                   uint32_t stride);
    343 
    344 uint32_t brw_bo_export_gem_handle(struct brw_bo *bo);
    345 
    346 int brw_reg_read(struct brw_bufmgr *bufmgr, uint32_t offset,
    347                  uint64_t *result);
    348 
    349 /** @{ */
    350 
    351 #if defined(__cplusplus)
    352 }
    353 #endif
    354 #endif /* INTEL_BUFMGR_H */
    355