1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Freescale i.MX23/i.MX28 Clock 4 * 5 * Copyright (C) 2011 Marek Vasut <marek.vasut (at) gmail.com> 6 * on behalf of DENX Software Engineering GmbH 7 */ 8 9 #ifndef __CLOCK_H__ 10 #define __CLOCK_H__ 11 12 enum mxc_clock { 13 MXC_ARM_CLK = 0, 14 MXC_AHB_CLK, 15 MXC_IPG_CLK, 16 MXC_EMI_CLK, 17 MXC_GPMI_CLK, 18 MXC_IO0_CLK, 19 MXC_IO1_CLK, 20 MXC_XTAL_CLK, 21 MXC_SSP0_CLK, 22 #ifdef CONFIG_MX28 23 MXC_SSP1_CLK, 24 MXC_SSP2_CLK, 25 MXC_SSP3_CLK, 26 #endif 27 }; 28 29 enum mxs_ioclock { 30 MXC_IOCLK0 = 0, 31 MXC_IOCLK1, 32 }; 33 34 enum mxs_sspclock { 35 MXC_SSPCLK0 = 0, 36 #ifdef CONFIG_MX28 37 MXC_SSPCLK1, 38 MXC_SSPCLK2, 39 MXC_SSPCLK3, 40 #endif 41 }; 42 43 uint32_t mxc_get_clock(enum mxc_clock clk); 44 45 void mxs_set_ioclk(enum mxs_ioclock io, uint32_t freq); 46 void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal); 47 void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq); 48 void mxs_set_lcdclk(uint32_t __maybe_unused lcd_base, uint32_t freq); 49 50 /* Compatibility with the FEC Ethernet driver */ 51 #define imx_get_fecclk() mxc_get_clock(MXC_AHB_CLK) 52 53 #endif /* __CLOCK_H__ */ 54
