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    Searched defs:NumLanes (Results 1 - 17 of 17) sorted by null

  /external/swiftshader/third_party/LLVM/lib/Target/X86/Utils/
X86ShuffleDecode.cpp 172 unsigned NumLanes = VT.getSizeInBits() / 128;
173 if (NumLanes == 0 ) NumLanes = 1; // Handle MMX
174 unsigned NumLaneElts = NumElts / NumLanes;
178 for (unsigned s = 0; s < NumLanes; ++s) {
195 unsigned NumLanes = (NumElts*32)/128;
196 unsigned LaneSize = NumElts/NumLanes;
198 for (unsigned l = 0; l != NumLanes; ++l) {
212 unsigned NumLanes = (NumElts*64)/128;
213 unsigned LaneSize = NumElts/NumLanes;
    [all...]
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
SIMachineFunctionInfo.cpp 266 int NumLanes = Size / 4;
272 for (int I = 0; I < NumLanes; ++I, ++NumVGPRSpillLanes) {
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/Utils/
X86ShuffleDecode.cpp 151 unsigned NumLanes = Size / 128;
152 if (NumLanes == 0) NumLanes = 1; // Handle MMX
153 unsigned NumLaneElts = NumElts / NumLanes;
228 unsigned NumLanes = (NumElts * ScalarBits) / 128;
229 if (NumLanes == 0) NumLanes = 1; // Handle MMX
230 unsigned NumLaneElts = NumElts / NumLanes;
247 unsigned NumLanes = (NumElts * ScalarBits) / 128;
248 if (NumLanes == 0 ) NumLanes = 1; // Handle MM
    [all...]
  /external/llvm/lib/Target/X86/Utils/
X86ShuffleDecode.cpp 97 unsigned NumLanes = VectorSizeInBits / 128;
98 unsigned NumLaneElts = NumElts / NumLanes;
110 unsigned NumLanes = VectorSizeInBits / 128;
111 unsigned NumLaneElts = NumElts / NumLanes;
124 unsigned NumLanes = VectorSizeInBits / 128;
125 unsigned NumLaneElts = NumElts / NumLanes;
141 unsigned NumLanes = VT.getSizeInBits() / 128;
142 unsigned NumLaneElts = NumElts / NumLanes;
160 unsigned NumLanes = VT.getSizeInBits() / 128;
161 if (NumLanes == 0) NumLanes = 1; // Handle MM
    [all...]
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
X86InterleavedAccess.cpp 473 unsigned NumLanes = std::max((int)VT.getSizeInBits() / 128, 1);
474 unsigned NumLaneElts = NumElts / NumLanes;
    [all...]
X86MCInstLower.cpp     [all...]
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/
InstCombineSimplifyDemanded.cpp     [all...]
InstCombineCalls.cpp 514 unsigned NumLanes = ResTy->getPrimitiveSizeInBits() / 128;
519 unsigned NumDstEltsPerLane = NumDstElts / NumLanes;
520 unsigned NumSrcEltsPerLane = NumSrcElts / NumLanes;
532 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) {
    [all...]
  /external/v8/src/compiler/
simd-scalar-lowering.cc 326 int SimdScalarLowering::NumLanes(SimdType type) {
344 int num_lanes = NumLanes(type);
376 int num_lanes = NumLanes(type);
439 int num_lanes = NumLanes(rep_type);
479 int num_lanes = NumLanes(input_rep_type);
501 int num_lanes = NumLanes(input_rep_type);
539 int num_lanes = NumLanes(input_rep_type);
603 int num_lanes = NumLanes(input_rep_type);
628 int num_lanes = NumLanes(input_rep_type);
641 int num_lanes = NumLanes(type)
    [all...]
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/IR/
AutoUpgrade.cpp     [all...]
  /external/clang/utils/TableGen/
NeonEmitter.cpp 707 unsigned NumLanes;
708 Name.substr(0, I).getAsInteger(10, NumLanes);
710 T.Bitwidth = T.ElementBitwidth * NumLanes;
    [all...]
  /external/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp     [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/X86/
X86ISelLowering.cpp     [all...]
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp     [all...]
  /external/llvm/lib/Target/ARM/
ARMISelLowering.cpp     [all...]
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
ARMISelLowering.cpp     [all...]
  /external/llvm/lib/Target/X86/
X86ISelLowering.cpp     [all...]

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