1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2013-2015 4 * NVIDIA Corporation <www.nvidia.com> 5 */ 6 7 /* Tegra210 clock PLL tables */ 8 9 #ifndef _TEGRA210_CLOCK_TABLES_H_ 10 #define _TEGRA210_CLOCK_TABLES_H_ 11 12 /* The PLLs supported by the hardware */ 13 enum clock_id { 14 CLOCK_ID_FIRST, 15 CLOCK_ID_CGENERAL = CLOCK_ID_FIRST, 16 CLOCK_ID_MEMORY, 17 CLOCK_ID_PERIPH, 18 CLOCK_ID_AUDIO, 19 CLOCK_ID_USB, 20 CLOCK_ID_DISPLAY, 21 22 /* now the simple ones */ 23 CLOCK_ID_FIRST_SIMPLE, 24 CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE, 25 CLOCK_ID_EPCI, 26 CLOCK_ID_SFROM32KHZ, 27 CLOCK_ID_DP, 28 29 /* These are the base clocks (inputs to the Tegra SoC) */ 30 CLOCK_ID_32KHZ, 31 CLOCK_ID_OSC, 32 CLOCK_ID_CLK_M, 33 34 CLOCK_ID_COUNT, /* number of PLLs */ 35 36 /* 37 * These are clock IDs that are used in table clock_source[][] 38 * but will not be assigned as a clock source for any peripheral. 39 */ 40 CLOCK_ID_DISPLAY2, 41 CLOCK_ID_CGENERAL_0, 42 CLOCK_ID_CGENERAL_1, 43 CLOCK_ID_CGENERAL2, 44 CLOCK_ID_CGENERAL3, 45 CLOCK_ID_CGENERAL4_0, 46 CLOCK_ID_CGENERAL4_1, 47 CLOCK_ID_CGENERAL4_2, 48 CLOCK_ID_MEMORY2, 49 CLOCK_ID_SRC2, 50 51 CLOCK_ID_NONE = -1, 52 }; 53 54 /* The clocks supported by the hardware */ 55 enum periph_id { 56 PERIPH_ID_FIRST, 57 58 /* Low word: 31:0 (DEVICES_L) */ 59 PERIPH_ID_CPU = PERIPH_ID_FIRST, 60 PERIPH_ID_COP, 61 PERIPH_ID_TRIGSYS, 62 PERIPH_ID_ISPB, 63 PERIPH_ID_RESERVED4, 64 PERIPH_ID_TMR, 65 PERIPH_ID_UART1, 66 PERIPH_ID_UART2, 67 68 /* 8 */ 69 PERIPH_ID_GPIO, 70 PERIPH_ID_SDMMC2, 71 PERIPH_ID_SPDIF, 72 PERIPH_ID_I2S2, 73 PERIPH_ID_I2C1, 74 PERIPH_ID_RESERVED13, 75 PERIPH_ID_SDMMC1, 76 PERIPH_ID_SDMMC4, 77 78 /* 16 */ 79 PERIPH_ID_TCW, 80 PERIPH_ID_PWM, 81 PERIPH_ID_I2S3, 82 PERIPH_ID_RESERVED19, 83 PERIPH_ID_VI, 84 PERIPH_ID_RESERVED21, 85 PERIPH_ID_USBD, 86 PERIPH_ID_ISP, 87 88 /* 24 */ 89 PERIPH_ID_RESERVED24, 90 PERIPH_ID_RESERVED25, 91 PERIPH_ID_DISP2, 92 PERIPH_ID_DISP1, 93 PERIPH_ID_HOST1X, 94 PERIPH_ID_VCP, 95 PERIPH_ID_I2S1, 96 PERIPH_ID_CACHE2, 97 98 /* Middle word: 63:32 (DEVICES_H) */ 99 PERIPH_ID_MEM, 100 PERIPH_ID_AHBDMA, 101 PERIPH_ID_APBDMA, 102 PERIPH_ID_RESERVED35, 103 PERIPH_ID_RESERVED36, 104 PERIPH_ID_STAT_MON, 105 PERIPH_ID_RESERVED38, 106 PERIPH_ID_FUSE, 107 108 /* 40 */ 109 PERIPH_ID_KFUSE, 110 PERIPH_ID_SBC1, 111 PERIPH_ID_SNOR, 112 PERIPH_ID_RESERVED43, 113 PERIPH_ID_SBC2, 114 PERIPH_ID_XIO, 115 PERIPH_ID_SBC3, 116 PERIPH_ID_I2C5, 117 118 /* 48 */ 119 PERIPH_ID_DSI, 120 PERIPH_ID_RESERVED49, 121 PERIPH_ID_HSI, 122 PERIPH_ID_HDMI, 123 PERIPH_ID_CSI, 124 PERIPH_ID_RESERVED53, 125 PERIPH_ID_I2C2, 126 PERIPH_ID_UART3, 127 128 /* 56 */ 129 PERIPH_ID_MIPI_CAL, 130 PERIPH_ID_EMC, 131 PERIPH_ID_USB2, 132 PERIPH_ID_USB3, 133 PERIPH_ID_RESERVED60, 134 PERIPH_ID_VDE, 135 PERIPH_ID_BSEA, 136 PERIPH_ID_BSEV, 137 138 /* Upper word 95:64 (DEVICES_U) */ 139 PERIPH_ID_RESERVED64, 140 PERIPH_ID_UART4, 141 PERIPH_ID_UART5, 142 PERIPH_ID_I2C3, 143 PERIPH_ID_SBC4, 144 PERIPH_ID_SDMMC3, 145 PERIPH_ID_PCIE, 146 PERIPH_ID_OWR, 147 148 /* 72 */ 149 PERIPH_ID_AFI, 150 PERIPH_ID_CORESIGHT, 151 PERIPH_ID_PCIEXCLK, 152 PERIPH_ID_AVPUCQ, 153 PERIPH_ID_LA, 154 PERIPH_ID_TRACECLKIN, 155 PERIPH_ID_SOC_THERM, 156 PERIPH_ID_DTV, 157 158 /* 80 */ 159 PERIPH_ID_RESERVED80, 160 PERIPH_ID_I2CSLOW, 161 PERIPH_ID_DSIB, 162 PERIPH_ID_TSEC, 163 PERIPH_ID_RESERVED84, 164 PERIPH_ID_RESERVED85, 165 PERIPH_ID_RESERVED86, 166 PERIPH_ID_EMUCIF, 167 168 /* 88 */ 169 PERIPH_ID_RESERVED88, 170 PERIPH_ID_XUSB_HOST, 171 PERIPH_ID_RESERVED90, 172 PERIPH_ID_MSENC, 173 PERIPH_ID_RESERVED92, 174 PERIPH_ID_RESERVED93, 175 PERIPH_ID_RESERVED94, 176 PERIPH_ID_XUSB_DEV, 177 178 PERIPH_ID_VW_FIRST, 179 /* V word: 31:0 */ 180 PERIPH_ID_CPUG = PERIPH_ID_VW_FIRST, 181 PERIPH_ID_CPULP, 182 PERIPH_ID_V_RESERVED2, 183 PERIPH_ID_MSELECT, 184 PERIPH_ID_V_RESERVED4, 185 PERIPH_ID_I2S4, 186 PERIPH_ID_I2S5, 187 PERIPH_ID_I2C4, 188 189 /* 104 */ 190 PERIPH_ID_SBC5, 191 PERIPH_ID_SBC6, 192 PERIPH_ID_AHUB, 193 PERIPH_ID_APB2APE, 194 PERIPH_ID_V_RESERVED12, 195 PERIPH_ID_V_RESERVED13, 196 PERIPH_ID_V_RESERVED14, 197 PERIPH_ID_HDA2CODEC2X, 198 199 /* 112 */ 200 PERIPH_ID_ATOMICS, 201 PERIPH_ID_V_RESERVED17, 202 PERIPH_ID_V_RESERVED18, 203 PERIPH_ID_V_RESERVED19, 204 PERIPH_ID_V_RESERVED20, 205 PERIPH_ID_V_RESERVED21, 206 PERIPH_ID_V_RESERVED22, 207 PERIPH_ID_ACTMON, 208 209 /* 120 */ 210 PERIPH_ID_EXTPERIPH1, 211 PERIPH_ID_EXTPERIPH2, 212 PERIPH_ID_EXTPERIPH3, 213 PERIPH_ID_OOB, 214 PERIPH_ID_SATA, 215 PERIPH_ID_HDA, 216 PERIPH_ID_V_RESERVED30, 217 PERIPH_ID_V_RESERVED31, 218 219 /* W word: 31:0 */ 220 PERIPH_ID_HDA2HDMICODEC, 221 PERIPH_ID_SATACOLD, 222 PERIPH_ID_W_RESERVED2, 223 PERIPH_ID_W_RESERVED3, 224 PERIPH_ID_W_RESERVED4, 225 PERIPH_ID_W_RESERVED5, 226 PERIPH_ID_W_RESERVED6, 227 PERIPH_ID_W_RESERVED7, 228 229 /* 136 */ 230 PERIPH_ID_CEC, 231 PERIPH_ID_W_RESERVED9, 232 PERIPH_ID_W_RESERVED10, 233 PERIPH_ID_W_RESERVED11, 234 PERIPH_ID_W_RESERVED12, 235 PERIPH_ID_W_RESERVED13, 236 PERIPH_ID_XUSB_PADCTL, 237 PERIPH_ID_W_RESERVED15, 238 239 /* 144 */ 240 PERIPH_ID_W_RESERVED16, 241 PERIPH_ID_W_RESERVED17, 242 PERIPH_ID_W_RESERVED18, 243 PERIPH_ID_W_RESERVED19, 244 PERIPH_ID_W_RESERVED20, 245 PERIPH_ID_ENTROPY, 246 PERIPH_ID_DDS, 247 PERIPH_ID_W_RESERVED23, 248 249 /* 152 */ 250 PERIPH_ID_W_RESERVED24, 251 PERIPH_ID_W_RESERVED25, 252 PERIPH_ID_W_RESERVED26, 253 PERIPH_ID_DVFS, 254 PERIPH_ID_XUSB_SS, 255 PERIPH_ID_W_RESERVED29, 256 PERIPH_ID_W_RESERVED30, 257 PERIPH_ID_W_RESERVED31, 258 259 PERIPH_ID_X_FIRST, 260 /* X word: 31:0 */ 261 PERIPH_ID_SPARE = PERIPH_ID_X_FIRST, 262 PERIPH_ID_X_RESERVED1, 263 PERIPH_ID_X_RESERVED2, 264 PERIPH_ID_X_RESERVED3, 265 PERIPH_ID_CAM_MCLK, 266 PERIPH_ID_CAM_MCLK2, 267 PERIPH_ID_I2C6, 268 PERIPH_ID_X_RESERVED7, 269 270 /* 168 */ 271 PERIPH_ID_X_RESERVED8, 272 PERIPH_ID_X_RESERVED9, 273 PERIPH_ID_X_RESERVED10, 274 PERIPH_ID_VIM2_CLK, 275 PERIPH_ID_X_RESERVED12, 276 PERIPH_ID_X_RESERVED13, 277 PERIPH_ID_EMC_DLL, 278 PERIPH_ID_X_RESERVED15, 279 280 /* 176 */ 281 PERIPH_ID_HDMI_AUDIO, 282 PERIPH_ID_CLK72MHZ, 283 PERIPH_ID_VIC, 284 PERIPH_ID_X_RESERVED19, 285 PERIPH_ID_X_RESERVED20, 286 PERIPH_ID_DPAUX, 287 PERIPH_ID_SOR0, 288 PERIPH_ID_X_RESERVED23, 289 290 /* 184 */ 291 PERIPH_ID_GPU, 292 PERIPH_ID_X_RESERVED25, 293 PERIPH_ID_X_RESERVED26, 294 PERIPH_ID_X_RESERVED27, 295 PERIPH_ID_X_RESERVED28, 296 PERIPH_ID_X_RESERVED29, 297 PERIPH_ID_X_RESERVED30, 298 PERIPH_ID_X_RESERVED31, 299 300 PERIPH_ID_Y_FIRST, 301 /* Y word: 31:0 (192:223) */ 302 PERIPH_ID_SPARE1 = PERIPH_ID_Y_FIRST, 303 PERIPH_ID_Y_RESERVED1, 304 PERIPH_ID_Y_RESERVED2, 305 PERIPH_ID_Y_RESERVED3, 306 PERIPH_ID_Y_RESERVED4, 307 PERIPH_ID_Y_RESERVED5, 308 PERIPH_ID_APE, 309 PERIPH_ID_Y_RESERVED7, 310 311 /* 200 */ 312 PERIPH_ID_MC_CDPA, 313 PERIPH_ID_Y_RESERVED9, 314 PERIPH_ID_Y_RESERVED10, 315 PERIPH_ID_Y_RESERVED11, 316 PERIPH_ID_Y_RESERVED12, 317 PERIPH_ID_PEX_USB_UPHY, 318 PERIPH_ID_Y_RESERVED14, 319 PERIPH_ID_Y_RESERVED15, 320 321 /* 208 */ 322 PERIPH_ID_VI_I2C, 323 PERIPH_ID_Y_RESERVED17, 324 PERIPH_ID_Y_RESERVED18, 325 PERIPH_ID_QSPI, 326 PERIPH_ID_Y_RESERVED20, 327 PERIPH_ID_Y_RESERVED21, 328 PERIPH_ID_Y_RESERVED22, 329 PERIPH_ID_Y_RESERVED23, 330 331 /* 216 */ 332 PERIPH_ID_Y_RESERVED24, 333 PERIPH_ID_Y_RESERVED25, 334 PERIPH_ID_Y_RESERVED26, 335 PERIPH_ID_Y_RESERVED27, 336 PERIPH_ID_Y_RESERVED28, 337 PERIPH_ID_Y_RESERVED29, 338 PERIPH_ID_Y_RESERVED30, 339 PERIPH_ID_Y_RESERVED31, 340 341 PERIPH_ID_COUNT, 342 PERIPH_ID_NONE = -1, 343 }; 344 345 enum pll_out_id { 346 PLL_OUT1, 347 PLL_OUT2, 348 PLL_OUT3, 349 PLL_OUT4 350 }; 351 352 /* 353 * Clock peripheral IDs which sadly don't match up with PERIPH_ID. we want 354 * callers to use the PERIPH_ID for all access to peripheral clocks to avoid 355 * confusion bewteen PERIPH_ID_... and PERIPHC_... 356 * 357 * We don't call this CLOCK_PERIPH_ID or PERIPH_CLOCK_ID as it would just be 358 * confusing. 359 */ 360 enum periphc_internal_id { 361 /* 0x00 */ 362 PERIPHC_I2S2, 363 PERIPHC_I2S3, 364 PERIPHC_SPDIF_OUT, 365 PERIPHC_SPDIF_IN, 366 PERIPHC_PWM, 367 PERIPHC_05h, 368 PERIPHC_SBC2, 369 PERIPHC_SBC3, 370 371 /* 0x08 */ 372 PERIPHC_08h, 373 PERIPHC_I2C1, 374 PERIPHC_I2C5, 375 PERIPHC_0bh, 376 PERIPHC_0ch, 377 PERIPHC_SBC1, 378 PERIPHC_DISP1, 379 PERIPHC_DISP2, 380 381 /* 0x10 */ 382 PERIPHC_10h, 383 PERIPHC_11h, 384 PERIPHC_VI, 385 PERIPHC_13h, 386 PERIPHC_SDMMC1, 387 PERIPHC_SDMMC2, 388 PERIPHC_G3D, 389 PERIPHC_G2D, 390 391 /* 0x18 */ 392 PERIPHC_18h, 393 PERIPHC_SDMMC4, 394 PERIPHC_VFIR, 395 PERIPHC_1Bh, 396 PERIPHC_1Ch, 397 PERIPHC_HSI, 398 PERIPHC_UART1, 399 PERIPHC_UART2, 400 401 /* 0x20 */ 402 PERIPHC_HOST1X, 403 PERIPHC_21h, 404 PERIPHC_22h, 405 PERIPHC_HDMI, 406 PERIPHC_24h, 407 PERIPHC_25h, 408 PERIPHC_I2C2, 409 PERIPHC_EMC, 410 411 /* 0x28 */ 412 PERIPHC_UART3, 413 PERIPHC_29h, 414 PERIPHC_VI_SENSOR, 415 PERIPHC_2bh, 416 PERIPHC_2ch, 417 PERIPHC_SBC4, 418 PERIPHC_I2C3, 419 PERIPHC_SDMMC3, 420 421 /* 0x30 */ 422 PERIPHC_UART4, 423 PERIPHC_UART5, 424 PERIPHC_VDE, 425 PERIPHC_OWR, 426 PERIPHC_NOR, 427 PERIPHC_CSITE, 428 PERIPHC_I2S1, 429 PERIPHC_DTV, 430 431 /* 0x38 */ 432 PERIPHC_38h, 433 PERIPHC_39h, 434 PERIPHC_3ah, 435 PERIPHC_3bh, 436 PERIPHC_MSENC, 437 PERIPHC_TSEC, 438 PERIPHC_3eh, 439 PERIPHC_OSC, 440 441 PERIPHC_VW_FIRST, 442 /* 0x40 */ 443 PERIPHC_40h = PERIPHC_VW_FIRST, 444 PERIPHC_MSELECT, 445 PERIPHC_TSENSOR, 446 PERIPHC_I2S4, 447 PERIPHC_I2S5, 448 PERIPHC_I2C4, 449 PERIPHC_SBC5, 450 PERIPHC_SBC6, 451 452 /* 0x48 */ 453 PERIPHC_AUDIO, 454 PERIPHC_49h, 455 PERIPHC_4ah, 456 PERIPHC_4bh, 457 PERIPHC_4ch, 458 PERIPHC_HDA2CODEC2X, 459 PERIPHC_ACTMON, 460 PERIPHC_EXTPERIPH1, 461 462 /* 0x50 */ 463 PERIPHC_EXTPERIPH2, 464 PERIPHC_EXTPERIPH3, 465 PERIPHC_52h, 466 PERIPHC_I2CSLOW, 467 PERIPHC_SYS, 468 PERIPHC_55h, 469 PERIPHC_56h, 470 PERIPHC_57h, 471 472 /* 0x58 */ 473 PERIPHC_58h, 474 PERIPHC_59h, 475 PERIPHC_5ah, 476 PERIPHC_5bh, 477 PERIPHC_SATAOOB, 478 PERIPHC_SATA, 479 PERIPHC_HDA, /* 0x428 */ 480 PERIPHC_5fh, 481 482 PERIPHC_X_FIRST, 483 /* 0x60 */ 484 PERIPHC_XUSB_CORE_HOST = PERIPHC_X_FIRST, /* 0x600 */ 485 PERIPHC_XUSB_FALCON, 486 PERIPHC_XUSB_FS, 487 PERIPHC_XUSB_CORE_DEV, 488 PERIPHC_XUSB_SS, 489 PERIPHC_CILAB, 490 PERIPHC_CILCD, 491 PERIPHC_CILE, 492 493 /* 0x68 */ 494 PERIPHC_DSIA_LP, 495 PERIPHC_DSIB_LP, 496 PERIPHC_ENTROPY, 497 PERIPHC_DVFS_REF, 498 PERIPHC_DVFS_SOC, 499 PERIPHC_TRACECLKIN, 500 PERIPHC_6Eh, 501 PERIPHC_6Fh, 502 503 /* 0x70 */ 504 PERIPHC_EMC_LATENCY, 505 PERIPHC_SOC_THERM, 506 PERIPHC_72h, 507 PERIPHC_73h, 508 PERIPHC_74h, 509 PERIPHC_75h, 510 PERIPHC_VI_SENSOR2, 511 PERIPHC_I2C6, 512 513 /* 0x78 */ 514 PERIPHC_78h, 515 PERIPHC_EMC_DLL, 516 PERIPHC_7ah, 517 PERIPHC_CLK72MHZ, 518 PERIPHC_7ch, 519 PERIPHC_7dh, 520 PERIPHC_VIC, 521 PERIPHC_7fh, 522 523 PERIPHC_Y_FIRST, 524 /* 0x80 */ 525 PERIPHC_SDMMC_LEGACY_TM = PERIPHC_Y_FIRST, /* 0x694 */ 526 PERIPHC_NVDEC, /* 0x698 */ 527 PERIPHC_NVJPG, /* 0x69c */ 528 PERIPHC_NVENC, /* 0x6a0 */ 529 PERIPHC_84h, 530 PERIPHC_85h, 531 PERIPHC_86h, 532 PERIPHC_87h, 533 534 /* 0x88 */ 535 PERIPHC_88h, 536 PERIPHC_89h, 537 PERIPHC_DMIC3, /* 0x6bc: */ 538 PERIPHC_APE, /* 0x6c0: */ 539 PERIPHC_QSPI, /* 0x6c4: */ 540 PERIPHC_VI_I2C, /* 0x6c8: */ 541 PERIPHC_USB2_HSIC_TRK, /* 0x6cc: */ 542 PERIPHC_PEX_SATA_USB_RX_BYP, /* 0x6d0: */ 543 544 /* 0x90 */ 545 PERIPHC_MAUD, /* 0x6d4: */ 546 PERIPHC_TSECB, /* 0x6d8: */ 547 548 PERIPHC_COUNT, 549 PERIPHC_NONE = -1, 550 }; 551 552 /* Converts a clock number to a clock register: 0=L, 1=H, 2=U, 0=V, 1=W */ 553 #define PERIPH_REG(id) \ 554 (id < PERIPH_ID_VW_FIRST) ? \ 555 ((id) >> 5) : ((id - PERIPH_ID_VW_FIRST) >> 5) 556 557 /* Mask value for a clock (within PERIPH_REG(id)) */ 558 #define PERIPH_MASK(id) (1 << ((id) & 0x1f)) 559 560 /* return 1 if a PLL ID is in range */ 561 #define clock_id_is_pll(id) ((id) >= CLOCK_ID_FIRST && (id) < CLOCK_ID_COUNT) 562 563 /* return 1 if a peripheral ID is in range */ 564 #define clock_periph_id_isvalid(id) ((id) >= PERIPH_ID_FIRST && \ 565 (id) < PERIPH_ID_COUNT) 566 567 #endif /* _TEGRA210_CLOCK_TABLES_H_ */ 568
