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    Searched defs:Pressure (Results 1 - 5 of 5) sorted by null

  /external/swiftshader/third_party/llvm-7.0/llvm/unittests/tools/llvm-exegesis/X86/
AnalysisTest.cpp 73 const auto Pressure =
75 EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(P0Idx, 2.0)));
79 const auto Pressure =
81 EXPECT_THAT(Pressure,
86 const auto Pressure = computeIdealizedProcResPressure(
88 EXPECT_THAT(Pressure,
94 const auto Pressure = computeIdealizedProcResPressure(
96 EXPECT_THAT(Pressure,
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
GCNSchedStrategy.h 28 /// heuristics to determine excess/critical pressure sets. Its goal is to
88 // Region pressure cache.
89 SmallVector<GCNRegPressure, 32> Pressure;
94 // Return current region pressure.
97 // Compute and cache live-ins and pressure for all regions in block.
GCNSchedStrategy.cpp 41 // scheduling and before regalloc increase register pressure.
75 std::vector<unsigned> Pressure;
79 TempTracker.getDownwardPressure(SU->getInstr(), Pressure, MaxPressure);
81 // FIXME: I think for bottom up scheduling, the register pressure is cached
83 TempTracker.getUpwardPressure(SU->getInstr(), Pressure, MaxPressure);
86 unsigned NewSGPRPressure = Pressure[SRI->getSGPRPressureSet()];
87 unsigned NewVGPRPressure = Pressure[SRI->getVGPRPressureSet()];
89 // If two instructions increase the pressure of different register sets
93 // when we report excess/critical register pressure, we do it either
105 // register pressure
    [all...]
SIMachineScheduler.cpp 55 // . The less the register pressure, the best load latencies are hidden
59 // behaviours. For example when register pressure becomes high, it can either
60 // manage to prevent register pressure from going too high, or it can
61 // increase register pressure even more than if it hadn't taken register
62 // pressure into account.
268 std::vector<unsigned> pressure; local
272 TopRPTracker.getDownwardPressure(SU->getInstr(), pressure, MaxPressure);
273 TryCand.SGPRUsage = pressure[DAG->getSGPRSetID()];
274 TryCand.VGPRUsage = pressure[DAG->getVGPRSetID()];
328 IntervalPressure Pressure, BotPressure
    [all...]
  /external/llvm/lib/Target/AMDGPU/
SIMachineScheduler.cpp 38 // . The less the register pressure, the best load latencies are hidden
42 // behaviours. For example when register pressure becomes high, it can either
43 // manage to prevent register pressure from going too high, or it can
44 // increase register pressure even more than if it hadn't taken register
45 // pressure into account.
247 std::vector<unsigned> pressure; local
251 TopRPTracker.getDownwardPressure(SU->getInstr(), pressure, MaxPressure);
252 TryCand.SGPRUsage = pressure[DAG->getSGPRSetID()];
253 TryCand.VGPRUsage = pressure[DAG->getVGPRSetID()];
307 IntervalPressure Pressure, BotPressure
    [all...]

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