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      1 /*
      2  * Copyright (C) 2015 Renesas Electronics Corp.
      3  *
      4  * This program is free software; you can redistribute it and/or modify
      5  * it under the terms of the GNU General Public License as published by
      6  * the Free Software Foundation; either version 2 of the License, or
      7  * (at your option) any later version.
      8  */
      9 
     10 #ifndef __DT_BINDINGS_CLOCK_R8A7792_CPG_MSSR_H__
     11 #define __DT_BINDINGS_CLOCK_R8A7792_CPG_MSSR_H__
     12 
     13 #include <dt-bindings/clock/renesas-cpg-mssr.h>
     14 
     15 /* r8a7792 CPG Core Clocks */
     16 #define R8A7792_CLK_Z			0
     17 #define R8A7792_CLK_ZG			1
     18 #define R8A7792_CLK_ZTR			2
     19 #define R8A7792_CLK_ZTRD2		3
     20 #define R8A7792_CLK_ZT			4
     21 #define R8A7792_CLK_ZX			5
     22 #define R8A7792_CLK_ZS			6
     23 #define R8A7792_CLK_HP			7
     24 #define R8A7792_CLK_I			8
     25 #define R8A7792_CLK_B			9
     26 #define R8A7792_CLK_LB			10
     27 #define R8A7792_CLK_P			11
     28 #define R8A7792_CLK_CL			12
     29 #define R8A7792_CLK_M2			13
     30 #define R8A7792_CLK_IMP			14
     31 #define R8A7792_CLK_ZB3			15
     32 #define R8A7792_CLK_ZB3D2		16
     33 #define R8A7792_CLK_DDR			17
     34 #define R8A7792_CLK_SD			18
     35 #define R8A7792_CLK_MP			19
     36 #define R8A7792_CLK_QSPI		20
     37 #define R8A7792_CLK_CP			21
     38 #define R8A7792_CLK_CPEX		22
     39 #define R8A7792_CLK_RCAN		23
     40 #define R8A7792_CLK_R			24
     41 #define R8A7792_CLK_OSC			25
     42 
     43 #endif /* __DT_BINDINGS_CLOCK_R8A7792_CPG_MSSR_H__ */
     44