/device/linaro/bootloader/edk2/MdeModulePkg/Universal/EbcDxe/EbcDebugger/ |
EdbCmdRegister.c | 39 UINT64 RegVal;
89 RegVal = LXtoi (RegValStr);
95 SystemContext.SystemContextEbc->R0 = RegVal;
97 SystemContext.SystemContextEbc->R1 = RegVal;
99 SystemContext.SystemContextEbc->R2 = RegVal;
101 SystemContext.SystemContextEbc->R3 = RegVal;
103 SystemContext.SystemContextEbc->R4 = RegVal;
105 SystemContext.SystemContextEbc->R5 = RegVal;
107 SystemContext.SystemContextEbc->R6 = RegVal;
109 SystemContext.SystemContextEbc->R7 = RegVal;
[all...] |
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformConfig/ |
PlatformConfigPei.c | 27 UINT32 RegVal;
29 RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange0Pei);
30 if (RegVal != 0) {
32 RegVal,
37 RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange1Pei);
38 if (RegVal != 0) {
40 RegVal,
45 RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange2Pei);
46 if (RegVal != 0) {
48 RegVal,
[all...] |
/device/linaro/bootloader/edk2/Omap35xxPkg/Library/OmapDmaLib/ |
OmapDmaLib.c | 43 UINT32 RegVal;
58 RegVal = MmioRead32 (DMA4_CSDP (Channel));
61 RegVal = ((RegVal & ~ 0x3) | DMA4->DataType );
62 RegVal = ((RegVal & ~(0x3 << 7)) | (DMA4->ReadPortAccessType << 7));
63 RegVal = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessType << 14));
64 RegVal = ((RegVal & ~(0x1 << 21)) | (DMA4->SourceEndiansim << 21)); [all...] |
/device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Drivers/StyxSataPlatformDxe/ |
InitController.c | 70 UINT32 RegVal;
83 RegVal = MmioRead32(AhciBaseAddr + PortRegAddr);
85 RegVal |= EFI_AHCI_PORT_CMD_CPD;
87 RegVal &= ~EFI_AHCI_PORT_CMD_CPD;
89 RegVal |= EFI_AHCI_PORT_CMD_MPSP;
91 RegVal &= ~EFI_AHCI_PORT_CMD_MPSP;
92 RegVal |= EFI_AHCI_PORT_CMD_HPCP;
93 MmioWrite32(AhciBaseAddr + PortRegAddr, RegVal);
|
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/EhciDxe/ |
EhciReg.c | 594 UINT32 RegVal;
634 RegVal = EhcReadOpReg(Ehc, (UINT32)(EHC_PORT_STAT_OFFSET + (4 * Index)));
635 RegVal &= ~PORTSC_CHANGE_MASK;
636 RegVal |= PORTSC_POWER;
637 EhcWriteOpReg (Ehc, (UINT32) (EHC_PORT_STAT_OFFSET + (4 * Index)), RegVal);
|
/external/capstone/ |
MCInst.h | 43 unsigned RegVal;
|
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Library/PlatformHelperLib/ |
PlatformHelperLib.c | 43 UINT32 RegVal;
67 RegVal = BaseAddress + StepLen - 1;
68 RegVal &= 0x00FFF000; // Set EDS Protected Range Limit (PRL).
69 RegVal |= ((BaseAddress >> 12) & 0xfff); // or in EDS Protected Range Base (PRB).
71 RegVal = DirectValue;
76 RegVal |= B_QNC_RCRB_SPIPBRn_WPE;
77 MmioWrite32 (PchRootComplexBar + Offset, RegVal);
78 if (RegVal == MmioRead32 (PchRootComplexBar + Offset)) {
146 UINT32 RegVal;
159 RegVal = MmioRead32 (PchRootComplexBar + Offset); [all...] |
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/EhciPei/ |
EhcPeim.c | 416 UINT32 RegVal;
424 RegVal = EhcReadOpReg(Ehc, EHC_PORT_STAT_OFFSET + 4 * Index);
425 RegVal &= ~PORTSC_CHANGE_MASK;
426 RegVal |= PORTSC_POWER;
427 EhcWriteOpReg (Ehc, EHC_PORT_STAT_OFFSET + 4 * Index, RegVal);
[all...] |
/external/llvm/include/llvm/MC/ |
MCInst.h | 45 unsigned RegVal; 65 return RegVal; 71 RegVal = Reg; 114 Op.RegVal = Reg;
|
/external/swiftshader/third_party/LLVM/include/llvm/MC/ |
MCInst.h | 42 unsigned RegVal; 60 return RegVal; 66 RegVal = Reg; 100 Op.RegVal = Reg;
|
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
MCInst.h | 47 unsigned RegVal; 67 return RegVal; 73 RegVal = Reg; 119 Op.RegVal = Reg;
|
/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/Pp2Dxe/ |
Mvpp2Lib.c | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |