Home | History | Annotate | Download | only in pipe
      1 /**************************************************************************
      2  *
      3  * Copyright 2008 VMware, Inc.
      4  * Copyright 2009-2010 VMware, Inc.
      5  * All Rights Reserved.
      6  *
      7  * Permission is hereby granted, free of charge, to any person obtaining a
      8  * copy of this software and associated documentation files (the
      9  * "Software"), to deal in the Software without restriction, including
     10  * without limitation the rights to use, copy, modify, merge, publish,
     11  * distribute, sub license, and/or sell copies of the Software, and to
     12  * permit persons to whom the Software is furnished to do so, subject to
     13  * the following conditions:
     14  *
     15  * The above copyright notice and this permission notice (including the
     16  * next paragraph) shall be included in all copies or substantial portions
     17  * of the Software.
     18  *
     19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
     20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
     22  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
     23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
     24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
     25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
     26  *
     27  **************************************************************************/
     28 
     29 #ifndef P_SHADER_TOKENS_H
     30 #define P_SHADER_TOKENS_H
     31 
     32 #ifdef __cplusplus
     33 extern "C" {
     34 #endif
     35 
     36 
     37 struct tgsi_header
     38 {
     39    unsigned HeaderSize : 8;
     40    unsigned BodySize   : 24;
     41 };
     42 
     43 struct tgsi_processor
     44 {
     45    unsigned Processor  : 4;  /* PIPE_SHADER_ */
     46    unsigned Padding    : 28;
     47 };
     48 
     49 enum tgsi_token_type {
     50    TGSI_TOKEN_TYPE_DECLARATION,
     51    TGSI_TOKEN_TYPE_IMMEDIATE,
     52    TGSI_TOKEN_TYPE_INSTRUCTION,
     53    TGSI_TOKEN_TYPE_PROPERTY,
     54 };
     55 
     56 struct tgsi_token
     57 {
     58    unsigned Type       : 4;  /**< TGSI_TOKEN_TYPE_x */
     59    unsigned NrTokens   : 8;  /**< UINT */
     60    unsigned Padding    : 20;
     61 };
     62 
     63 enum tgsi_file_type {
     64    TGSI_FILE_NULL,
     65    TGSI_FILE_CONSTANT,
     66    TGSI_FILE_INPUT,
     67    TGSI_FILE_OUTPUT,
     68    TGSI_FILE_TEMPORARY,
     69    TGSI_FILE_SAMPLER,
     70    TGSI_FILE_ADDRESS,
     71    TGSI_FILE_IMMEDIATE,
     72    TGSI_FILE_SYSTEM_VALUE,
     73    TGSI_FILE_IMAGE,
     74    TGSI_FILE_SAMPLER_VIEW,
     75    TGSI_FILE_BUFFER,
     76    TGSI_FILE_MEMORY,
     77    TGSI_FILE_CONSTBUF,
     78    TGSI_FILE_HW_ATOMIC,
     79    TGSI_FILE_COUNT,      /**< how many TGSI_FILE_ types */
     80 };
     81 
     82 
     83 #define TGSI_WRITEMASK_NONE     0x00
     84 #define TGSI_WRITEMASK_X        0x01
     85 #define TGSI_WRITEMASK_Y        0x02
     86 #define TGSI_WRITEMASK_XY       0x03
     87 #define TGSI_WRITEMASK_Z        0x04
     88 #define TGSI_WRITEMASK_XZ       0x05
     89 #define TGSI_WRITEMASK_YZ       0x06
     90 #define TGSI_WRITEMASK_XYZ      0x07
     91 #define TGSI_WRITEMASK_W        0x08
     92 #define TGSI_WRITEMASK_XW       0x09
     93 #define TGSI_WRITEMASK_YW       0x0A
     94 #define TGSI_WRITEMASK_XYW      0x0B
     95 #define TGSI_WRITEMASK_ZW       0x0C
     96 #define TGSI_WRITEMASK_XZW      0x0D
     97 #define TGSI_WRITEMASK_YZW      0x0E
     98 #define TGSI_WRITEMASK_XYZW     0x0F
     99 
    100 enum tgsi_interpolate_mode {
    101    TGSI_INTERPOLATE_CONSTANT,
    102    TGSI_INTERPOLATE_LINEAR,
    103    TGSI_INTERPOLATE_PERSPECTIVE,
    104    TGSI_INTERPOLATE_COLOR,          /* special color case for smooth/flat */
    105    TGSI_INTERPOLATE_COUNT,
    106 };
    107 
    108 enum tgsi_interpolate_loc {
    109    TGSI_INTERPOLATE_LOC_CENTER,
    110    TGSI_INTERPOLATE_LOC_CENTROID,
    111    TGSI_INTERPOLATE_LOC_SAMPLE,
    112    TGSI_INTERPOLATE_LOC_COUNT,
    113 };
    114 
    115 #define TGSI_CYLINDRICAL_WRAP_X (1 << 0)
    116 #define TGSI_CYLINDRICAL_WRAP_Y (1 << 1)
    117 #define TGSI_CYLINDRICAL_WRAP_Z (1 << 2)
    118 #define TGSI_CYLINDRICAL_WRAP_W (1 << 3)
    119 
    120 enum tgsi_memory_type {
    121    TGSI_MEMORY_TYPE_GLOBAL,         /* OpenCL global              */
    122    TGSI_MEMORY_TYPE_SHARED,         /* OpenCL local / GLSL shared */
    123    TGSI_MEMORY_TYPE_PRIVATE,        /* OpenCL private             */
    124    TGSI_MEMORY_TYPE_INPUT,          /* OpenCL kernel input params */
    125    TGSI_MEMORY_TYPE_COUNT,
    126 };
    127 
    128 struct tgsi_declaration
    129 {
    130    unsigned Type        : 4;  /**< TGSI_TOKEN_TYPE_DECLARATION */
    131    unsigned NrTokens    : 8;  /**< UINT */
    132    unsigned File        : 4;  /**< one of TGSI_FILE_x */
    133    unsigned UsageMask   : 4;  /**< bitmask of TGSI_WRITEMASK_x flags */
    134    unsigned Dimension   : 1;  /**< any extra dimension info? */
    135    unsigned Semantic    : 1;  /**< BOOL, any semantic info? */
    136    unsigned Interpolate : 1;  /**< any interpolation info? */
    137    unsigned Invariant   : 1;  /**< invariant optimization? */
    138    unsigned Local       : 1;  /**< optimize as subroutine local variable? */
    139    unsigned Array       : 1;  /**< extra array info? */
    140    unsigned Atomic      : 1;  /**< atomic only? for TGSI_FILE_BUFFER */
    141    unsigned MemType     : 2;  /**< TGSI_MEMORY_TYPE_x for TGSI_FILE_MEMORY */
    142    unsigned Padding     : 3;
    143 };
    144 
    145 struct tgsi_declaration_range
    146 {
    147    unsigned First   : 16; /**< UINT */
    148    unsigned Last    : 16; /**< UINT */
    149 };
    150 
    151 struct tgsi_declaration_dimension
    152 {
    153    unsigned Index2D:16; /**< UINT */
    154    unsigned Padding:16;
    155 };
    156 
    157 struct tgsi_declaration_interp
    158 {
    159    unsigned Interpolate : 4;   /**< one of TGSI_INTERPOLATE_x */
    160    unsigned Location    : 2;   /**< one of TGSI_INTERPOLATE_LOC_x */
    161    unsigned CylindricalWrap:4; /**< TGSI_CYLINDRICAL_WRAP_x flags */
    162    unsigned Padding     : 22;
    163 };
    164 
    165 enum tgsi_semantic {
    166    TGSI_SEMANTIC_POSITION,
    167    TGSI_SEMANTIC_COLOR,
    168    TGSI_SEMANTIC_BCOLOR,       /**< back-face color */
    169    TGSI_SEMANTIC_FOG,
    170    TGSI_SEMANTIC_PSIZE,
    171    TGSI_SEMANTIC_GENERIC,
    172    TGSI_SEMANTIC_NORMAL,
    173    TGSI_SEMANTIC_FACE,
    174    TGSI_SEMANTIC_EDGEFLAG,
    175    TGSI_SEMANTIC_PRIMID,
    176    TGSI_SEMANTIC_INSTANCEID,  /**< doesn't include start_instance */
    177    TGSI_SEMANTIC_VERTEXID,
    178    TGSI_SEMANTIC_STENCIL,
    179    TGSI_SEMANTIC_CLIPDIST,
    180    TGSI_SEMANTIC_CLIPVERTEX,
    181    TGSI_SEMANTIC_GRID_SIZE,   /**< grid size in blocks */
    182    TGSI_SEMANTIC_BLOCK_ID,    /**< id of the current block */
    183    TGSI_SEMANTIC_BLOCK_SIZE,  /**< block size in threads */
    184    TGSI_SEMANTIC_THREAD_ID,   /**< block-relative id of the current thread */
    185    TGSI_SEMANTIC_TEXCOORD,    /**< texture or sprite coordinates */
    186    TGSI_SEMANTIC_PCOORD,      /**< point sprite coordinate */
    187    TGSI_SEMANTIC_VIEWPORT_INDEX,  /**< viewport index */
    188    TGSI_SEMANTIC_LAYER,       /**< layer (rendertarget index) */
    189    TGSI_SEMANTIC_SAMPLEID,
    190    TGSI_SEMANTIC_SAMPLEPOS,
    191    TGSI_SEMANTIC_SAMPLEMASK,
    192    TGSI_SEMANTIC_INVOCATIONID,
    193    TGSI_SEMANTIC_VERTEXID_NOBASE,
    194    TGSI_SEMANTIC_BASEVERTEX,
    195    TGSI_SEMANTIC_PATCH,       /**< generic per-patch semantic */
    196    TGSI_SEMANTIC_TESSCOORD,   /**< coordinate being processed by tess */
    197    TGSI_SEMANTIC_TESSOUTER,   /**< outer tessellation levels */
    198    TGSI_SEMANTIC_TESSINNER,   /**< inner tessellation levels */
    199    TGSI_SEMANTIC_VERTICESIN,  /**< number of input vertices */
    200    TGSI_SEMANTIC_HELPER_INVOCATION,  /**< current invocation is helper */
    201    TGSI_SEMANTIC_BASEINSTANCE,
    202    TGSI_SEMANTIC_DRAWID,
    203    TGSI_SEMANTIC_WORK_DIM,    /**< opencl get_work_dim value */
    204    TGSI_SEMANTIC_SUBGROUP_SIZE,
    205    TGSI_SEMANTIC_SUBGROUP_INVOCATION,
    206    TGSI_SEMANTIC_SUBGROUP_EQ_MASK,
    207    TGSI_SEMANTIC_SUBGROUP_GE_MASK,
    208    TGSI_SEMANTIC_SUBGROUP_GT_MASK,
    209    TGSI_SEMANTIC_SUBGROUP_LE_MASK,
    210    TGSI_SEMANTIC_SUBGROUP_LT_MASK,
    211    TGSI_SEMANTIC_COUNT,       /**< number of semantic values */
    212 };
    213 
    214 struct tgsi_declaration_semantic
    215 {
    216    unsigned Name           : 8;  /**< one of TGSI_SEMANTIC_x */
    217    unsigned Index          : 16; /**< UINT */
    218    unsigned StreamX        : 2; /**< vertex stream (for GS output) */
    219    unsigned StreamY        : 2;
    220    unsigned StreamZ        : 2;
    221    unsigned StreamW        : 2;
    222 };
    223 
    224 struct tgsi_declaration_image {
    225    unsigned Resource    : 8; /**< one of TGSI_TEXTURE_ */
    226    unsigned Raw         : 1;
    227    unsigned Writable    : 1;
    228    unsigned Format      : 10; /**< one of PIPE_FORMAT_ */
    229    unsigned Padding     : 12;
    230 };
    231 
    232 enum tgsi_return_type {
    233    TGSI_RETURN_TYPE_UNORM = 0,
    234    TGSI_RETURN_TYPE_SNORM,
    235    TGSI_RETURN_TYPE_SINT,
    236    TGSI_RETURN_TYPE_UINT,
    237    TGSI_RETURN_TYPE_FLOAT,
    238    TGSI_RETURN_TYPE_UNKNOWN,
    239    TGSI_RETURN_TYPE_COUNT
    240 };
    241 
    242 struct tgsi_declaration_sampler_view {
    243    unsigned Resource    : 8; /**< one of TGSI_TEXTURE_ */
    244    unsigned ReturnTypeX : 6; /**< one of enum tgsi_return_type */
    245    unsigned ReturnTypeY : 6; /**< one of enum tgsi_return_type */
    246    unsigned ReturnTypeZ : 6; /**< one of enum tgsi_return_type */
    247    unsigned ReturnTypeW : 6; /**< one of enum tgsi_return_type */
    248 };
    249 
    250 struct tgsi_declaration_array {
    251    unsigned ArrayID : 10;
    252    unsigned Padding : 22;
    253 };
    254 
    255 enum tgsi_imm_type {
    256    TGSI_IMM_FLOAT32,
    257    TGSI_IMM_UINT32,
    258    TGSI_IMM_INT32,
    259    TGSI_IMM_FLOAT64,
    260    TGSI_IMM_UINT64,
    261    TGSI_IMM_INT64,
    262 };
    263 
    264 struct tgsi_immediate
    265 {
    266    unsigned Type       : 4;  /**< TGSI_TOKEN_TYPE_IMMEDIATE */
    267    unsigned NrTokens   : 14; /**< UINT */
    268    unsigned DataType   : 4;  /**< one of TGSI_IMM_x */
    269    unsigned Padding    : 10;
    270 };
    271 
    272 union tgsi_immediate_data
    273 {
    274    float Float;
    275    unsigned Uint;
    276    int Int;
    277 };
    278 
    279 enum tgsi_property_name {
    280    TGSI_PROPERTY_GS_INPUT_PRIM,
    281    TGSI_PROPERTY_GS_OUTPUT_PRIM,
    282    TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES,
    283    TGSI_PROPERTY_FS_COORD_ORIGIN,
    284    TGSI_PROPERTY_FS_COORD_PIXEL_CENTER,
    285    TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS,
    286    TGSI_PROPERTY_FS_DEPTH_LAYOUT,
    287    TGSI_PROPERTY_VS_PROHIBIT_UCPS,
    288    TGSI_PROPERTY_GS_INVOCATIONS,
    289    TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION,
    290    TGSI_PROPERTY_TCS_VERTICES_OUT,
    291    TGSI_PROPERTY_TES_PRIM_MODE,
    292    TGSI_PROPERTY_TES_SPACING,
    293    TGSI_PROPERTY_TES_VERTEX_ORDER_CW,
    294    TGSI_PROPERTY_TES_POINT_MODE,
    295    TGSI_PROPERTY_NUM_CLIPDIST_ENABLED,
    296    TGSI_PROPERTY_NUM_CULLDIST_ENABLED,
    297    TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL,
    298    TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE,
    299    TGSI_PROPERTY_NEXT_SHADER,
    300    TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH,
    301    TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT,
    302    TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH,
    303    TGSI_PROPERTY_MUL_ZERO_WINS,
    304    TGSI_PROPERTY_COUNT,
    305 };
    306 
    307 struct tgsi_property {
    308    unsigned Type         : 4;  /**< TGSI_TOKEN_TYPE_PROPERTY */
    309    unsigned NrTokens     : 8;  /**< UINT */
    310    unsigned PropertyName : 8;  /**< one of TGSI_PROPERTY */
    311    unsigned Padding      : 12;
    312 };
    313 
    314 enum tgsi_fs_coord_origin {
    315    TGSI_FS_COORD_ORIGIN_UPPER_LEFT,
    316    TGSI_FS_COORD_ORIGIN_LOWER_LEFT,
    317 };
    318 
    319 enum tgsi_fs_coord_pixcenter {
    320    TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER,
    321    TGSI_FS_COORD_PIXEL_CENTER_INTEGER,
    322 };
    323 
    324 enum tgsi_fs_depth_layout {
    325    TGSI_FS_DEPTH_LAYOUT_NONE,
    326    TGSI_FS_DEPTH_LAYOUT_ANY,
    327    TGSI_FS_DEPTH_LAYOUT_GREATER,
    328    TGSI_FS_DEPTH_LAYOUT_LESS,
    329    TGSI_FS_DEPTH_LAYOUT_UNCHANGED,
    330 };
    331 
    332 struct tgsi_property_data {
    333    unsigned Data;
    334 };
    335 
    336 /* TGSI opcodes.
    337  *
    338  * For more information on semantics of opcodes and
    339  * which APIs are known to use which opcodes, see
    340  * gallium/docs/source/tgsi.rst
    341  */
    342 #define TGSI_OPCODE_ARL                 0
    343 #define TGSI_OPCODE_MOV                 1
    344 #define TGSI_OPCODE_LIT                 2
    345 #define TGSI_OPCODE_RCP                 3
    346 #define TGSI_OPCODE_RSQ                 4
    347 #define TGSI_OPCODE_EXP                 5
    348 #define TGSI_OPCODE_LOG                 6
    349 #define TGSI_OPCODE_MUL                 7
    350 #define TGSI_OPCODE_ADD                 8
    351 #define TGSI_OPCODE_DP3                 9
    352 #define TGSI_OPCODE_DP4                 10
    353 #define TGSI_OPCODE_DST                 11
    354 #define TGSI_OPCODE_MIN                 12
    355 #define TGSI_OPCODE_MAX                 13
    356 #define TGSI_OPCODE_SLT                 14
    357 #define TGSI_OPCODE_SGE                 15
    358 #define TGSI_OPCODE_MAD                 16
    359 #define TGSI_OPCODE_TEX_LZ              17
    360 #define TGSI_OPCODE_LRP                 18
    361 #define TGSI_OPCODE_FMA                 19
    362 #define TGSI_OPCODE_SQRT                20
    363 #define TGSI_OPCODE_LDEXP               21
    364 #define TGSI_OPCODE_F2U64               22
    365 #define TGSI_OPCODE_F2I64               23
    366 #define TGSI_OPCODE_FRC                 24
    367 #define TGSI_OPCODE_TXF_LZ              25
    368 #define TGSI_OPCODE_FLR                 26
    369 #define TGSI_OPCODE_ROUND               27
    370 #define TGSI_OPCODE_EX2                 28
    371 #define TGSI_OPCODE_LG2                 29
    372 #define TGSI_OPCODE_POW                 30
    373 /* gap */
    374 #define TGSI_OPCODE_U2I64               32
    375 #define TGSI_OPCODE_CLOCK               33
    376 #define TGSI_OPCODE_I2I64               34
    377 /* gap */
    378 #define TGSI_OPCODE_COS                 36
    379 #define TGSI_OPCODE_DDX                 37
    380 #define TGSI_OPCODE_DDY                 38
    381 #define TGSI_OPCODE_KILL                39 /* unconditional */
    382 #define TGSI_OPCODE_PK2H                40
    383 #define TGSI_OPCODE_PK2US               41
    384 #define TGSI_OPCODE_PK4B                42
    385 #define TGSI_OPCODE_PK4UB               43
    386 #define TGSI_OPCODE_D2U64               44
    387 #define TGSI_OPCODE_SEQ                 45
    388 #define TGSI_OPCODE_D2I64               46
    389 #define TGSI_OPCODE_SGT                 47
    390 #define TGSI_OPCODE_SIN                 48
    391 #define TGSI_OPCODE_SLE                 49
    392 #define TGSI_OPCODE_SNE                 50
    393 #define TGSI_OPCODE_U642D               51
    394 #define TGSI_OPCODE_TEX                 52
    395 #define TGSI_OPCODE_TXD                 53
    396 #define TGSI_OPCODE_TXP                 54
    397 #define TGSI_OPCODE_UP2H                55
    398 #define TGSI_OPCODE_UP2US               56
    399 #define TGSI_OPCODE_UP4B                57
    400 #define TGSI_OPCODE_UP4UB               58
    401 #define TGSI_OPCODE_U642F               59
    402 #define TGSI_OPCODE_I642F               60
    403 #define TGSI_OPCODE_ARR                 61
    404 #define TGSI_OPCODE_I642D               62
    405 #define TGSI_OPCODE_CAL                 63
    406 #define TGSI_OPCODE_RET                 64
    407 #define TGSI_OPCODE_SSG                 65 /* SGN */
    408 #define TGSI_OPCODE_CMP                 66
    409 /* gap */
    410 #define TGSI_OPCODE_TXB                 68
    411 #define TGSI_OPCODE_FBFETCH             69
    412 #define TGSI_OPCODE_DIV                 70
    413 #define TGSI_OPCODE_DP2                 71
    414 #define TGSI_OPCODE_TXL                 72
    415 #define TGSI_OPCODE_BRK                 73
    416 #define TGSI_OPCODE_IF                  74
    417 #define TGSI_OPCODE_UIF                 75
    418 #define TGSI_OPCODE_READ_INVOC          76
    419 #define TGSI_OPCODE_ELSE                77
    420 #define TGSI_OPCODE_ENDIF               78
    421 
    422 #define TGSI_OPCODE_DDX_FINE            79
    423 #define TGSI_OPCODE_DDY_FINE            80
    424 /* gap */
    425 #define TGSI_OPCODE_CEIL                83
    426 #define TGSI_OPCODE_I2F                 84
    427 #define TGSI_OPCODE_NOT                 85
    428 #define TGSI_OPCODE_TRUNC               86
    429 #define TGSI_OPCODE_SHL                 87
    430 #define TGSI_OPCODE_BALLOT              88
    431 #define TGSI_OPCODE_AND                 89
    432 #define TGSI_OPCODE_OR                  90
    433 #define TGSI_OPCODE_MOD                 91
    434 #define TGSI_OPCODE_XOR                 92
    435 /* gap */
    436 #define TGSI_OPCODE_TXF                 94
    437 #define TGSI_OPCODE_TXQ                 95
    438 #define TGSI_OPCODE_CONT                96
    439 #define TGSI_OPCODE_EMIT                97
    440 #define TGSI_OPCODE_ENDPRIM             98
    441 #define TGSI_OPCODE_BGNLOOP             99
    442 #define TGSI_OPCODE_BGNSUB              100
    443 #define TGSI_OPCODE_ENDLOOP             101
    444 #define TGSI_OPCODE_ENDSUB              102
    445 /* gap */
    446 #define TGSI_OPCODE_TXQS                104
    447 #define TGSI_OPCODE_RESQ                105
    448 #define TGSI_OPCODE_READ_FIRST          106
    449 #define TGSI_OPCODE_NOP                 107
    450 
    451 #define TGSI_OPCODE_FSEQ                108
    452 #define TGSI_OPCODE_FSGE                109
    453 #define TGSI_OPCODE_FSLT                110
    454 #define TGSI_OPCODE_FSNE                111
    455 
    456 #define TGSI_OPCODE_MEMBAR              112
    457                                 /* gap */
    458 #define TGSI_OPCODE_KILL_IF             116  /* conditional kill */
    459 #define TGSI_OPCODE_END                 117  /* aka HALT */
    460 #define TGSI_OPCODE_DFMA                118
    461 #define TGSI_OPCODE_F2I                 119
    462 #define TGSI_OPCODE_IDIV                120
    463 #define TGSI_OPCODE_IMAX                121
    464 #define TGSI_OPCODE_IMIN                122
    465 #define TGSI_OPCODE_INEG                123
    466 #define TGSI_OPCODE_ISGE                124
    467 #define TGSI_OPCODE_ISHR                125
    468 #define TGSI_OPCODE_ISLT                126
    469 #define TGSI_OPCODE_F2U                 127
    470 #define TGSI_OPCODE_U2F                 128
    471 #define TGSI_OPCODE_UADD                129
    472 #define TGSI_OPCODE_UDIV                130
    473 #define TGSI_OPCODE_UMAD                131
    474 #define TGSI_OPCODE_UMAX                132
    475 #define TGSI_OPCODE_UMIN                133
    476 #define TGSI_OPCODE_UMOD                134
    477 #define TGSI_OPCODE_UMUL                135
    478 #define TGSI_OPCODE_USEQ                136
    479 #define TGSI_OPCODE_USGE                137
    480 #define TGSI_OPCODE_USHR                138
    481 #define TGSI_OPCODE_USLT                139
    482 #define TGSI_OPCODE_USNE                140
    483 #define TGSI_OPCODE_SWITCH              141
    484 #define TGSI_OPCODE_CASE                142
    485 #define TGSI_OPCODE_DEFAULT             143
    486 #define TGSI_OPCODE_ENDSWITCH           144
    487 
    488 /* resource related opcodes */
    489 #define TGSI_OPCODE_SAMPLE              145
    490 #define TGSI_OPCODE_SAMPLE_I            146
    491 #define TGSI_OPCODE_SAMPLE_I_MS         147
    492 #define TGSI_OPCODE_SAMPLE_B            148
    493 #define TGSI_OPCODE_SAMPLE_C            149
    494 #define TGSI_OPCODE_SAMPLE_C_LZ         150
    495 #define TGSI_OPCODE_SAMPLE_D            151
    496 #define TGSI_OPCODE_SAMPLE_L            152
    497 #define TGSI_OPCODE_GATHER4             153
    498 #define TGSI_OPCODE_SVIEWINFO           154
    499 #define TGSI_OPCODE_SAMPLE_POS          155
    500 #define TGSI_OPCODE_SAMPLE_INFO         156
    501 
    502 #define TGSI_OPCODE_UARL                157
    503 #define TGSI_OPCODE_UCMP                158
    504 #define TGSI_OPCODE_IABS                159
    505 #define TGSI_OPCODE_ISSG                160
    506 
    507 #define TGSI_OPCODE_LOAD                161
    508 #define TGSI_OPCODE_STORE               162
    509 /* gap */
    510 #define TGSI_OPCODE_BARRIER             166
    511 
    512 #define TGSI_OPCODE_ATOMUADD            167
    513 #define TGSI_OPCODE_ATOMXCHG            168
    514 #define TGSI_OPCODE_ATOMCAS             169
    515 #define TGSI_OPCODE_ATOMAND             170
    516 #define TGSI_OPCODE_ATOMOR              171
    517 #define TGSI_OPCODE_ATOMXOR             172
    518 #define TGSI_OPCODE_ATOMUMIN            173
    519 #define TGSI_OPCODE_ATOMUMAX            174
    520 #define TGSI_OPCODE_ATOMIMIN            175
    521 #define TGSI_OPCODE_ATOMIMAX            176
    522 
    523 /* to be used for shadow cube map compares */
    524 #define TGSI_OPCODE_TEX2                177
    525 #define TGSI_OPCODE_TXB2                178
    526 #define TGSI_OPCODE_TXL2                179
    527 
    528 #define TGSI_OPCODE_IMUL_HI             180
    529 #define TGSI_OPCODE_UMUL_HI             181
    530 
    531 #define TGSI_OPCODE_TG4                 182
    532 
    533 #define TGSI_OPCODE_LODQ                183
    534 
    535 #define TGSI_OPCODE_IBFE                184
    536 #define TGSI_OPCODE_UBFE                185
    537 #define TGSI_OPCODE_BFI                 186
    538 #define TGSI_OPCODE_BREV                187
    539 #define TGSI_OPCODE_POPC                188
    540 #define TGSI_OPCODE_LSB                 189
    541 #define TGSI_OPCODE_IMSB                190
    542 #define TGSI_OPCODE_UMSB                191
    543 
    544 #define TGSI_OPCODE_INTERP_CENTROID     192
    545 #define TGSI_OPCODE_INTERP_SAMPLE       193
    546 #define TGSI_OPCODE_INTERP_OFFSET       194
    547 
    548 /* sm5 marked opcodes are supported in D3D11 optionally - also DMOV, DMOVC */
    549 #define TGSI_OPCODE_F2D                 195 /* SM5 */
    550 #define TGSI_OPCODE_D2F                 196
    551 #define TGSI_OPCODE_DABS                197
    552 #define TGSI_OPCODE_DNEG                198 /* SM5 */
    553 #define TGSI_OPCODE_DADD                199 /* SM5 */
    554 #define TGSI_OPCODE_DMUL                200 /* SM5 */
    555 #define TGSI_OPCODE_DMAX                201 /* SM5 */
    556 #define TGSI_OPCODE_DMIN                202 /* SM5 */
    557 #define TGSI_OPCODE_DSLT                203 /* SM5 */
    558 #define TGSI_OPCODE_DSGE                204 /* SM5 */
    559 #define TGSI_OPCODE_DSEQ                205 /* SM5 */
    560 #define TGSI_OPCODE_DSNE                206 /* SM5 */
    561 #define TGSI_OPCODE_DRCP                207 /* eg, cayman */
    562 #define TGSI_OPCODE_DSQRT               208 /* eg, cayman also has DRSQ */
    563 #define TGSI_OPCODE_DMAD                209
    564 #define TGSI_OPCODE_DFRAC               210 /* eg, cayman */
    565 #define TGSI_OPCODE_DLDEXP              211 /* eg, cayman */
    566 #define TGSI_OPCODE_DFRACEXP            212 /* eg, cayman */
    567 #define TGSI_OPCODE_D2I                 213
    568 #define TGSI_OPCODE_I2D                 214
    569 #define TGSI_OPCODE_D2U                 215
    570 #define TGSI_OPCODE_U2D                 216
    571 #define TGSI_OPCODE_DRSQ                217 /* eg, cayman also has DRSQ */
    572 #define TGSI_OPCODE_DTRUNC              218 /* nvc0 */
    573 #define TGSI_OPCODE_DCEIL               219 /* nvc0 */
    574 #define TGSI_OPCODE_DFLR                220 /* nvc0 */
    575 #define TGSI_OPCODE_DROUND              221 /* nvc0 */
    576 #define TGSI_OPCODE_DSSG                222
    577 
    578 #define TGSI_OPCODE_VOTE_ANY            223
    579 #define TGSI_OPCODE_VOTE_ALL            224
    580 #define TGSI_OPCODE_VOTE_EQ             225
    581 
    582 #define TGSI_OPCODE_U64SEQ              226
    583 #define TGSI_OPCODE_U64SNE              227
    584 #define TGSI_OPCODE_I64SLT              228
    585 #define TGSI_OPCODE_U64SLT              229
    586 #define TGSI_OPCODE_I64SGE              230
    587 #define TGSI_OPCODE_U64SGE              231
    588 
    589 #define TGSI_OPCODE_I64MIN              232
    590 #define TGSI_OPCODE_U64MIN              233
    591 #define TGSI_OPCODE_I64MAX              234
    592 #define TGSI_OPCODE_U64MAX              235
    593 
    594 #define TGSI_OPCODE_I64ABS              236
    595 #define TGSI_OPCODE_I64SSG              237
    596 #define TGSI_OPCODE_I64NEG              238
    597 
    598 #define TGSI_OPCODE_U64ADD              239
    599 #define TGSI_OPCODE_U64MUL              240
    600 #define TGSI_OPCODE_U64SHL              241
    601 #define TGSI_OPCODE_I64SHR              242
    602 #define TGSI_OPCODE_U64SHR              243
    603 
    604 #define TGSI_OPCODE_I64DIV              244
    605 #define TGSI_OPCODE_U64DIV              245
    606 #define TGSI_OPCODE_I64MOD              246
    607 #define TGSI_OPCODE_U64MOD              247
    608 
    609 #define TGSI_OPCODE_DDIV                248
    610 
    611 #define TGSI_OPCODE_LOD                 249
    612 
    613 #define TGSI_OPCODE_LAST                250
    614 
    615 /**
    616  * Opcode is the operation code to execute. A given operation defines the
    617  * semantics how the source registers (if any) are interpreted and what is
    618  * written to the destination registers (if any) as a result of execution.
    619  *
    620  * NumDstRegs and NumSrcRegs is the number of destination and source registers,
    621  * respectively. For a given operation code, those numbers are fixed and are
    622  * present here only for convenience.
    623  *
    624  * Saturate controls how are final results in destination registers modified.
    625  */
    626 
    627 struct tgsi_instruction
    628 {
    629    unsigned Type       : 4;  /* TGSI_TOKEN_TYPE_INSTRUCTION */
    630    unsigned NrTokens   : 8;  /* UINT */
    631    unsigned Opcode     : 8;  /* TGSI_OPCODE_ */
    632    unsigned Saturate   : 1;  /* BOOL */
    633    unsigned NumDstRegs : 2;  /* UINT */
    634    unsigned NumSrcRegs : 4;  /* UINT */
    635    unsigned Label      : 1;
    636    unsigned Texture    : 1;
    637    unsigned Memory     : 1;
    638    unsigned Precise    : 1;
    639    unsigned Padding    : 1;
    640 };
    641 
    642 /*
    643  * If tgsi_instruction::Label is TRUE, tgsi_instruction_label follows.
    644  *
    645  * If tgsi_instruction::Texture is TRUE, tgsi_instruction_texture follows.
    646  *   if texture instruction has a number of offsets,
    647  *   then tgsi_instruction::Texture::NumOffset of tgsi_texture_offset follow.
    648  *
    649  * Then, tgsi_instruction::NumDstRegs of tgsi_dst_register follow.
    650  *
    651  * Then, tgsi_instruction::NumSrcRegs of tgsi_src_register follow.
    652  *
    653  * tgsi_instruction::NrTokens contains the total number of words that make the
    654  * instruction, including the instruction word.
    655  */
    656 
    657 enum tgsi_swizzle {
    658    TGSI_SWIZZLE_X,
    659    TGSI_SWIZZLE_Y,
    660    TGSI_SWIZZLE_Z,
    661    TGSI_SWIZZLE_W,
    662 };
    663 
    664 struct tgsi_instruction_label
    665 {
    666    unsigned Label    : 24;   /* UINT */
    667    unsigned Padding  : 8;
    668 };
    669 
    670 enum tgsi_texture_type {
    671    TGSI_TEXTURE_BUFFER,
    672    TGSI_TEXTURE_1D,
    673    TGSI_TEXTURE_2D,
    674    TGSI_TEXTURE_3D,
    675    TGSI_TEXTURE_CUBE,
    676    TGSI_TEXTURE_RECT,
    677    TGSI_TEXTURE_SHADOW1D,
    678    TGSI_TEXTURE_SHADOW2D,
    679    TGSI_TEXTURE_SHADOWRECT,
    680    TGSI_TEXTURE_1D_ARRAY,
    681    TGSI_TEXTURE_2D_ARRAY,
    682    TGSI_TEXTURE_SHADOW1D_ARRAY,
    683    TGSI_TEXTURE_SHADOW2D_ARRAY,
    684    TGSI_TEXTURE_SHADOWCUBE,
    685    TGSI_TEXTURE_2D_MSAA,
    686    TGSI_TEXTURE_2D_ARRAY_MSAA,
    687    TGSI_TEXTURE_CUBE_ARRAY,
    688    TGSI_TEXTURE_SHADOWCUBE_ARRAY,
    689    TGSI_TEXTURE_UNKNOWN,
    690    TGSI_TEXTURE_COUNT,
    691 };
    692 
    693 struct tgsi_instruction_texture
    694 {
    695    unsigned Texture  : 8;    /* TGSI_TEXTURE_ */
    696    unsigned NumOffsets : 4;
    697    unsigned ReturnType : 3; /* TGSI_RETURN_TYPE_x */
    698    unsigned Padding : 17;
    699 };
    700 
    701 /* for texture offsets in GLSL and DirectX.
    702  * Generally these always come from TGSI_FILE_IMMEDIATE,
    703  * however DX11 appears to have the capability to do
    704  * non-constant texture offsets.
    705  */
    706 struct tgsi_texture_offset
    707 {
    708    int      Index    : 16;
    709    unsigned File     : 4;  /**< one of TGSI_FILE_x */
    710    unsigned SwizzleX : 2;  /* TGSI_SWIZZLE_x */
    711    unsigned SwizzleY : 2;  /* TGSI_SWIZZLE_x */
    712    unsigned SwizzleZ : 2;  /* TGSI_SWIZZLE_x */
    713    unsigned Padding  : 6;
    714 };
    715 
    716 /**
    717  * File specifies the register array to access.
    718  *
    719  * Index specifies the element number of a register in the register file.
    720  *
    721  * If Indirect is TRUE, Index should be offset by the X component of the indirect
    722  * register that follows. The register can be now fetched into local storage
    723  * for further processing.
    724  *
    725  * If Negate is TRUE, all components of the fetched register are negated.
    726  *
    727  * The fetched register components are swizzled according to SwizzleX, SwizzleY,
    728  * SwizzleZ and SwizzleW.
    729  *
    730  */
    731 
    732 struct tgsi_src_register
    733 {
    734    unsigned File        : 4;  /* TGSI_FILE_ */
    735    unsigned Indirect    : 1;  /* BOOL */
    736    unsigned Dimension   : 1;  /* BOOL */
    737    int      Index       : 16; /* SINT */
    738    unsigned SwizzleX    : 2;  /* TGSI_SWIZZLE_ */
    739    unsigned SwizzleY    : 2;  /* TGSI_SWIZZLE_ */
    740    unsigned SwizzleZ    : 2;  /* TGSI_SWIZZLE_ */
    741    unsigned SwizzleW    : 2;  /* TGSI_SWIZZLE_ */
    742    unsigned Absolute    : 1;    /* BOOL */
    743    unsigned Negate      : 1;    /* BOOL */
    744 };
    745 
    746 /**
    747  * If tgsi_src_register::Indirect is TRUE, tgsi_ind_register follows.
    748  *
    749  * File, Index and Swizzle are handled the same as in tgsi_src_register.
    750  *
    751  * If ArrayID is zero the whole register file might be indirectly addressed,
    752  * if not only the Declaration with this ArrayID is accessed by this operand.
    753  *
    754  */
    755 
    756 struct tgsi_ind_register
    757 {
    758    unsigned File    : 4;  /* TGSI_FILE_ */
    759    int      Index   : 16; /* SINT */
    760    unsigned Swizzle : 2;  /* TGSI_SWIZZLE_ */
    761    unsigned ArrayID : 10; /* UINT */
    762 };
    763 
    764 /**
    765  * If tgsi_src_register::Dimension is TRUE, tgsi_dimension follows.
    766  */
    767 
    768 struct tgsi_dimension
    769 {
    770    unsigned Indirect    : 1;  /* BOOL */
    771    unsigned Dimension   : 1;  /* BOOL */
    772    unsigned Padding     : 14;
    773    int      Index       : 16; /* SINT */
    774 };
    775 
    776 struct tgsi_dst_register
    777 {
    778    unsigned File        : 4;  /* TGSI_FILE_ */
    779    unsigned WriteMask   : 4;  /* TGSI_WRITEMASK_ */
    780    unsigned Indirect    : 1;  /* BOOL */
    781    unsigned Dimension   : 1;  /* BOOL */
    782    int      Index       : 16; /* SINT */
    783    unsigned Padding     : 6;
    784 };
    785 
    786 #define TGSI_MEMORY_COHERENT (1 << 0)
    787 #define TGSI_MEMORY_RESTRICT (1 << 1)
    788 #define TGSI_MEMORY_VOLATILE (1 << 2)
    789 
    790 /**
    791  * Specifies the type of memory access to do for the LOAD/STORE instruction.
    792  */
    793 struct tgsi_instruction_memory
    794 {
    795    unsigned Qualifier : 3;  /* TGSI_MEMORY_ */
    796    unsigned Texture   : 8;  /* only for images: TGSI_TEXTURE_ */
    797    unsigned Format    : 10; /* only for images: PIPE_FORMAT_ */
    798    unsigned Padding   : 11;
    799 };
    800 
    801 #define TGSI_MEMBAR_SHADER_BUFFER (1 << 0)
    802 #define TGSI_MEMBAR_ATOMIC_BUFFER (1 << 1)
    803 #define TGSI_MEMBAR_SHADER_IMAGE  (1 << 2)
    804 #define TGSI_MEMBAR_SHARED        (1 << 3)
    805 #define TGSI_MEMBAR_THREAD_GROUP  (1 << 4)
    806 
    807 #ifdef __cplusplus
    808 }
    809 #endif
    810 
    811 #endif /* P_SHADER_TOKENS_H */
    812