| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| SystemZISelDAGToDAG.cpp | 623 SDValue Tmp0, Tmp1, Tmp2;
624 bool foldedLoad = TryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2);
644 SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) };
705 SDValue Tmp0, Tmp1, Tmp2;
706 bool foldedLoad = TryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2);
729 SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) };
|
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUPromoteAlloca.cpp | 709 Value *Tmp0 = Builder.CreateMul(TCntY, TCntZ, "", true, true);
710 Tmp0 = Builder.CreateMul(Tmp0, TIdX);
712 Value *TID = Builder.CreateAdd(Tmp0, Tmp1);
|
| AMDGPUISelLowering.cpp | [all...] |
| /external/llvm/lib/Transforms/Utils/ |
| IntegerDivision.cpp | 242 // ; %tmp0 = tail call i32 @llvm.ctlz.i32(i32 %divisor, i1 true)
244 // ; %sr = sub nsw i32 %tmp0, %tmp1
255 Value *Tmp0 = Builder.CreateCall(CTLZ, {Divisor, True});
257 Value *SR = Builder.CreateSub(Tmp0, Tmp1);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| AMDGPUPromoteAlloca.cpp | 789 Value *Tmp0 = Builder.CreateMul(TCntY, TCntZ, "", true, true);
790 Tmp0 = Builder.CreateMul(Tmp0, TIdX);
792 Value *TID = Builder.CreateAdd(Tmp0, Tmp1);
|
| AMDGPUCodeGenPrepare.cpp | 694 // Tmp0 = (RCP_HI == 0 ? RCP_A_E : RCP_SUB_E)
695 Value *Tmp0 = Builder.CreateSelect(RCP_HI_0_CC, RCP_A_E, RCP_S_E);
697 // Quotient = mulhu(Tmp0, Num)
698 Value *Quotient = getMulHu(Builder, Tmp0, Num);
|
| AMDGPUISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.cpp | 244 unsigned Tmp0, Tmp1, CmpReg, EqzReg, FalseReg, TrueReg;
245 Tmp0 = MRI.createVirtualRegister(MRI.getRegClass(InReg));
256 Tmp0 = InReg;
258 BuildMI(BB, DL, TII.get(Abs), Tmp0)
264 .addReg(Tmp0)
275 .addReg(Tmp0)
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/ |
| IntegerDivision.cpp | 242 // ; %tmp0 = tail call i32 @llvm.ctlz.i32(i32 %divisor, i1 true)
244 // ; %sr = sub nsw i32 %tmp0, %tmp1
255 Value *Tmp0 = Builder.CreateCall(CTLZ, {Divisor, True});
257 Value *SR = Builder.CreateSub(Tmp0, Tmp1);
|
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | [all...] |
| /external/webrtc/webrtc/modules/audio_coding/codecs/isac/main/source/ |
| structs.h | 252 double Tmp0[MAXFFTSIZE];
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
