1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Generic ULPI interface. 4 * 5 * Copyright (C) 2011 Jana Rapava <fermata7 (at) gmail.com> 6 * Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il> 7 * 8 * Authors: Jana Rapava <fermata7 (at) gmail.com> 9 * Igor Grinberg <grinberg (at) compulab.co.il> 10 * 11 * Register offsets taken from: 12 * linux/include/linux/usb/ulpi.h 13 * 14 * Original Copyrights follow: 15 * Copyright (C) 2010 Nokia Corporation 16 */ 17 18 #ifndef __USB_ULPI_H__ 19 #define __USB_ULPI_H__ 20 21 #define ULPI_ERROR (1 << 8) /* overflow from any register value */ 22 23 #ifndef CONFIG_USB_ULPI_TIMEOUT 24 #define CONFIG_USB_ULPI_TIMEOUT 1000 /* timeout in us */ 25 #endif 26 27 /* 28 * ulpi view port address and 29 * Port_number that can be passed. 30 * Any additional data to be passed can 31 * be extended from this structure 32 */ 33 struct ulpi_viewport { 34 uintptr_t viewport_addr; 35 u32 port_num; 36 }; 37 38 /* 39 * Initialize the ULPI transciever and check the interface integrity. 40 * @ulpi_vp - structure containing ULPI viewport data 41 * 42 * returns 0 on success, ULPI_ERROR on failure. 43 */ 44 int ulpi_init(struct ulpi_viewport *ulpi_vp); 45 46 /* 47 * Select transceiver speed. 48 * @speed - ULPI_FC_HIGH_SPEED, ULPI_FC_FULL_SPEED (default), 49 * ULPI_FC_LOW_SPEED, ULPI_FC_FS4LS 50 * returns 0 on success, ULPI_ERROR on failure. 51 */ 52 int ulpi_select_transceiver(struct ulpi_viewport *ulpi_vp, unsigned speed); 53 54 /* 55 * Enable/disable VBUS. 56 * @ext_power - external VBUS supply is used (default is false) 57 * @ext_indicator - external VBUS over-current indicator is used 58 * 59 * returns 0 on success, ULPI_ERROR on failure. 60 */ 61 int ulpi_set_vbus(struct ulpi_viewport *ulpi_vp, int on, int ext_power); 62 63 /* 64 * Configure VBUS indicator 65 * @external - external VBUS over-current indicator is used 66 * @passthru - disables ANDing of internal VBUS comparator 67 * with external VBUS input 68 * @complement - inverts the external VBUS input 69 */ 70 int ulpi_set_vbus_indicator(struct ulpi_viewport *ulpi_vp, int external, 71 int passthru, int complement); 72 73 /* 74 * Enable/disable pull-down resistors on D+ and D- USB lines. 75 * 76 * returns 0 on success, ULPI_ERROR on failure. 77 */ 78 int ulpi_set_pd(struct ulpi_viewport *ulpi_vp, int enable); 79 80 /* 81 * Select OpMode. 82 * @opmode - ULPI_FC_OPMODE_NORMAL (default), ULPI_FC_OPMODE_NONDRIVING, 83 * ULPI_FC_OPMODE_DISABLE_NRZI, ULPI_FC_OPMODE_NOSYNC_NOEOP 84 * 85 * returns 0 on success, ULPI_ERROR on failure. 86 */ 87 int ulpi_opmode_sel(struct ulpi_viewport *ulpi_vp, unsigned opmode); 88 89 /* 90 * Switch to Serial Mode. 91 * @smode - ULPI_IFACE_6_PIN_SERIAL_MODE or ULPI_IFACE_3_PIN_SERIAL_MODE 92 * 93 * returns 0 on success, ULPI_ERROR on failure. 94 * 95 * Notes: 96 * Switches immediately to Serial Mode. 97 * To return from Serial Mode, STP line needs to be asserted. 98 */ 99 int ulpi_serial_mode_enable(struct ulpi_viewport *ulpi_vp, unsigned smode); 100 101 /* 102 * Put PHY into low power mode. 103 * 104 * returns 0 on success, ULPI_ERROR on failure. 105 * 106 * Notes: 107 * STP line must be driven low to keep the PHY in suspend. 108 * To resume the PHY, STP line needs to be asserted. 109 */ 110 int ulpi_suspend(struct ulpi_viewport *ulpi_vp); 111 112 /* 113 * Reset the transceiver. ULPI interface and registers are not affected. 114 * 115 * returns 0 on success, ULPI_ERROR on failure. 116 */ 117 int ulpi_reset(struct ulpi_viewport *ulpi_vp); 118 119 120 /* ULPI access methods below must be implemented for each ULPI viewport. */ 121 122 /* 123 * Write to the ULPI PHY register via the viewport. 124 * @reg - the ULPI register (one of the fields in struct ulpi_regs). 125 * Due to ULPI design, only 8 lsb of address are used. 126 * @value - the value - only 8 lower bits are used, others ignored. 127 * 128 * returns 0 on success, ULPI_ERROR on failure. 129 */ 130 int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value); 131 132 /* 133 * Read the ULPI PHY register content via the viewport. 134 * @reg - the ULPI register (one of the fields in struct ulpi_regs). 135 * Due to ULPI design, only 8 lsb of address are used. 136 * 137 * returns register content on success, ULPI_ERROR on failure. 138 */ 139 u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg); 140 141 /* 142 * Wait for the reset to complete. 143 * The Link must not attempt to access the PHY until the reset has 144 * completed and DIR line is de-asserted. 145 */ 146 int ulpi_reset_wait(struct ulpi_viewport *ulpi_vp); 147 148 /* Access Extended Register Set (indicator) */ 149 #define ACCESS_EXT_REGS_OFFSET 0x2f /* read-write */ 150 /* Vendor-specific */ 151 #define VENDOR_SPEC_OFFSET 0x30 152 153 /* 154 * Extended Register Set 155 * 156 * Addresses 0x00-0x3F map directly to Immediate Register Set. 157 * Addresses 0x40-0x7F are reserved. 158 * Addresses 0x80-0xff are vendor-specific. 159 */ 160 #define EXT_VENDOR_SPEC_OFFSET 0x80 161 162 /* ULPI registers, bits and offsets definitions */ 163 struct ulpi_regs { 164 /* Vendor ID and Product ID: 0x00 - 0x03 Read-only */ 165 u8 vendor_id_low; 166 u8 vendor_id_high; 167 u8 product_id_low; 168 u8 product_id_high; 169 /* Function Control: 0x04 - 0x06 Read */ 170 u8 function_ctrl; /* 0x04 Write */ 171 u8 function_ctrl_set; /* 0x05 Set */ 172 u8 function_ctrl_clear; /* 0x06 Clear */ 173 /* Interface Control: 0x07 - 0x09 Read */ 174 u8 iface_ctrl; /* 0x07 Write */ 175 u8 iface_ctrl_set; /* 0x08 Set */ 176 u8 iface_ctrl_clear; /* 0x09 Clear */ 177 /* OTG Control: 0x0A - 0x0C Read */ 178 u8 otg_ctrl; /* 0x0A Write */ 179 u8 otg_ctrl_set; /* 0x0B Set */ 180 u8 otg_ctrl_clear; /* 0x0C Clear */ 181 /* USB Interrupt Enable Rising: 0x0D - 0x0F Read */ 182 u8 usb_ie_rising; /* 0x0D Write */ 183 u8 usb_ie_rising_set; /* 0x0E Set */ 184 u8 usb_ie_rising_clear; /* 0x0F Clear */ 185 /* USB Interrupt Enable Falling: 0x10 - 0x12 Read */ 186 u8 usb_ie_falling; /* 0x10 Write */ 187 u8 usb_ie_falling_set; /* 0x11 Set */ 188 u8 usb_ie_falling_clear; /* 0x12 Clear */ 189 /* USB Interrupt Status: 0x13 Read-only */ 190 u8 usb_int_status; 191 /* USB Interrupt Latch: 0x14 Read-only with auto-clear */ 192 u8 usb_int_latch; 193 /* Debug: 0x15 Read-only */ 194 u8 debug; 195 /* Scratch Register: 0x16 - 0x18 Read */ 196 u8 scratch; /* 0x16 Write */ 197 u8 scratch_set; /* 0x17 Set */ 198 u8 scratch_clear; /* 0x18 Clear */ 199 /* 200 * Optional Carkit registers: 201 * Carkit Control: 0x19 - 0x1B Read 202 */ 203 u8 carkit_ctrl; /* 0x19 Write */ 204 u8 carkit_ctrl_set; /* 0x1A Set */ 205 u8 carkit_ctrl_clear; /* 0x1B Clear */ 206 /* Carkit Interrupt Delay: 0x1C Read, Write */ 207 u8 carkit_int_delay; 208 /* Carkit Interrupt Enable: 0x1D - 0x1F Read */ 209 u8 carkit_ie; /* 0x1D Write */ 210 u8 carkit_ie_set; /* 0x1E Set */ 211 u8 carkit_ie_clear; /* 0x1F Clear */ 212 /* Carkit Interrupt Status: 0x20 Read-only */ 213 u8 carkit_int_status; 214 /* Carkit Interrupt Latch: 0x21 Read-only with auto-clear */ 215 u8 carkit_int_latch; 216 /* Carkit Pulse Control: 0x22 - 0x24 Read */ 217 u8 carkit_pulse_ctrl; /* 0x22 Write */ 218 u8 carkit_pulse_ctrl_set; /* 0x23 Set */ 219 u8 carkit_pulse_ctrl_clear; /* 0x24 Clear */ 220 /* 221 * Other optional registers: 222 * Transmit Positive Width: 0x25 Read, Write 223 */ 224 u8 transmit_pos_width; 225 /* Transmit Negative Width: 0x26 Read, Write */ 226 u8 transmit_neg_width; 227 /* Receive Polarity Recovery: 0x27 Read, Write */ 228 u8 recv_pol_recovery; 229 /* 230 * Addresses 0x28 - 0x2E are reserved, so we use offsets 231 * for immediate registers with higher addresses 232 */ 233 }; 234 235 /* 236 * Register Bits 237 */ 238 239 /* Function Control */ 240 #define ULPI_FC_XCVRSEL_MASK (3 << 0) 241 #define ULPI_FC_HIGH_SPEED (0 << 0) 242 #define ULPI_FC_FULL_SPEED (1 << 0) 243 #define ULPI_FC_LOW_SPEED (2 << 0) 244 #define ULPI_FC_FS4LS (3 << 0) 245 #define ULPI_FC_TERMSELECT (1 << 2) 246 #define ULPI_FC_OPMODE_MASK (3 << 3) 247 #define ULPI_FC_OPMODE_NORMAL (0 << 3) 248 #define ULPI_FC_OPMODE_NONDRIVING (1 << 3) 249 #define ULPI_FC_OPMODE_DISABLE_NRZI (2 << 3) 250 #define ULPI_FC_OPMODE_NOSYNC_NOEOP (3 << 3) 251 #define ULPI_FC_RESET (1 << 5) 252 #define ULPI_FC_SUSPENDM (1 << 6) 253 254 /* Interface Control */ 255 #define ULPI_IFACE_6_PIN_SERIAL_MODE (1 << 0) 256 #define ULPI_IFACE_3_PIN_SERIAL_MODE (1 << 1) 257 #define ULPI_IFACE_CARKITMODE (1 << 2) 258 #define ULPI_IFACE_CLOCKSUSPENDM (1 << 3) 259 #define ULPI_IFACE_AUTORESUME (1 << 4) 260 #define ULPI_IFACE_EXTVBUS_COMPLEMENT (1 << 5) 261 #define ULPI_IFACE_PASSTHRU (1 << 6) 262 #define ULPI_IFACE_PROTECT_IFC_DISABLE (1 << 7) 263 264 /* OTG Control */ 265 #define ULPI_OTG_ID_PULLUP (1 << 0) 266 #define ULPI_OTG_DP_PULLDOWN (1 << 1) 267 #define ULPI_OTG_DM_PULLDOWN (1 << 2) 268 #define ULPI_OTG_DISCHRGVBUS (1 << 3) 269 #define ULPI_OTG_CHRGVBUS (1 << 4) 270 #define ULPI_OTG_DRVVBUS (1 << 5) 271 #define ULPI_OTG_DRVVBUS_EXT (1 << 6) 272 #define ULPI_OTG_EXTVBUSIND (1 << 7) 273 274 /* 275 * USB Interrupt Enable Rising, 276 * USB Interrupt Enable Falling, 277 * USB Interrupt Status and 278 * USB Interrupt Latch 279 */ 280 #define ULPI_INT_HOST_DISCONNECT (1 << 0) 281 #define ULPI_INT_VBUS_VALID (1 << 1) 282 #define ULPI_INT_SESS_VALID (1 << 2) 283 #define ULPI_INT_SESS_END (1 << 3) 284 #define ULPI_INT_IDGRD (1 << 4) 285 286 /* Debug */ 287 #define ULPI_DEBUG_LINESTATE0 (1 << 0) 288 #define ULPI_DEBUG_LINESTATE1 (1 << 1) 289 290 /* Carkit Control */ 291 #define ULPI_CARKIT_CTRL_CARKITPWR (1 << 0) 292 #define ULPI_CARKIT_CTRL_IDGNDDRV (1 << 1) 293 #define ULPI_CARKIT_CTRL_TXDEN (1 << 2) 294 #define ULPI_CARKIT_CTRL_RXDEN (1 << 3) 295 #define ULPI_CARKIT_CTRL_SPKLEFTEN (1 << 4) 296 #define ULPI_CARKIT_CTRL_SPKRIGHTEN (1 << 5) 297 #define ULPI_CARKIT_CTRL_MICEN (1 << 6) 298 299 /* Carkit Interrupt Enable */ 300 #define ULPI_CARKIT_INT_EN_IDFLOAT_RISE (1 << 0) 301 #define ULPI_CARKIT_INT_EN_IDFLOAT_FALL (1 << 1) 302 #define ULPI_CARKIT_INT_EN_CARINTDET (1 << 2) 303 #define ULPI_CARKIT_INT_EN_DP_RISE (1 << 3) 304 #define ULPI_CARKIT_INT_EN_DP_FALL (1 << 4) 305 306 /* Carkit Interrupt Status and Latch */ 307 #define ULPI_CARKIT_INT_IDFLOAT (1 << 0) 308 #define ULPI_CARKIT_INT_CARINTDET (1 << 1) 309 #define ULPI_CARKIT_INT_DP (1 << 2) 310 311 /* Carkit Pulse Control*/ 312 #define ULPI_CARKIT_PLS_CTRL_TXPLSEN (1 << 0) 313 #define ULPI_CARKIT_PLS_CTRL_RXPLSEN (1 << 1) 314 #define ULPI_CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2) 315 #define ULPI_CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3) 316 317 318 #endif /* __USB_ULPI_H__ */ 319
