1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _AMDGPU_TEST_H_ 25 #define _AMDGPU_TEST_H_ 26 27 #include "amdgpu.h" 28 #include "amdgpu_drm.h" 29 30 /** 31 * Define max. number of card in system which we are able to handle 32 */ 33 #define MAX_CARDS_SUPPORTED 4 34 35 /* Forward reference for array to keep "drm" handles */ 36 extern int drm_amdgpu[MAX_CARDS_SUPPORTED]; 37 38 /* Global variables */ 39 extern int open_render_node; 40 41 /************************* Basic test suite ********************************/ 42 43 /* 44 * Define basic test suite to serve as the starting point for future testing 45 */ 46 47 /** 48 * Initialize basic test suite 49 */ 50 int suite_basic_tests_init(); 51 52 /** 53 * Deinitialize basic test suite 54 */ 55 int suite_basic_tests_clean(); 56 57 /** 58 * Tests in basic test suite 59 */ 60 extern CU_TestInfo basic_tests[]; 61 62 /** 63 * Initialize bo test suite 64 */ 65 int suite_bo_tests_init(); 66 67 /** 68 * Deinitialize bo test suite 69 */ 70 int suite_bo_tests_clean(); 71 72 /** 73 * Tests in bo test suite 74 */ 75 extern CU_TestInfo bo_tests[]; 76 77 /** 78 * Initialize cs test suite 79 */ 80 int suite_cs_tests_init(); 81 82 /** 83 * Deinitialize cs test suite 84 */ 85 int suite_cs_tests_clean(); 86 87 /** 88 * Decide if the suite is enabled by default or not. 89 */ 90 CU_BOOL suite_cs_tests_enable(void); 91 92 /** 93 * Tests in cs test suite 94 */ 95 extern CU_TestInfo cs_tests[]; 96 97 /** 98 * Initialize vce test suite 99 */ 100 int suite_vce_tests_init(); 101 102 /** 103 * Deinitialize vce test suite 104 */ 105 int suite_vce_tests_clean(); 106 107 /** 108 * Decide if the suite is enabled by default or not. 109 */ 110 CU_BOOL suite_vce_tests_enable(void); 111 112 /** 113 * Tests in vce test suite 114 */ 115 extern CU_TestInfo vce_tests[]; 116 117 /** 118 + * Initialize vcn test suite 119 + */ 120 int suite_vcn_tests_init(); 121 122 /** 123 + * Deinitialize vcn test suite 124 + */ 125 int suite_vcn_tests_clean(); 126 127 /** 128 * Decide if the suite is enabled by default or not. 129 */ 130 CU_BOOL suite_vcn_tests_enable(void); 131 132 /** 133 + * Tests in vcn test suite 134 + */ 135 extern CU_TestInfo vcn_tests[]; 136 137 /** 138 * Initialize uvd enc test suite 139 */ 140 int suite_uvd_enc_tests_init(); 141 142 /** 143 * Deinitialize uvd enc test suite 144 */ 145 int suite_uvd_enc_tests_clean(); 146 147 /** 148 * Decide if the suite is enabled by default or not. 149 */ 150 CU_BOOL suite_uvd_enc_tests_enable(void); 151 152 /** 153 * Tests in uvd enc test suite 154 */ 155 extern CU_TestInfo uvd_enc_tests[]; 156 157 /** 158 * Initialize deadlock test suite 159 */ 160 int suite_deadlock_tests_init(); 161 162 /** 163 * Deinitialize deadlock test suite 164 */ 165 int suite_deadlock_tests_clean(); 166 167 /** 168 * Decide if the suite is enabled by default or not. 169 */ 170 CU_BOOL suite_deadlock_tests_enable(void); 171 172 /** 173 * Tests in uvd enc test suite 174 */ 175 extern CU_TestInfo deadlock_tests[]; 176 177 /** 178 * Initialize vm test suite 179 */ 180 int suite_vm_tests_init(); 181 182 /** 183 * Deinitialize deadlock test suite 184 */ 185 int suite_vm_tests_clean(); 186 187 /** 188 * Decide if the suite is enabled by default or not. 189 */ 190 CU_BOOL suite_vm_tests_enable(void); 191 192 /** 193 * Tests in vm test suite 194 */ 195 extern CU_TestInfo vm_tests[]; 196 197 /** 198 * Helper functions 199 */ 200 static inline amdgpu_bo_handle gpu_mem_alloc( 201 amdgpu_device_handle device_handle, 202 uint64_t size, 203 uint64_t alignment, 204 uint32_t type, 205 uint64_t flags, 206 uint64_t *vmc_addr, 207 amdgpu_va_handle *va_handle) 208 { 209 struct amdgpu_bo_alloc_request req = {0}; 210 amdgpu_bo_handle buf_handle; 211 int r; 212 213 CU_ASSERT_NOT_EQUAL(vmc_addr, NULL); 214 215 req.alloc_size = size; 216 req.phys_alignment = alignment; 217 req.preferred_heap = type; 218 req.flags = flags; 219 220 r = amdgpu_bo_alloc(device_handle, &req, &buf_handle); 221 CU_ASSERT_EQUAL(r, 0); 222 223 r = amdgpu_va_range_alloc(device_handle, 224 amdgpu_gpu_va_range_general, 225 size, alignment, 0, vmc_addr, 226 va_handle, 0); 227 CU_ASSERT_EQUAL(r, 0); 228 229 r = amdgpu_bo_va_op(buf_handle, 0, size, *vmc_addr, 0, AMDGPU_VA_OP_MAP); 230 CU_ASSERT_EQUAL(r, 0); 231 232 return buf_handle; 233 } 234 235 static inline int gpu_mem_free(amdgpu_bo_handle bo, 236 amdgpu_va_handle va_handle, 237 uint64_t vmc_addr, 238 uint64_t size) 239 { 240 int r; 241 242 r = amdgpu_bo_va_op(bo, 0, size, vmc_addr, 0, AMDGPU_VA_OP_UNMAP); 243 CU_ASSERT_EQUAL(r, 0); 244 245 r = amdgpu_va_range_free(va_handle); 246 CU_ASSERT_EQUAL(r, 0); 247 248 r = amdgpu_bo_free(bo); 249 CU_ASSERT_EQUAL(r, 0); 250 251 return 0; 252 } 253 254 static inline int 255 amdgpu_bo_alloc_wrap(amdgpu_device_handle dev, unsigned size, 256 unsigned alignment, unsigned heap, uint64_t flags, 257 amdgpu_bo_handle *bo) 258 { 259 struct amdgpu_bo_alloc_request request = {}; 260 amdgpu_bo_handle buf_handle; 261 int r; 262 263 request.alloc_size = size; 264 request.phys_alignment = alignment; 265 request.preferred_heap = heap; 266 request.flags = flags; 267 268 r = amdgpu_bo_alloc(dev, &request, &buf_handle); 269 if (r) 270 return r; 271 272 *bo = buf_handle; 273 274 return 0; 275 } 276 277 static inline int 278 amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size, 279 unsigned alignment, unsigned heap, uint64_t flags, 280 amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address, 281 amdgpu_va_handle *va_handle) 282 { 283 struct amdgpu_bo_alloc_request request = {}; 284 amdgpu_bo_handle buf_handle; 285 amdgpu_va_handle handle; 286 uint64_t vmc_addr; 287 int r; 288 289 request.alloc_size = size; 290 request.phys_alignment = alignment; 291 request.preferred_heap = heap; 292 request.flags = flags; 293 294 r = amdgpu_bo_alloc(dev, &request, &buf_handle); 295 if (r) 296 return r; 297 298 r = amdgpu_va_range_alloc(dev, 299 amdgpu_gpu_va_range_general, 300 size, alignment, 0, &vmc_addr, 301 &handle, 0); 302 if (r) 303 goto error_va_alloc; 304 305 r = amdgpu_bo_va_op(buf_handle, 0, size, vmc_addr, 0, AMDGPU_VA_OP_MAP); 306 if (r) 307 goto error_va_map; 308 309 r = amdgpu_bo_cpu_map(buf_handle, cpu); 310 if (r) 311 goto error_cpu_map; 312 313 *bo = buf_handle; 314 *mc_address = vmc_addr; 315 *va_handle = handle; 316 317 return 0; 318 319 error_cpu_map: 320 amdgpu_bo_cpu_unmap(buf_handle); 321 322 error_va_map: 323 amdgpu_bo_va_op(buf_handle, 0, size, vmc_addr, 0, AMDGPU_VA_OP_UNMAP); 324 325 error_va_alloc: 326 amdgpu_bo_free(buf_handle); 327 return r; 328 } 329 330 static inline int 331 amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle va_handle, 332 uint64_t mc_addr, uint64_t size) 333 { 334 amdgpu_bo_cpu_unmap(bo); 335 amdgpu_bo_va_op(bo, 0, size, mc_addr, 0, AMDGPU_VA_OP_UNMAP); 336 amdgpu_va_range_free(va_handle); 337 amdgpu_bo_free(bo); 338 339 return 0; 340 341 } 342 343 static inline int 344 amdgpu_get_bo_list(amdgpu_device_handle dev, amdgpu_bo_handle bo1, 345 amdgpu_bo_handle bo2, amdgpu_bo_list_handle *list) 346 { 347 amdgpu_bo_handle resources[] = {bo1, bo2}; 348 349 return amdgpu_bo_list_create(dev, bo2 ? 2 : 1, resources, NULL, list); 350 } 351 352 353 static inline CU_ErrorCode amdgpu_set_suite_active(const char *suite_name, 354 CU_BOOL active) 355 { 356 CU_ErrorCode r = CU_set_suite_active(CU_get_suite(suite_name), active); 357 358 if (r != CUE_SUCCESS) 359 fprintf(stderr, "Failed to obtain suite %s\n", suite_name); 360 361 return r; 362 } 363 364 static inline CU_ErrorCode amdgpu_set_test_active(const char *suite_name, 365 const char *test_name, CU_BOOL active) 366 { 367 CU_ErrorCode r; 368 CU_pSuite pSuite = CU_get_suite(suite_name); 369 370 if (!pSuite) { 371 fprintf(stderr, "Failed to obtain suite %s\n", 372 suite_name); 373 return CUE_NOSUITE; 374 } 375 376 r = CU_set_test_active(CU_get_test(pSuite, test_name), active); 377 if (r != CUE_SUCCESS) 378 fprintf(stderr, "Failed to obtain test %s\n", test_name); 379 380 return r; 381 } 382 383 #endif /* #ifdef _AMDGPU_TEST_H_ */ 384
