| /external/u-boot/board/freescale/mpc8541cds/ |
| mpc8541cds.c | 236 uint clkdiv; local
251 clkdiv = lbc->lcrr & LCRR_CLKDIV;
252 lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv;
|
| /external/u-boot/board/freescale/mpc8548cds/ |
| mpc8548cds.c | 69 uint clkdiv; local
73 clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2;
76 if (clkdiv == 16) {
78 } else if (clkdiv == 8) {
80 } else if (clkdiv == 4) {
|
| /external/u-boot/board/freescale/mpc8555cds/ |
| mpc8555cds.c | 234 uint clkdiv; local
249 clkdiv = lbc->lcrr & LCRR_CLKDIV;
250 lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv;
|
| /external/u-boot/board/freescale/mpc8568mds/ |
| mpc8568mds.c | 132 uint clkdiv; local
136 clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2;
139 if (clkdiv == 16) {
141 } else if (clkdiv == 8) {
143 } else if (clkdiv == 4) {
|
| /external/u-boot/board/freescale/mpc8569mds/ |
| mpc8569mds.c | 290 uint clkdiv; local
294 clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2;
297 if (clkdiv == 16)
299 else if (clkdiv == 8)
301 else if (clkdiv == 4)
|
| /external/u-boot/board/sbc8548/ |
| sbc8548.c | 60 uint clkdiv, lbc_mhz, lcrr = CONFIG_SYS_LBC_LCRR; local
66 clkdiv = sysinfo.freq_systembus / sysinfo.freq_localbus;
68 debug("LCRR=0x%x, CD=%d, MHz=%d\n", lcrr, clkdiv, lbc_mhz);
71 if (clkdiv == 16) {
73 } else if (clkdiv == 8) {
75 } else if (clkdiv == 4) {
|
| /external/u-boot/arch/arm/include/asm/arch-rockchip/ |
| i2c.h | 12 u32 clkdiv; member in struct:i2c_regs
|
| /external/u-boot/board/socrates/ |
| socrates.c | 139 uint clkdiv; local
144 clkdiv = lbc->lcrr & LCRR_CLKDIV;
145 lbc_mhz = sysinfo.freq_systembus / 1000000 / clkdiv;
|
| /external/u-boot/drivers/mmc/ |
| arm_pl180_mmci.c | 291 u32 clkdiv = 0; local
295 clkdiv = 0;
298 clkdiv = (host->clock_in / dev->clock) - 2;
301 tmp_clock = host->clock_in / (clkdiv + 2);
303 clkdiv++;
304 tmp_clock = host->clock_in / (clkdiv + 2);
307 if (clkdiv > SDI_CLKCR_CLKDIV_MASK)
308 clkdiv = SDI_CLKCR_CLKDIV_MASK;
310 tmp_clock = host->clock_in / (clkdiv + 2);
313 sdi_clkcr |= clkdiv;
[all...] |
| gen_atmel_mci.c | 105 u32 clkdiv = 255; local
114 clkdiv = DIV_ROUND_UP(bus_hz, hz) - 2;
115 if (clkdiv > 511)
116 clkdiv = 511;
118 clkodd = clkdiv & 1;
119 clkdiv >>= 1;
122 bus_hz / (clkdiv * 2 + clkodd + 2), blklen);
124 /* find clkdiv yielding a rate <= than requested */
125 for (clkdiv = 0; clkdiv < 255; clkdiv++)
[all...] |
| sh_sdhi.c | 173 u32 clkdiv, i, timeout; local
186 clkdiv = 0x80;
188 for (; clkdiv && clk >= (i << 1); (clkdiv >>= 1))
191 sh_sdhi_writew(host, SDHI_CLK_CTRL, clkdiv);
|
| /external/u-boot/drivers/net/ |
| davinci_emac.c | 149 u_int32_t clkdiv; local
151 clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV;
153 writel((clkdiv & 0xff) |
417 u_int32_t clkdiv, cnt, mac_control; local
435 clkdiv = readl(&adap_ewrap->EWCTL);
500 clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV;
501 writel((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT,
|
| keystone_net.c | 122 u_int32_t clkdiv; local
125 clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1;
127 writel((clkdiv & 0xffff) | MDIO_CONTROL_ENABLE |
|
| /external/u-boot/drivers/mtd/nand/ |
| lpc32xx_nand_mlc.c | 85 #define clkdiv(v, w, o) (((1+(clk/v)) & w) << o) macro
138 clkdiv(CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY, 0x03, 24) |
139 clkdiv(CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY, 0x1F, 19) |
140 clkdiv(CONFIG_LPC32XX_NAND_MLC_NAND_TA, 0x07, 16) |
141 clkdiv(CONFIG_LPC32XX_NAND_MLC_RD_HIGH, 0x0F, 12) |
142 clkdiv(CONFIG_LPC32XX_NAND_MLC_RD_LOW, 0x0F, 8) |
143 clkdiv(CONFIG_LPC32XX_NAND_MLC_WR_HIGH, 0x0F, 4) |
144 clkdiv(CONFIG_LPC32XX_NAND_MLC_WR_LOW, 0x0F, 0),
|
| /external/u-boot/drivers/clk/ |
| clk_stm32mp1.c | 1500 unsigned int clkdiv[CLKDIV_NB]; local
[all...] |
