| /external/u-boot/drivers/ddr/marvell/axp/ |
| xor.c | 25 u32 reg, ui, base, cs_count; local
49 cs_count = 0;
71 reg_write(XOR_BASE_ADDR_REG(0, cs_count), base);
74 reg_write(XOR_SIZE_MASK_REG(0, cs_count), 0x0FFF0000);
75 cs_count++;
|
| ddr3_init.c | 1073 u32 cs_count = 0; local
1078 cs_count++;
1081 return cs_count;
|
| ddr3_pbs.c | 1532 u32 cs, cs_count, cs_tmp; local
[all...] |
| ddr3_dqs.c | 310 u32 uj, cs_count, cs_tmp, ii; local
332 cs_count = 0;
335 cs_count++;
337 sdram_offset = cs_count * (SDRAM_CS_SIZE + 1);
1329 u32 cs, cs_count, cs_tmp, victim_dq; local
[all...] |
| ddr3_spd.c | 585 __maybe_unused u32 dimm_cnt, cs_count, dimm; local
894 cs_count = 0;
898 if (dimm_info[dimm_cnt].num_of_module_ranks == cs_count) {
900 cs_count = 0;
902 cs_count++;
918 cs_count = 0;
922 if (dimm_info[dimm_cnt].num_of_module_ranks == cs_count) {
924 cs_count = 0;
926 cs_count++;
1011 cs_count = 0
[all...] |
| /external/u-boot/drivers/ddr/marvell/a38x/ |
| xor.c | 22 u32 reg, ui, cs_count; local
34 for (ui = 0, cs_count = 0;
35 (cs_count < num_of_cs) && (ui < 8);
36 ui++, cs_count++) {
47 cs_count = 0;
48 for (ui = 0, cs_count = 0;
49 (cs_count < num_of_cs) && (ui < 8);
50 ui++, cs_count++) {
|
| ddr3_training.c | 318 u32 cs_count; local
326 cs_count = 0;
331 cs_count++;
335 curr_cs_num = cs_count;
336 } else if (cs_count != curr_cs_num) {
339 if_id, bus_cnt, cs_count,
[all...] |
| /external/wpa_supplicant_8/src/ap/ |
| hostapd.h | 271 u8 cs_count; member in struct:hostapd_data
|
| /external/wpa_supplicant_8/src/drivers/ |
| driver.h | 2035 u8 cs_count; member in struct:csa_settings
[all...] |
