/external/icu/icu4c/source/i18n/ |
casetrn.cpp | 39 UCaseContext *csc=(UCaseContext *)context; local 40 Replaceable *rep=(Replaceable *)csc->p; 45 csc->index=csc->cpStart; 46 csc->dir=dir; 49 csc->index=csc->cpLimit; 50 csc->dir=dir; 53 dir=csc->dir; 59 if(csc->start<csc->index) 143 UCaseContext csc; local [all...] |
titletrn.cpp | 113 UCaseContext csc; local 114 uprv_memset(&csc, 0, sizeof(csc)); 115 csc.p = &text; 116 csc.start = offsets.contextStart; 117 csc.limit = offsets.contextLimit; 124 csc.cpStart=textPos; 126 csc.cpLimit=textPos+=U16_LENGTH(c); 131 result=ucase_toFullTitle(c, utrans_rep_caseContextIterator, &csc, &s, UCASE_LOC_ROOT); 133 result=ucase_toFullLower(c, utrans_rep_caseContextIterator, &csc, &s, UCASE_LOC_ROOT) [all...] |
/external/mesa3d/src/gallium/state_trackers/xvmc/ |
attributes.c | 80 vl_csc_matrix csc; local 111 &context_priv->procamp, true, &csc 113 vl_compositor_set_csc_matrix(&context_priv->cstate, (const vl_csc_matrix *)&csc, 1.0f, 0.0f);
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context.c | 196 vl_csc_matrix csc; local 296 &context_priv->procamp, true, &csc 298 vl_compositor_set_csc_matrix(&context_priv->cstate, (const vl_csc_matrix *)&csc, 1.0f, 0.0f);
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/external/mesa3d/src/gallium/state_trackers/vdpau/ |
output.c | 504 vl_csc_matrix csc; local 505 vl_csc_get_matrix(VL_CSC_COLOR_STANDARD_BT_601, NULL, 1, &csc); 506 if (!vl_compositor_set_csc_matrix(cstate, (const vl_csc_matrix*)&csc, 1.0f, 0.0f))
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vdpau_private.h | 397 vl_csc_matrix csc; member in struct:__anon34070
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/external/mesa3d/src/gallium/winsys/radeon/drm/ |
radeon_drm_cs.c | 86 static bool radeon_init_cs_context(struct radeon_cs_context *csc, 91 csc->fd = ws->fd; 93 csc->chunks[0].chunk_id = RADEON_CHUNK_ID_IB; 94 csc->chunks[0].length_dw = 0; 95 csc->chunks[0].chunk_data = (uint64_t)(uintptr_t)csc->buf; 96 csc->chunks[1].chunk_id = RADEON_CHUNK_ID_RELOCS; 97 csc->chunks[1].length_dw = 0; 98 csc->chunks[1].chunk_data = (uint64_t)(uintptr_t)csc->relocs 230 struct radeon_cs_context *csc = cs->csc; local 288 struct radeon_cs_context *csc = cs->csc; local 449 struct radeon_cs_context *csc = ((struct radeon_drm_cs*)job)->cst; local [all...] |
radeon_drm_cs.h | 77 struct radeon_cs_context *csc; member in struct:radeon_drm_cs 92 int radeon_lookup_buffer(struct radeon_cs_context *csc, struct radeon_bo *bo); 106 (num_refs && radeon_lookup_buffer(cs->csc, bo) != -1); 118 index = radeon_lookup_buffer(cs->csc, bo); 123 index = cs->csc->slab_buffers[index].u.slab.real_idx; 125 return cs->csc->relocs[index].write_domain != 0;
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/external/icu/icu4c/source/common/ |
ucasemap.cpp | 170 UCaseContext *csc=(UCaseContext *)context; local 175 csc->index=csc->cpStart; 176 csc->dir=dir; 179 csc->index=csc->cpLimit; 180 csc->dir=dir; 183 dir=csc->dir; 187 if(csc->start<csc->index) 434 UCaseContext csc=UCASECONTEXT_INITIALIZER; local 726 UCaseContext csc=UCASECONTEXT_INITIALIZER; local 743 UCaseContext csc=UCASECONTEXT_INITIALIZER; local [all...] |
ustrcase.cpp | 168 UCaseContext *csc=(UCaseContext *)context; local 173 csc->index=csc->cpStart; 174 csc->dir=dir; 177 csc->index=csc->cpLimit; 178 csc->dir=dir; 181 dir=csc->dir; 185 if(csc->start<csc->index) 410 UCaseContext csc=UCASECONTEXT_INITIALIZER; local 1176 UCaseContext csc=UCASECONTEXT_INITIALIZER; local 1198 UCaseContext csc=UCASECONTEXT_INITIALIZER; local [all...] |
/external/mesa3d/src/gallium/state_trackers/va/ |
va_private.h | 234 vl_csc_matrix csc; member in struct:__anon34058
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/external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
amdgpu_cs.h | 125 struct amdgpu_cs_context *csc; member in struct:amdgpu_cs 224 (num_refs && amdgpu_lookup_buffer(cs->csc, bo) != -1); 238 index = amdgpu_lookup_buffer(cs->csc, bo); 242 buffer = bo->bo ? &cs->csc->real_buffers[index] : 243 bo->sparse ? &cs->csc->sparse_buffers[index] : 244 &cs->csc->slab_buffers[index];
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/external/mesa3d/src/gallium/auxiliary/vl/ |
vl_compositor.c | 210 struct ureg_src csc[3]; local 216 csc[i] = ureg_DECL_constant(shader, i); 227 ureg_DP4(shader, ureg_writemask(fragment, TGSI_WRITEMASK_X << i), csc[i], 349 struct ureg_src csc[3]; local 362 csc[i] = ureg_DECL_constant(shader, i); 383 * fragment.xyz = tex(texel, palette) * csc 392 ureg_DP4(shader, ureg_writemask(fragment, TGSI_WRITEMASK_X << i), csc[i], ureg_src(texel)); 443 struct ureg_src csc[3]; local 451 csc[i] = ureg_DECL_constant(shader, i); 461 ureg_DP4(shader, ureg_writemask(fragment, TGSI_WRITEMASK_X), csc[0], ureg_src(texel)) [all...] |
/external/u-boot/drivers/video/ |
ipu_disp.c | 467 /* Transform color key from rgb to yuv if CSC is enabled */ 652 uint32_t csc; local 670 csc = reg & DP_COM_CONF_CSC_DEF_MASK; 671 if (csc == DP_COM_CONF_CSC_DEF_FG) [all...] |
/external/ipsec-tools/src/racoon/ |
crypto_openssl.c | 470 X509_STORE_CTX *csc; local 534 csc = X509_STORE_CTX_new(); 535 if (csc == NULL) 537 X509_STORE_CTX_init(csc, cert_ctx, x509, NULL); 539 X509_STORE_CTX_set_flags (csc, X509_V_FLAG_CRL_CHECK); 540 X509_STORE_CTX_set_flags (csc, X509_V_FLAG_CRL_CHECK_ALL); 542 error = X509_verify_cert(csc); 543 X509_STORE_CTX_free(csc); [all...] |
/external/u-boot/tools/ |
mxsimage.c | 1816 uint8_t csn, csc = ccmd->header.checksum; local [all...] |
/bionic/libc/kernel/uapi/linux/ |
omap3isp.h | 332 struct omap3isp_prev_csc __user * csc; member in struct:omap3isp_prev_update_config
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/external/kernel-headers/original/uapi/linux/ |
omap3isp.h | 570 * @offset: CSC offset values for Y offset, CB offset and CR offset respectively 645 * @csc: Pointer to structure for Color Space Conversion from RGB-YCbYCr. 662 struct omap3isp_prev_csc __user *csc; member in struct:omap3isp_prev_update_config
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