| /external/u-boot/board/freescale/mx6sabreauto/ |
| mx6sabreauto.c | 264 int cscmr1, ccgr6; local
277 cscmr1 = readl(&imx_ccm->cscmr1);
278 cscmr1 &= ~(MXC_CCM_CSCMR1_ACLK_EMI_SLOW_MASK |
280 cscmr1 |= (1 << MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_OFFSET);
281 writel(cscmr1, &imx_ccm->cscmr1);
|
| /external/u-boot/arch/arm/mach-imx/mx5/ |
| clock.c | 77 clrsetbits_le32(&mxc_ccm->cscmr1,
120 clrbits_le32(&mxc_ccm->cscmr1, MXC_CCM_CSCMR1_USB_PHY_CLK_SEL);
351 reg = readl(&mxc_ccm->cscmr1);
369 u32 cscmr1 = readl(&mxc_ccm->cscmr1); local
374 clk_sel = MXC_CCM_CSCMR1_CSPI_CLK_SEL_RD(cscmr1);
386 u32 cscmr1 = readl(&mxc_ccm->cscmr1); local
391 clk_sel = MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_RD(cscmr1);
396 clk_sel = MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_RD(cscmr1);
[all...] |
| /external/u-boot/arch/arm/mach-imx/mx6/ |
| clock.c | 385 reg = __raw_readl(&imx_ccm->cscmr1);
453 u32 emi_clk_sel, emi_slow_podf, cscmr1, root_freq = 0; local
455 cscmr1 = __raw_readl(&imx_ccm->cscmr1);
456 emi_clk_sel = cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_MASK;
458 emi_slow_podf = cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK;
738 clrsetbits_le32(&imx_ccm->cscmr1,
760 clrsetbits_le32(&imx_ccm->cscmr1,
866 reg = readl(&imx_ccm->cscmr1);
871 writel(reg, &imx_ccm->cscmr1);
984 u32 cscmr1 = __raw_readl(&imx_ccm->cscmr1); local
[all...] |
| /external/u-boot/arch/arm/include/asm/arch-vf610/ |
| crm_regs.h | 19 u32 cscmr1; member in struct:ccm_reg
|
| /external/u-boot/arch/arm/include/asm/arch-mx5/ |
| imx-regs.h | 308 u32 cscmr1; member in struct:clkctl
|
| crm_regs.h | 36 u32 cscmr1; member in struct:mxc_ccm_reg
157 /* Define the bits in register CSCMR1 */
|
| /external/u-boot/arch/arm/include/asm/arch-mx6/ |
| crm_regs.h | 29 u32 cscmr1; member in struct:mxc_ccm_reg
296 /* Define the bits in register CSCMR1 */
[all...] |
