| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/ |
| fcadd-diagnostics.s | 6 fcadd z0.d, p2/m, z1.d, z2.d, #90 label
8 // CHECK-NEXT: fcadd z0.d, p2/m, z1.d, z2.d, #90
15 fcadd z0.d, p8/m, z0.d, z1.d, #90 label
17 // CHECK-NEXT: fcadd z0.d, p8/m, z0.d, z1.d, #90
24 fcadd z0.d, p0/m, z0.d, z1.d, #0 label
26 // CHECK-NEXT: fcadd z0.d, p0/m, z0.d, z1.d, #0
29 fcadd z0.d, p0/m, z0.d, z1.d, #180 label
31 // CHECK-NEXT: fcadd z0.d, p0/m, z0.d, z1.d, #180
34 fcadd z0.d, p0/m, z0.d, z1.d, #450 label
36 // CHECK-NEXT: fcadd z0.d, p0/m, z0.d, z1.d, #45
[all...] |
| fcadd.s | 10 fcadd z0.h, p0/m, z0.h, z0.h, #90 label
11 // CHECK-INST: fcadd z0.h, p0/m, z0.h, z0.h, #90
16 fcadd z0.s, p0/m, z0.s, z0.s, #90 label
17 // CHECK-INST: fcadd z0.s, p0/m, z0.s, z0.s, #90
22 fcadd z0.d, p0/m, z0.d, z0.d, #90 label
23 // CHECK-INST: fcadd z0.d, p0/m, z0.d, z0.d, #90
28 fcadd z31.h, p7/m, z31.h, z31.h, #270 label
29 // CHECK-INST: fcadd z31.h, p7/m, z31.h, z31.h, #270
34 fcadd z31.s, p7/m, z31.s, z31.s, #270 label
35 // CHECK-INST: fcadd z31.s, p7/m, z31.s, z31.s, #27
40 fcadd z31.d, p7\/m, z31.d, z31.d, #270 label
56 fcadd z4.d, p7\/m, z4.d, z31.d, #270 label
68 fcadd z4.d, p7\/m, z4.d, z31.d, #270 label
[all...] |
| /external/vixl/src/aarch64/ |
| logic-aarch64.cc | 2234 LogicVRegister Simulator::fcadd(VectorFormat vform, function in class:vixl::aarch64::Simulator
2270 LogicVRegister Simulator::fcadd(VectorFormat vform, function in class:vixl::aarch64::Simulator
[all...] |
