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      1 /*
      2  * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
      3  *
      4  * SPDX-License-Identifier: BSD-3-Clause
      5  */
      6 
      7 #ifndef __INTERRUPT_MGMT_H__
      8 #define __INTERRUPT_MGMT_H__
      9 
     10 #include <arch.h>
     11 
     12 /*******************************************************************************
     13  * Constants for the types of interrupts recognised by the IM framework
     14  ******************************************************************************/
     15 #define INTR_TYPE_S_EL1			U(0)
     16 #define INTR_TYPE_EL3			U(1)
     17 #define INTR_TYPE_NS			U(2)
     18 #define MAX_INTR_TYPES			U(3)
     19 #define INTR_TYPE_INVAL			MAX_INTR_TYPES
     20 
     21 /* Interrupt routing modes */
     22 #define INTR_ROUTING_MODE_PE		0
     23 #define INTR_ROUTING_MODE_ANY		1
     24 
     25 /*
     26  * Constant passed to the interrupt handler in the 'id' field when the
     27  * framework does not read the gic registers to determine the interrupt id.
     28  */
     29 #define INTR_ID_UNAVAILABLE		U(0xFFFFFFFF)
     30 
     31 
     32 /*******************************************************************************
     33  * Mask for _both_ the routing model bits in the 'flags' parameter and
     34  * constants to define the valid routing models for each supported interrupt
     35  * type
     36  ******************************************************************************/
     37 #define INTR_RM_FLAGS_SHIFT		U(0x0)
     38 #define INTR_RM_FLAGS_MASK		U(0x3)
     39 /* Routed to EL3 from NS. Taken to S-EL1 from Secure */
     40 #define INTR_SEL1_VALID_RM0		U(0x2)
     41 /* Routed to EL3 from NS and Secure */
     42 #define INTR_SEL1_VALID_RM1		U(0x3)
     43 /* Routed to EL1/EL2 from NS and to S-EL1 from Secure */
     44 #define INTR_NS_VALID_RM0		U(0x0)
     45 /* Routed to EL1/EL2 from NS and to EL3 from Secure */
     46 #define INTR_NS_VALID_RM1		U(0x1)
     47 /* Routed to EL3 from NS. Taken to S-EL1 from Secure and handed over to EL3 */
     48 #define INTR_EL3_VALID_RM0		U(0x2)
     49 /* Routed to EL3 from NS and Secure */
     50 #define INTR_EL3_VALID_RM1		U(0x3)
     51 /* This is the default routing model */
     52 #define INTR_DEFAULT_RM			U(0x0)
     53 
     54 /*******************************************************************************
     55  * Constants for the _individual_ routing model bits in the 'flags' field for
     56  * each interrupt type and mask to validate the 'flags' parameter while
     57  * registering an interrupt handler
     58  ******************************************************************************/
     59 #define INTR_TYPE_FLAGS_MASK		U(0xFFFFFFFC)
     60 
     61 #define INTR_RM_FROM_SEC_SHIFT		SECURE		/* BIT[0] */
     62 #define INTR_RM_FROM_NS_SHIFT		NON_SECURE	/* BIT[1] */
     63 #define INTR_RM_FROM_FLAG_MASK		U(1)
     64 #define get_interrupt_rm_flag(flag, ss)	(((flag >> INTR_RM_FLAGS_SHIFT) >> ss) \
     65 					 & INTR_RM_FROM_FLAG_MASK)
     66 #define set_interrupt_rm_flag(flag, ss)	(flag |= U(1) << ss)
     67 #define clr_interrupt_rm_flag(flag, ss)	(flag &= ~(U(1) << ss))
     68 
     69 
     70 /*******************************************************************************
     71  * Macros to validate the routing model bits in the 'flags' for a type
     72  * of interrupt. If the model does not match one of the valid masks
     73  * -EINVAL is returned.
     74  ******************************************************************************/
     75 #define validate_sel1_interrupt_rm(x)	((x) == INTR_SEL1_VALID_RM0 ? 0 : \
     76 					 ((x) == INTR_SEL1_VALID_RM1 ? 0 :\
     77 					  -EINVAL))
     78 
     79 #define validate_ns_interrupt_rm(x)	((x) == INTR_NS_VALID_RM0 ? 0 : \
     80 					 ((x) == INTR_NS_VALID_RM1 ? 0 :\
     81 					  -EINVAL))
     82 
     83 #define validate_el3_interrupt_rm(x)	((x) == INTR_EL3_VALID_RM0 ? 0 : \
     84 					 ((x) == INTR_EL3_VALID_RM1 ? 0 :\
     85 					  -EINVAL))
     86 
     87 /*******************************************************************************
     88  * Macros to set the 'flags' parameter passed to an interrupt type handler. Only
     89  * the flag to indicate the security state when the exception was generated is
     90  * supported.
     91  ******************************************************************************/
     92 #define INTR_SRC_SS_FLAG_SHIFT		U(0)		/* BIT[0] */
     93 #define INTR_SRC_SS_FLAG_MASK		U(1)
     94 #define set_interrupt_src_ss(flag, val)	(flag |= val << INTR_SRC_SS_FLAG_SHIFT)
     95 #define clr_interrupt_src_ss(flag)	(flag &= ~(U(1) << INTR_SRC_SS_FLAG_SHIFT))
     96 #define get_interrupt_src_ss(flag)	((flag >> INTR_SRC_SS_FLAG_SHIFT) & \
     97 					 INTR_SRC_SS_FLAG_MASK)
     98 
     99 #ifndef __ASSEMBLY__
    100 
    101 #include <stdint.h>
    102 
    103 /* Prototype for defining a handler for an interrupt type */
    104 typedef uint64_t (*interrupt_type_handler_t)(uint32_t id,
    105 					     uint32_t flags,
    106 					     void *handle,
    107 					     void *cookie);
    108 
    109 /*******************************************************************************
    110  * Function & variable prototypes
    111  ******************************************************************************/
    112 uint32_t get_scr_el3_from_routing_model(uint32_t security_state);
    113 int32_t set_routing_model(uint32_t type, uint32_t flags);
    114 int32_t register_interrupt_type_handler(uint32_t type,
    115 					interrupt_type_handler_t handler,
    116 					uint32_t flags);
    117 interrupt_type_handler_t get_interrupt_type_handler(uint32_t interrupt_type);
    118 int disable_intr_rm_local(uint32_t type, uint32_t security_state);
    119 int enable_intr_rm_local(uint32_t type, uint32_t security_state);
    120 
    121 #endif /*__ASSEMBLY__*/
    122 #endif /* __INTERRUPT_MGMT_H__ */
    123