1 /****************************************************************************** 2 * 3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 /** 19 ******************************************************************************* 20 * @file 21 * ihevcd_process_slice.c 22 * 23 * @brief 24 * Contains functions for processing slice data 25 * 26 * @author 27 * Harish 28 * 29 * @par List of Functions: 30 * 31 * @remarks 32 * None 33 * 34 ******************************************************************************* 35 */ 36 /*****************************************************************************/ 37 /* File Includes */ 38 /*****************************************************************************/ 39 #include <stdio.h> 40 #include <stddef.h> 41 #include <stdlib.h> 42 #include <string.h> 43 #include <assert.h> 44 45 #include "ihevc_typedefs.h" 46 #include "iv.h" 47 #include "ivd.h" 48 #include "ihevcd_cxa.h" 49 #include "ithread.h" 50 51 #include "ihevc_defs.h" 52 #include "ihevc_debug.h" 53 #include "ihevc_defs.h" 54 #include "ihevc_structs.h" 55 #include "ihevc_macros.h" 56 #include "ihevc_platform_macros.h" 57 #include "ihevc_cabac_tables.h" 58 #include "ihevc_padding.h" 59 #include "ihevc_iquant_itrans_recon.h" 60 #include "ihevc_chroma_iquant_itrans_recon.h" 61 #include "ihevc_recon.h" 62 #include "ihevc_chroma_recon.h" 63 #include "ihevc_iquant_recon.h" 64 #include "ihevc_chroma_iquant_recon.h" 65 #include "ihevc_intra_pred.h" 66 67 #include "ihevc_error.h" 68 #include "ihevc_common_tables.h" 69 #include "ihevc_quant_tables.h" 70 #include "ihevcd_common_tables.h" 71 72 #include "ihevcd_profile.h" 73 #include "ihevcd_trace.h" 74 #include "ihevcd_defs.h" 75 #include "ihevcd_function_selector.h" 76 #include "ihevcd_structs.h" 77 #include "ihevcd_error.h" 78 #include "ihevcd_nal.h" 79 #include "ihevcd_bitstream.h" 80 #include "ihevcd_job_queue.h" 81 #include "ihevcd_utils.h" 82 #include "ihevcd_debug.h" 83 #include "ihevcd_get_mv.h" 84 #include "ihevcd_inter_pred.h" 85 #include "ihevcd_iquant_itrans_recon_ctb.h" 86 #include "ihevcd_boundary_strength.h" 87 #include "ihevcd_deblk.h" 88 #include "ihevcd_fmt_conv.h" 89 #include "ihevcd_sao.h" 90 #include "ihevcd_profile.h" 91 92 IHEVCD_ERROR_T ihevcd_fmt_conv(codec_t *ps_codec, 93 process_ctxt_t *ps_proc, 94 UWORD8 *pu1_y_dst, 95 UWORD8 *pu1_u_dst, 96 UWORD8 *pu1_v_dst, 97 WORD32 cur_row, 98 WORD32 num_rows); 99 100 typedef enum 101 { 102 PROC_ALL, 103 PROC_INTER_PRED, 104 PROC_RECON, 105 PROC_DEBLK, 106 PROC_SAO 107 }proc_type_t; 108 109 void ihevcd_proc_map_check(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD32 nctb) 110 { 111 tile_t *ps_tile = ps_proc->ps_tile; 112 sps_t *ps_sps = ps_proc->ps_sps; 113 pps_t *ps_pps = ps_proc->ps_pps; 114 codec_t *ps_codec = ps_proc->ps_codec; 115 WORD32 idx; 116 WORD32 nop_cnt; 117 WORD32 bit_pos = proc_type; 118 WORD32 bit_mask = (1 << bit_pos); 119 120 if(ps_proc->i4_check_proc_status) 121 { 122 nop_cnt = PROC_NOP_CNT; 123 while(1) 124 { 125 volatile UWORD8 *pu1_buf; 126 volatile WORD32 status; 127 status = 1; 128 /* Check if all dependencies for the next nCTBs are met */ 129 { 130 WORD32 x_pos; 131 132 { 133 /* Check if the top right of next nCTBs are processed */ 134 if(ps_proc->i4_ctb_y > 0) 135 { 136 x_pos = (ps_proc->i4_ctb_tile_x + nctb); 137 idx = MIN(x_pos, (ps_tile->u2_wd - 1)); 138 139 /* Check if top-right CTB for the last CTB in nCTB is within the tile */ 140 { 141 idx += ps_tile->u1_pos_x; 142 idx += ((ps_proc->i4_ctb_y - 1) 143 * ps_sps->i2_pic_wd_in_ctb); 144 pu1_buf = (ps_codec->pu1_proc_map + idx); 145 status = *pu1_buf & bit_mask; 146 } 147 } 148 } 149 150 /* If tiles are enabled, then test left and top-left as well */ 151 ps_pps = ps_proc->ps_pps; 152 if(ps_pps->i1_tiles_enabled_flag) 153 { 154 /*Check if left ctb is processed*/ 155 if((ps_proc->i4_ctb_x > 0) && ((0 != status))) 156 { 157 x_pos = ps_tile->u1_pos_x + ps_proc->i4_ctb_tile_x - 1; 158 idx = x_pos + (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb); 159 pu1_buf = (ps_codec->pu1_proc_map + idx); 160 status = *pu1_buf & bit_mask; 161 } 162 163 /*Check if top left ctb is processed*/ 164 if((ps_proc->i4_ctb_x > 0) && (0 != status) && (ps_proc->i4_ctb_y > 0)) 165 { 166 x_pos = ps_tile->u1_pos_x + ps_proc->i4_ctb_tile_x - 1; 167 idx = x_pos + ((ps_proc->i4_ctb_y - 1) * ps_sps->i2_pic_wd_in_ctb); 168 pu1_buf = (ps_codec->pu1_proc_map + idx); 169 status = *pu1_buf & bit_mask; 170 } 171 } 172 } 173 174 if(status) 175 break; 176 177 /* if dependencies are not met, then wait for few cycles. 178 * Even after few iterations, if the dependencies are not met then yield 179 */ 180 if(nop_cnt > 0) 181 { 182 NOP(128); 183 nop_cnt -= 128; 184 } 185 else 186 { 187 nop_cnt = PROC_NOP_CNT; 188 ithread_yield(); 189 //NOP(128 * 16); 190 } 191 } 192 DATA_SYNC(); 193 } 194 } 195 196 void ihevcd_proc_map_update(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD32 nctb) 197 { 198 codec_t *ps_codec = ps_proc->ps_codec; 199 WORD32 i, idx; 200 WORD32 bit_pos = proc_type; 201 WORD32 bit_mask = (1 << bit_pos); 202 203 /* Update the current CTBs processing status */ 204 if(ps_proc->i4_check_proc_status) 205 { 206 DATA_SYNC(); 207 for(i = 0; i < nctb; i++) 208 { 209 sps_t *ps_sps = ps_proc->ps_sps; 210 UWORD8 *pu1_buf; 211 idx = (ps_proc->i4_ctb_x + i); 212 idx += ((ps_proc->i4_ctb_y) * ps_sps->i2_pic_wd_in_ctb); 213 pu1_buf = (ps_codec->pu1_proc_map + idx); 214 *pu1_buf = *pu1_buf | bit_mask; 215 } 216 } 217 } 218 219 220 void ihevcd_slice_hdr_update(process_ctxt_t *ps_proc) 221 { 222 223 /* Slice x and y are initialized in proc_init. But initialize slice x and y count here 224 * if a new slice begins at the middle of a row since proc_init is invoked only at the beginning of each row */ 225 if(!((ps_proc->i4_ctb_x == 0) && (ps_proc->i4_ctb_y == 0))) 226 { 227 slice_header_t *ps_slice_hdr_next = ps_proc->ps_codec->ps_slice_hdr_base + ((ps_proc->i4_cur_slice_idx + 1) & (MAX_SLICE_HDR_CNT - 1)); 228 229 if((ps_slice_hdr_next->i2_ctb_x == ps_proc->i4_ctb_x) 230 && (ps_slice_hdr_next->i2_ctb_y == ps_proc->i4_ctb_y)) 231 { 232 if(0 == ps_slice_hdr_next->i1_dependent_slice_flag) 233 { 234 ps_proc->i4_ctb_slice_x = 0; 235 ps_proc->i4_ctb_slice_y = 0; 236 } 237 238 ps_proc->i4_cur_slice_idx++; 239 ps_proc->ps_slice_hdr = ps_slice_hdr_next; 240 } 241 242 } 243 } 244 245 void ihevcd_ctb_pos_update(process_ctxt_t *ps_proc, WORD32 nctb) 246 { 247 WORD32 tile_start_ctb_idx, slice_start_ctb_idx; 248 slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr; 249 tile_t *ps_tile = ps_proc->ps_tile; 250 sps_t *ps_sps = ps_proc->ps_sps; 251 252 /* Update x and y positions */ 253 ps_proc->i4_ctb_tile_x += nctb; 254 ps_proc->i4_ctb_x += nctb; 255 256 ps_proc->i4_ctb_slice_x += nctb; 257 /*If tile are enabled, then handle the tile & slice counters differently*/ 258 if(ps_proc->ps_pps->i1_tiles_enabled_flag) 259 { 260 /* Update slice counters*/ 261 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb); 262 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 263 /* 264 * There can be 2 cases where slice counters must be handled differently. 265 * 1 - Multiple tiles span across a single/one of the many slice. 266 * 2 - Multiple slices span across a single/one of the many tiles. 267 */ 268 269 /*Case 1 */ 270 if(slice_start_ctb_idx < tile_start_ctb_idx) 271 { 272 /*End of tile row*/ 273 if(ps_proc->i4_ctb_x > ps_slice_hdr->i2_ctb_x) 274 { 275 if(ps_proc->i4_ctb_slice_x >= (ps_tile->u2_wd + ps_tile->u1_pos_x)) 276 { 277 ps_proc->i4_ctb_slice_y++; 278 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x 279 - ps_tile->u2_wd; 280 } 281 } 282 else 283 { 284 WORD32 temp_stride = (ps_sps->i2_pic_wd_in_ctb - ps_slice_hdr->i2_ctb_x); 285 if(ps_proc->i4_ctb_slice_x >= (temp_stride + ps_tile->u2_wd + ps_tile->u1_pos_x)) 286 { 287 ps_proc->i4_ctb_slice_y++; 288 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x 289 - ps_tile->u2_wd; 290 } 291 } 292 } 293 /*Case 2*/ 294 else if(ps_proc->i4_ctb_slice_x >= (ps_tile->u2_wd)) 295 { 296 /*End of tile row*/ 297 ps_proc->i4_ctb_slice_y++; 298 ps_proc->i4_ctb_slice_x = 0; 299 } 300 } 301 else 302 { 303 if(ps_proc->i4_ctb_slice_x >= ps_tile->u2_wd) 304 { 305 ps_proc->i4_ctb_slice_y++; 306 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x 307 - ps_tile->u2_wd; 308 } 309 } 310 } 311 312 void ihevcd_ctb_avail_update(process_ctxt_t *ps_proc) 313 { 314 slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr; 315 sps_t *ps_sps = ps_proc->ps_sps; 316 tile_t *ps_tile_prev; 317 tile_t *ps_tile = ps_proc->ps_tile; 318 WORD32 cur_pu_idx; 319 WORD32 tile_start_ctb_idx, slice_start_ctb_idx; 320 WORD16 i2_wd_in_ctb; 321 WORD32 continuous_tiles = 0; 322 WORD32 cur_ctb_idx; 323 WORD32 check_tile_wd; 324 325 if((0 != ps_tile->u1_pos_x) && (0 != ps_tile->u1_pos_y)) 326 { 327 ps_tile_prev = ps_tile - 1; 328 } 329 else 330 { 331 ps_tile_prev = ps_tile; 332 } 333 334 335 check_tile_wd = ps_slice_hdr->i2_ctb_x + ps_tile_prev->u2_wd; 336 if(!(((check_tile_wd >= ps_sps->i2_pic_wd_in_ctb) && (check_tile_wd % ps_sps->i2_pic_wd_in_ctb == ps_tile->u1_pos_x)) 337 || ((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x)))) 338 { 339 continuous_tiles = 1; 340 } 341 342 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb); 343 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 344 345 if((slice_start_ctb_idx < tile_start_ctb_idx) && (continuous_tiles)) 346 { 347 //Slices span across multiple tiles. 348 i2_wd_in_ctb = ps_sps->i2_pic_wd_in_ctb; 349 } 350 else 351 { 352 i2_wd_in_ctb = ps_tile->u2_wd; 353 } 354 cur_ctb_idx = ps_proc->i4_ctb_x 355 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 356 357 /* Ctb level availability */ 358 /* Bottom left will not be available at a CTB level, no need to pass this */ 359 ps_proc->u1_top_ctb_avail = 1; 360 ps_proc->u1_left_ctb_avail = 1; 361 ps_proc->u1_top_lt_ctb_avail = 1; 362 ps_proc->u1_top_rt_ctb_avail = 1; 363 /* slice and tile boundaries */ 364 365 if((0 == ps_proc->i4_ctb_y) || (0 == ps_proc->i4_ctb_tile_y)) 366 { 367 ps_proc->u1_top_ctb_avail = 0; 368 ps_proc->u1_top_lt_ctb_avail = 0; 369 ps_proc->u1_top_rt_ctb_avail = 0; 370 } 371 372 if((0 == ps_proc->i4_ctb_x) || (0 == ps_proc->i4_ctb_tile_x)) 373 { 374 ps_proc->u1_left_ctb_avail = 0; 375 ps_proc->u1_top_lt_ctb_avail = 0; 376 if((0 == ps_proc->i4_ctb_slice_y) || (0 == ps_proc->i4_ctb_tile_y)) 377 { 378 ps_proc->u1_top_ctb_avail = 0; 379 if((i2_wd_in_ctb - 1) != ps_proc->i4_ctb_slice_x) 380 { 381 ps_proc->u1_top_rt_ctb_avail = 0; 382 } 383 } 384 } 385 /*For slices not beginning at start of a ctb row*/ 386 else if(ps_proc->i4_ctb_x > 0) 387 { 388 if((0 == ps_proc->i4_ctb_slice_y) || (0 == ps_proc->i4_ctb_tile_y)) 389 { 390 ps_proc->u1_top_ctb_avail = 0; 391 ps_proc->u1_top_lt_ctb_avail = 0; 392 if(0 == ps_proc->i4_ctb_slice_x) 393 { 394 ps_proc->u1_left_ctb_avail = 0; 395 } 396 if((i2_wd_in_ctb - 1) != ps_proc->i4_ctb_slice_x) 397 { 398 ps_proc->u1_top_rt_ctb_avail = 0; 399 } 400 } 401 else if((1 == ps_proc->i4_ctb_slice_y) && (0 == ps_proc->i4_ctb_slice_x)) 402 { 403 ps_proc->u1_top_lt_ctb_avail = 0; 404 } 405 } 406 407 if((ps_proc->i4_ctb_x == (ps_sps->i2_pic_wd_in_ctb - 1)) || ((ps_tile->u2_wd - 1) == ps_proc->i4_ctb_tile_x)) 408 { 409 ps_proc->u1_top_rt_ctb_avail = 0; 410 } 411 412 413 { 414 WORD32 next_ctb_idx; 415 next_ctb_idx = cur_ctb_idx + 1; 416 417 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1)) 418 { 419 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht) 420 { 421 //Last tile 422 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb)) 423 { 424 next_ctb_idx = cur_ctb_idx + 1; 425 } 426 else //Not last tile, but new tile 427 { 428 tile_t *ps_tile_next = ps_proc->ps_tile + 1; 429 next_ctb_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 430 } 431 } 432 else //End of each tile row 433 { 434 next_ctb_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x; 435 } 436 } 437 ps_proc->i4_next_pu_ctb_cnt = next_ctb_idx; 438 ps_proc->i4_ctb_pu_cnt = 439 ps_proc->pu4_pic_pu_idx[next_ctb_idx] 440 - ps_proc->pu4_pic_pu_idx[cur_ctb_idx]; 441 cur_pu_idx = ps_proc->pu4_pic_pu_idx[cur_ctb_idx]; 442 ps_proc->i4_ctb_start_pu_idx = cur_pu_idx; 443 ps_proc->ps_pu = &ps_proc->ps_pic_pu[cur_pu_idx]; 444 } 445 } 446 447 void ihevcd_update_ctb_tu_cnt(process_ctxt_t *ps_proc) 448 { 449 sps_t *ps_sps = ps_proc->ps_sps; 450 codec_t *ps_codec = ps_proc->ps_codec; 451 WORD32 cur_ctb_idx; 452 453 cur_ctb_idx = ps_proc->i4_ctb_x 454 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 455 456 { 457 tile_t *ps_tile; 458 WORD32 next_ctb_tu_idx; 459 ps_tile = ps_proc->ps_tile; 460 461 462 if(1 == ps_codec->i4_num_cores) 463 { 464 next_ctb_tu_idx = cur_ctb_idx % RESET_TU_BUF_NCTB + 1; 465 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1)) 466 { 467 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht) 468 { 469 //Last tile 470 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb)) 471 { 472 next_ctb_tu_idx = (cur_ctb_idx % RESET_TU_BUF_NCTB) + 1; 473 } 474 else //Not last tile, but new tile 475 { 476 tile_t *ps_tile_next = ps_proc->ps_tile + 1; 477 next_ctb_tu_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 478 } 479 } 480 else //End of each tile row 481 { 482 next_ctb_tu_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x; 483 } 484 } 485 ps_proc->i4_next_tu_ctb_cnt = next_ctb_tu_idx; 486 ps_proc->i4_ctb_tu_cnt = ps_proc->pu4_pic_tu_idx[next_ctb_tu_idx] - ps_proc->pu4_pic_tu_idx[cur_ctb_idx % RESET_TU_BUF_NCTB]; 487 } 488 else 489 { 490 next_ctb_tu_idx = cur_ctb_idx + 1; 491 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1)) 492 { 493 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht) 494 { 495 //Last tile 496 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb)) 497 { 498 next_ctb_tu_idx = (cur_ctb_idx % RESET_TU_BUF_NCTB) + 1; 499 } 500 else //Not last tile, but new tile 501 { 502 tile_t *ps_tile_next = ps_proc->ps_tile + 1; 503 next_ctb_tu_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 504 } 505 } 506 else //End of each tile row 507 { 508 next_ctb_tu_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x; 509 } 510 } 511 ps_proc->i4_next_tu_ctb_cnt = next_ctb_tu_idx; 512 ps_proc->i4_ctb_tu_cnt = ps_proc->pu4_pic_tu_idx[next_ctb_tu_idx] - 513 ps_proc->pu4_pic_tu_idx[cur_ctb_idx]; 514 } 515 } 516 } 517 518 IHEVCD_ERROR_T ihevcd_process(process_ctxt_t *ps_proc) 519 { 520 IHEVCD_ERROR_T ret = (IHEVCD_ERROR_T)IHEVCD_SUCCESS; 521 codec_t *ps_codec; 522 sps_t *ps_sps = ps_proc->ps_sps; 523 524 WORD32 nctb; 525 WORD32 i; 526 WORD32 idx; 527 WORD32 nop_cnt; 528 WORD32 num_minpu_in_ctb; 529 WORD32 cur_slice_idx, cur_ctb_tile_x, cur_ctb_slice_x, cur_ctb_tile_y, cur_ctb_slice_y; 530 WORD32 nxt_ctb_slice_y, nxt_ctb_slice_x; 531 tu_t *ps_tu_cur, *ps_tu_nxt; 532 UWORD8 *pu1_pu_map_cur, *pu1_pu_map_nxt; 533 WORD32 num_ctb, num_ctb_tmp; 534 proc_type_t proc_type; 535 536 537 WORD32 ctb_size = 1 << ps_sps->i1_log2_ctb_size; 538 539 PROFILE_DISABLE_PROCESS_CTB(); 540 541 ps_codec = ps_proc->ps_codec; 542 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE); 543 544 nctb = MIN(ps_codec->i4_proc_nctb, ps_proc->i4_ctb_cnt); 545 nctb = MIN(nctb, (ps_proc->ps_tile->u2_wd - ps_proc->i4_ctb_tile_x)); 546 547 if(ps_proc->i4_cur_slice_idx > (MAX_SLICE_HDR_CNT - 2 * ps_sps->i2_pic_wd_in_ctb)) 548 { 549 num_ctb = 1; 550 } 551 else 552 { 553 num_ctb = ps_proc->i4_nctb; 554 } 555 nxt_ctb_slice_y = ps_proc->i4_ctb_slice_y; 556 nxt_ctb_slice_x = ps_proc->i4_ctb_slice_x; 557 pu1_pu_map_nxt = ps_proc->pu1_pu_map; 558 ps_tu_nxt = ps_proc->ps_tu; 559 560 while(ps_proc->i4_ctb_cnt) 561 { 562 ps_proc->i4_ctb_slice_y = nxt_ctb_slice_y; 563 ps_proc->i4_ctb_slice_x = nxt_ctb_slice_x; 564 ps_proc->pu1_pu_map = pu1_pu_map_nxt; 565 ps_proc->ps_tu = ps_tu_nxt; 566 567 cur_ctb_tile_x = ps_proc->i4_ctb_tile_x; 568 cur_ctb_tile_y = ps_proc->i4_ctb_tile_y; 569 cur_ctb_slice_x = ps_proc->i4_ctb_slice_x; 570 cur_ctb_slice_y = ps_proc->i4_ctb_slice_y; 571 cur_slice_idx = ps_proc->i4_cur_slice_idx; 572 ps_tu_cur = ps_proc->ps_tu; 573 pu1_pu_map_cur = ps_proc->pu1_pu_map; 574 proc_type = PROC_INTER_PRED; 575 576 if(ps_proc->i4_ctb_cnt < num_ctb) 577 { 578 num_ctb = ps_proc->i4_ctb_cnt; 579 } 580 num_ctb_tmp = num_ctb; 581 582 while(num_ctb_tmp) 583 { 584 slice_header_t *ps_slice_hdr; 585 tile_t *ps_tile = ps_proc->ps_tile; 586 587 /* Waiting for Parsing to be done*/ 588 { 589 590 591 nop_cnt = PROC_NOP_CNT; 592 if(ps_proc->i4_check_parse_status || ps_proc->i4_check_proc_status) 593 { 594 while(1) 595 { 596 volatile UWORD8 *pu1_buf; 597 volatile WORD32 status; 598 status = 1; 599 /* Check if all dependencies for the next nCTBs are met */ 600 /* Check if the next nCTBs are parsed */ 601 if(ps_proc->i4_check_parse_status) 602 { 603 idx = (ps_proc->i4_ctb_x + nctb - 1); 604 idx += (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb); 605 pu1_buf = (ps_codec->pu1_parse_map + idx); 606 status = *pu1_buf; 607 } 608 609 if(status) 610 break; 611 612 /* if dependencies are not met, then wait for few cycles. 613 * Even after few iterations, if the dependencies are not met then yield 614 */ 615 if(nop_cnt > 0) 616 { 617 NOP(128); 618 nop_cnt -= 128; 619 } 620 else 621 { 622 nop_cnt = PROC_NOP_CNT; 623 ithread_yield(); 624 } 625 } 626 } 627 } 628 629 /* Check proc map to ensure dependencies for recon are met */ 630 ihevcd_proc_map_check(ps_proc, proc_type, nctb); 631 632 ihevcd_slice_hdr_update(ps_proc); 633 ps_slice_hdr = ps_proc->ps_slice_hdr; 634 635 //ihevcd_mv_prediction(); 636 //ihevcd_lvl_unpack(); 637 //ihevcd_inter_iq_it_recon(); 638 //Following does prediction, iq, it and recon on a TU by TU basis for intra TUs 639 //ihevcd_intra_process(); 640 //ihevcd_ctb_boundary_strength_islice(ps_proc, ctb_size); 641 //ihevcd_deblk_ctb(ps_proc); 642 643 /* iq,it recon of Intra TU */ 644 { 645 UWORD32 *pu4_ctb_top_pu_idx, *pu4_ctb_left_pu_idx, *pu4_ctb_top_left_pu_idx; 646 WORD32 cur_ctb_idx; 647 648 ihevcd_ctb_avail_update(ps_proc); 649 650 #if DEBUG_DUMP_FRAME_BUFFERS_INFO 651 au1_pic_avail_ctb_flags[ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb] = 652 ((ps_proc->u1_top_ctb_avail << 3) | (ps_proc->u1_left_ctb_avail << 2) | (ps_proc->u1_top_lt_ctb_avail << 1) | (ps_proc->u1_top_rt_ctb_avail)); 653 au4_pic_ctb_slice_xy[ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb] = 654 (((UWORD16)ps_proc->i4_ctb_slice_x << 16) | ((UWORD16)ps_proc->i4_ctb_slice_y << 16)); 655 #endif 656 657 /*************************************************/ 658 /**************** MV pred **********************/ 659 /*************************************************/ 660 if(PSLICE == ps_slice_hdr->i1_slice_type 661 || BSLICE == ps_slice_hdr->i1_slice_type) 662 { 663 mv_ctxt_t s_mv_ctxt; 664 665 pu4_ctb_top_pu_idx = ps_proc->pu4_pic_pu_idx_top 666 + (ps_proc->i4_ctb_x * ctb_size / MIN_PU_SIZE); 667 pu4_ctb_left_pu_idx = ps_proc->pu4_pic_pu_idx_left; 668 pu4_ctb_top_left_pu_idx = &ps_proc->u4_ctb_top_left_pu_idx; 669 670 /* Initializing s_mv_ctxt */ 671 if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD) 672 { 673 s_mv_ctxt.ps_pps = ps_proc->ps_pps; 674 s_mv_ctxt.ps_sps = ps_proc->ps_sps; 675 s_mv_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr; 676 s_mv_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 677 s_mv_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 678 s_mv_ctxt.ps_pu = ps_proc->ps_pu; 679 s_mv_ctxt.ps_pic_pu = ps_proc->ps_pic_pu; 680 s_mv_ctxt.ps_tile = ps_tile; 681 s_mv_ctxt.pu4_pic_pu_idx_map = ps_proc->pu4_pic_pu_idx_map; 682 s_mv_ctxt.pu4_pic_pu_idx = ps_proc->pu4_pic_pu_idx; 683 s_mv_ctxt.pu1_pic_pu_map = ps_proc->pu1_pic_pu_map; 684 s_mv_ctxt.i4_ctb_pu_cnt = ps_proc->i4_ctb_pu_cnt; 685 s_mv_ctxt.i4_ctb_start_pu_idx = ps_proc->i4_ctb_start_pu_idx; 686 s_mv_ctxt.u1_top_ctb_avail = ps_proc->u1_top_ctb_avail; 687 s_mv_ctxt.u1_top_rt_ctb_avail = ps_proc->u1_top_rt_ctb_avail; 688 s_mv_ctxt.u1_top_lt_ctb_avail = ps_proc->u1_top_lt_ctb_avail; 689 s_mv_ctxt.u1_left_ctb_avail = ps_proc->u1_left_ctb_avail; 690 691 ihevcd_get_mv_ctb(&s_mv_ctxt, pu4_ctb_top_pu_idx, 692 pu4_ctb_left_pu_idx, pu4_ctb_top_left_pu_idx); 693 } 694 695 ihevcd_inter_pred_ctb(ps_proc); 696 } 697 else if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD) 698 { 699 WORD32 next_ctb_idx, num_pu_per_ctb, ctb_start_pu_idx, pu_cnt; 700 pu_t *ps_pu; 701 WORD32 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE); 702 UWORD8 *pu1_pic_pu_map_ctb = ps_proc->pu1_pic_pu_map + 703 (ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb) * num_minpu_in_ctb; 704 WORD32 row, col; 705 UWORD32 *pu4_nbr_pu_idx = ps_proc->pu4_pic_pu_idx_map; 706 WORD32 nbr_pu_idx_strd = MAX_CTB_SIZE / MIN_PU_SIZE + 2; 707 WORD32 ctb_size_in_min_pu = (ctb_size / MIN_PU_SIZE); 708 709 /* Neighbor PU idx update inside CTB */ 710 /* 1byte per 4x4. Indicates the PU idx that 4x4 block belongs to */ 711 712 cur_ctb_idx = ps_proc->i4_ctb_x 713 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 714 next_ctb_idx = ps_proc->i4_next_pu_ctb_cnt; 715 num_pu_per_ctb = ps_proc->pu4_pic_pu_idx[next_ctb_idx] 716 - ps_proc->pu4_pic_pu_idx[cur_ctb_idx]; 717 ctb_start_pu_idx = ps_proc->pu4_pic_pu_idx[cur_ctb_idx]; 718 ps_pu = &ps_proc->ps_pic_pu[ctb_start_pu_idx]; 719 720 for(pu_cnt = 0; pu_cnt < num_pu_per_ctb; pu_cnt++, ps_pu++) 721 { 722 UWORD32 cur_pu_idx; 723 WORD32 pu_ht = (ps_pu->b4_ht + 1) << 2; 724 WORD32 pu_wd = (ps_pu->b4_wd + 1) << 2; 725 726 cur_pu_idx = ctb_start_pu_idx + pu_cnt; 727 728 for(row = 0; row < pu_ht / MIN_PU_SIZE; row++) 729 for(col = 0; col < pu_wd / MIN_PU_SIZE; col++) 730 pu4_nbr_pu_idx[(1 + ps_pu->b4_pos_x + col) 731 + (1 + ps_pu->b4_pos_y + row) 732 * nbr_pu_idx_strd] = 733 cur_pu_idx; 734 } 735 736 /* Updating Top and Left pointers */ 737 { 738 WORD32 rows_remaining = ps_sps->i2_pic_height_in_luma_samples 739 - (ps_proc->i4_ctb_y << ps_sps->i1_log2_ctb_size); 740 WORD32 ctb_size_left = MIN(ctb_size, rows_remaining); 741 742 /* Top Left */ 743 /* saving top left before updating top ptr, as updating top ptr will overwrite the top left for the next ctb */ 744 ps_proc->u4_ctb_top_left_pu_idx = ps_proc->pu4_pic_pu_idx_top[((ps_proc->i4_ctb_x + 1) * ctb_size / MIN_PU_SIZE) - 1]; 745 for(i = 0; i < ctb_size / MIN_PU_SIZE; i++) 746 { 747 /* Left */ 748 /* Last column of au4_nbr_pu_idx */ 749 ps_proc->pu4_pic_pu_idx_left[i] = 750 pu4_nbr_pu_idx[(ctb_size / MIN_PU_SIZE) + (i + 1) * nbr_pu_idx_strd]; 751 /* Top */ 752 /* Last row of au4_nbr_pu_idx */ 753 ps_proc->pu4_pic_pu_idx_top[(ps_proc->i4_ctb_x * ctb_size / MIN_PU_SIZE) + i] = 754 pu4_nbr_pu_idx[(ctb_size_left / MIN_PU_SIZE) * nbr_pu_idx_strd + i + 1]; 755 756 } 757 758 /* Updating the CTB level PU idx (Used for collocated MV pred)*/ 759 { 760 WORD32 ctb_row, ctb_col, index_pic_map, index_nbr_map; 761 WORD32 first_pu_of_ctb; 762 first_pu_of_ctb = pu4_nbr_pu_idx[1 + nbr_pu_idx_strd]; 763 UWORD32 cur_ctb_ht_in_min_pu = MIN(((ps_sps->i2_pic_height_in_luma_samples 764 - (ps_proc->i4_ctb_y << ps_sps->i1_log2_ctb_size)) / MIN_PU_SIZE), ctb_size_in_min_pu); 765 UWORD32 cur_ctb_wd_in_min_pu = MIN(((ps_sps->i2_pic_width_in_luma_samples 766 - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size)) / MIN_PU_SIZE), ctb_size_in_min_pu); 767 768 index_pic_map = 0 * ctb_size_in_min_pu + 0; 769 index_nbr_map = (0 + 1) * nbr_pu_idx_strd + (0 + 1); 770 771 for(ctb_row = 0; ctb_row < cur_ctb_ht_in_min_pu; ctb_row++) 772 { 773 for(ctb_col = 0; ctb_col < cur_ctb_wd_in_min_pu; ctb_col++) 774 { 775 pu1_pic_pu_map_ctb[index_pic_map + ctb_col] = pu4_nbr_pu_idx[index_nbr_map + ctb_col] 776 - first_pu_of_ctb; 777 } 778 index_pic_map += ctb_size_in_min_pu; 779 index_nbr_map += nbr_pu_idx_strd; 780 } 781 } 782 } 783 } 784 } 785 786 if(ps_proc->ps_pps->i1_tiles_enabled_flag) 787 { 788 /*Update the tile index buffer with tile information for the current ctb*/ 789 UWORD16 *pu1_tile_idx = ps_proc->pu1_tile_idx; 790 pu1_tile_idx[(ps_proc->i4_ctb_x + (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb))] 791 = ps_proc->i4_cur_tile_idx; 792 } 793 794 /*************************************************/ 795 /*********** BS, QP and Deblocking **************/ 796 /*************************************************/ 797 /* Boundary strength call has to be after IQ IT recon since QP population needs ps_proc->i4_qp_const_inc_ctb flag */ 798 799 { 800 slice_header_t *ps_slice_hdr; 801 ps_slice_hdr = ps_proc->ps_slice_hdr; 802 803 804 /* Check if deblock is disabled for the current slice or if it is disabled for the current picture 805 * because of disable deblock api 806 */ 807 if(0 == ps_codec->i4_disable_deblk_pic) 808 { 809 if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD) 810 { 811 /* Boundary strength calculation is done irrespective of whether deblocking is disabled 812 * in the slice or not, to handle deblocking slice boundaries */ 813 if((0 == ps_codec->i4_slice_error)) 814 { 815 ihevcd_update_ctb_tu_cnt(ps_proc); 816 ps_proc->s_bs_ctxt.ps_pps = ps_proc->ps_pps; 817 ps_proc->s_bs_ctxt.ps_sps = ps_proc->ps_sps; 818 ps_proc->s_bs_ctxt.ps_codec = ps_proc->ps_codec; 819 ps_proc->s_bs_ctxt.i4_ctb_tu_cnt = ps_proc->i4_ctb_tu_cnt; 820 ps_proc->s_bs_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 821 ps_proc->s_bs_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 822 ps_proc->s_bs_ctxt.i4_ctb_tile_x = ps_proc->i4_ctb_tile_x; 823 ps_proc->s_bs_ctxt.i4_ctb_tile_y = ps_proc->i4_ctb_tile_y; 824 ps_proc->s_bs_ctxt.i4_ctb_slice_x = ps_proc->i4_ctb_slice_x; 825 ps_proc->s_bs_ctxt.i4_ctb_slice_y = ps_proc->i4_ctb_slice_y; 826 ps_proc->s_bs_ctxt.ps_tu = ps_proc->ps_tu; 827 ps_proc->s_bs_ctxt.ps_pu = ps_proc->ps_pu; 828 ps_proc->s_bs_ctxt.pu4_pic_pu_idx_map = ps_proc->pu4_pic_pu_idx_map; 829 ps_proc->s_bs_ctxt.i4_next_pu_ctb_cnt = ps_proc->i4_next_pu_ctb_cnt; 830 ps_proc->s_bs_ctxt.i4_next_tu_ctb_cnt = ps_proc->i4_next_tu_ctb_cnt; 831 ps_proc->s_bs_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx; 832 ps_proc->s_bs_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr; 833 ps_proc->s_bs_ctxt.ps_tile = ps_proc->ps_tile; 834 835 if(ISLICE == ps_slice_hdr->i1_slice_type) 836 { 837 ihevcd_ctb_boundary_strength_islice(&ps_proc->s_bs_ctxt); 838 } 839 else 840 { 841 ihevcd_ctb_boundary_strength_pbslice(&ps_proc->s_bs_ctxt); 842 } 843 } 844 845 /* Boundary strength is set to zero if deblocking is disabled for the current slice */ 846 if((0 != ps_slice_hdr->i1_slice_disable_deblocking_filter_flag)) 847 { 848 WORD32 bs_strd = (ps_sps->i2_pic_wd_in_ctb + 1) * (ctb_size * ctb_size / 8 / 16); 849 850 UWORD32 *pu4_vert_bs = (UWORD32 *)((UWORD8 *)ps_proc->s_bs_ctxt.pu4_pic_vert_bs + 851 ps_proc->i4_ctb_x * (ctb_size * ctb_size / 8 / 16) + 852 ps_proc->i4_ctb_y * bs_strd); 853 UWORD32 *pu4_horz_bs = (UWORD32 *)((UWORD8 *)ps_proc->s_bs_ctxt.pu4_pic_horz_bs + 854 ps_proc->i4_ctb_x * (ctb_size * ctb_size / 8 / 16) + 855 ps_proc->i4_ctb_y * bs_strd); 856 857 memset(pu4_vert_bs, 0, (ctb_size / 8) * (ctb_size / 4) / 8 * 2); 858 memset(pu4_horz_bs, 0, (ctb_size / 8) * (ctb_size / 4) / 8 * 2); 859 } 860 } 861 } 862 } 863 864 /* Per CTB update the following */ 865 { 866 WORD32 cur_ctb_idx = ps_proc->i4_ctb_x 867 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 868 cur_ctb_idx++; 869 870 ps_proc->pu1_pu_map += nctb * num_minpu_in_ctb; 871 ps_proc->ps_tu += ps_proc->i4_ctb_tu_cnt; 872 if((1 == ps_codec->i4_num_cores) && 873 (0 == cur_ctb_idx % RESET_TU_BUF_NCTB)) 874 { 875 ps_proc->ps_tu = ps_proc->ps_pic_tu; 876 } 877 ps_proc->ps_pu += ps_proc->i4_ctb_pu_cnt; 878 } 879 880 /* Update proc map for recon*/ 881 ihevcd_proc_map_update(ps_proc, proc_type, nctb); 882 883 num_ctb_tmp -= nctb; 884 ihevcd_ctb_pos_update(ps_proc, nctb); 885 886 } 887 888 if(cur_slice_idx != ps_proc->i4_cur_slice_idx) 889 { 890 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1)); 891 ps_proc->i4_cur_slice_idx = cur_slice_idx; 892 } 893 /* Restore the saved variables */ 894 num_ctb_tmp = num_ctb; 895 ps_proc->i4_ctb_x -= num_ctb; 896 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x; 897 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x; 898 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y; 899 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y; 900 ps_proc->pu1_pu_map = pu1_pu_map_cur; 901 ps_proc->ps_tu = ps_tu_cur; 902 proc_type = PROC_RECON; 903 904 while(num_ctb_tmp) 905 { 906 907 /* Check proc map to ensure dependencies for recon are met */ 908 ihevcd_proc_map_check(ps_proc, proc_type, nctb); 909 910 ihevcd_slice_hdr_update(ps_proc); 911 912 { 913 914 ihevcd_ctb_avail_update(ps_proc); 915 916 /*************************************************/ 917 /**************** IQ IT RECON *******************/ 918 /*************************************************/ 919 920 ihevcd_update_ctb_tu_cnt(ps_proc); 921 922 /* When scaling matrix is not to be used(scaling_list_enable_flag is zero in SPS), 923 * default value of 16 has to be used. Since the value is same for all sizes, 924 * same table is used for all cases. 925 */ 926 if(0 == ps_sps->i1_scaling_list_enable_flag) 927 { 928 ps_proc->api2_dequant_intra_matrix[0] = 929 (WORD16 *)gi2_flat_scale_mat_32x32; 930 ps_proc->api2_dequant_intra_matrix[1] = 931 (WORD16 *)gi2_flat_scale_mat_32x32; 932 ps_proc->api2_dequant_intra_matrix[2] = 933 (WORD16 *)gi2_flat_scale_mat_32x32; 934 ps_proc->api2_dequant_intra_matrix[3] = 935 (WORD16 *)gi2_flat_scale_mat_32x32; 936 937 ps_proc->api2_dequant_inter_matrix[0] = 938 (WORD16 *)gi2_flat_scale_mat_32x32; 939 ps_proc->api2_dequant_inter_matrix[1] = 940 (WORD16 *)gi2_flat_scale_mat_32x32; 941 ps_proc->api2_dequant_inter_matrix[2] = 942 (WORD16 *)gi2_flat_scale_mat_32x32; 943 ps_proc->api2_dequant_inter_matrix[3] = 944 (WORD16 *)gi2_flat_scale_mat_32x32; 945 } 946 else 947 { 948 if(0 == ps_sps->i1_sps_scaling_list_data_present_flag) 949 { 950 ps_proc->api2_dequant_intra_matrix[0] = 951 (WORD16 *)gi2_flat_scale_mat_32x32; 952 ps_proc->api2_dequant_intra_matrix[1] = 953 (WORD16 *)gi2_intra_default_scale_mat_8x8; 954 ps_proc->api2_dequant_intra_matrix[2] = 955 (WORD16 *)gi2_intra_default_scale_mat_16x16; 956 ps_proc->api2_dequant_intra_matrix[3] = 957 (WORD16 *)gi2_intra_default_scale_mat_32x32; 958 959 ps_proc->api2_dequant_inter_matrix[0] = 960 (WORD16 *)gi2_flat_scale_mat_32x32; 961 ps_proc->api2_dequant_inter_matrix[1] = 962 (WORD16 *)gi2_inter_default_scale_mat_8x8; 963 ps_proc->api2_dequant_inter_matrix[2] = 964 (WORD16 *)gi2_inter_default_scale_mat_16x16; 965 ps_proc->api2_dequant_inter_matrix[3] = 966 (WORD16 *)gi2_inter_default_scale_mat_32x32; 967 } 968 /*TODO: Add support for custom scaling matrices */ 969 } 970 971 972 /* CTB Level pointers */ 973 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma 974 + (ps_proc->i4_ctb_x * ctb_size 975 + ps_proc->i4_ctb_y * ctb_size 976 * ps_codec->i4_strd); 977 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma 978 + ps_proc->i4_ctb_x * ctb_size 979 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2); 980 981 ihevcd_iquant_itrans_recon_ctb(ps_proc); 982 } 983 984 /* Per CTB update the following */ 985 { 986 WORD32 cur_ctb_idx = ps_proc->i4_ctb_x 987 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 988 cur_ctb_idx++; 989 990 ps_proc->pu1_pu_map += nctb * num_minpu_in_ctb; 991 ps_proc->ps_tu += ps_proc->i4_ctb_tu_cnt; 992 if((1 == ps_codec->i4_num_cores) && 993 (0 == cur_ctb_idx % RESET_TU_BUF_NCTB)) 994 { 995 ps_proc->ps_tu = ps_proc->ps_pic_tu; 996 } 997 ps_proc->ps_pu += ps_proc->i4_ctb_pu_cnt; 998 } 999 1000 1001 /* Update proc map for recon*/ 1002 ihevcd_proc_map_update(ps_proc, proc_type, nctb); 1003 1004 num_ctb_tmp -= nctb; 1005 ihevcd_ctb_pos_update(ps_proc, nctb); 1006 } 1007 1008 if(cur_slice_idx != ps_proc->i4_cur_slice_idx) 1009 { 1010 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1)); 1011 ps_proc->i4_cur_slice_idx = cur_slice_idx; 1012 } 1013 /* Restore the saved variables */ 1014 num_ctb_tmp = num_ctb; 1015 ps_proc->i4_ctb_x -= num_ctb; 1016 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x; 1017 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x; 1018 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y; 1019 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y; 1020 pu1_pu_map_nxt = ps_proc->pu1_pu_map; 1021 ps_tu_nxt = ps_proc->ps_tu; 1022 ps_proc->pu1_pu_map = pu1_pu_map_cur; 1023 ps_proc->ps_tu = ps_tu_cur; 1024 proc_type = PROC_DEBLK; 1025 1026 while(num_ctb_tmp) 1027 { 1028 1029 1030 /* Check proc map to ensure dependencies for deblk are met */ 1031 ihevcd_proc_map_check(ps_proc, proc_type, nctb); 1032 1033 ihevcd_slice_hdr_update(ps_proc); 1034 1035 1036 if(((0 == FRAME_ILF_PAD || ps_codec->i4_num_cores != 1)) && 1037 (0 == ps_codec->i4_disable_deblk_pic)) 1038 { 1039 WORD32 i4_is_last_ctb_x = 0; 1040 WORD32 i4_is_last_ctb_y = 0; 1041 1042 1043 /* Deblocking is done irrespective of whether it is disabled in the slice or not, 1044 * to handle deblocking the slice boundaries */ 1045 { 1046 ps_proc->s_deblk_ctxt.ps_pps = ps_proc->ps_pps; 1047 ps_proc->s_deblk_ctxt.ps_sps = ps_proc->ps_sps; 1048 ps_proc->s_deblk_ctxt.ps_codec = ps_proc->ps_codec; 1049 ps_proc->s_deblk_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr; 1050 ps_proc->s_deblk_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 1051 ps_proc->s_deblk_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 1052 ps_proc->s_deblk_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx; 1053 ps_proc->s_deblk_ctxt.is_chroma_yuv420sp_vu = (ps_codec->e_ref_chroma_fmt == IV_YUV_420SP_VU); 1054 1055 /* Populating Current CTB's no_loop_filter flags */ 1056 { 1057 WORD32 row; 1058 WORD32 log2_ctb_size = ps_sps->i1_log2_ctb_size; 1059 1060 /* Loop filter strd in units of num bits */ 1061 WORD32 loop_filter_strd = ((ps_sps->i2_pic_width_in_luma_samples + 63) >> 6) << 3; 1062 /* Bit position is the current 8x8 bit offset wrt pic_no_loop_filter 1063 * bit_pos has to be a WOR32 so that when it is negative, the downshift still retains it to be a negative value */ 1064 WORD32 bit_pos = ((ps_proc->i4_ctb_y << (log2_ctb_size - 3)) - 1) * loop_filter_strd + (ps_proc->i4_ctb_x << (log2_ctb_size - 3)) - 1; 1065 1066 for(row = 0; row < (ctb_size >> 3) + 1; row++) 1067 { 1068 /* Go to the corresponding byte - read 32 bits and downshift */ 1069 ps_proc->s_deblk_ctxt.au2_ctb_no_loop_filter_flag[row] = (*(UWORD32 *)(ps_proc->pu1_pic_no_loop_filter_flag + (bit_pos >> 3))) >> (bit_pos & 7); 1070 bit_pos += loop_filter_strd; 1071 } 1072 } 1073 1074 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y); 1075 1076 /* If the last CTB in the row was a complete CTB then deblocking has to be called from remaining pixels, since deblocking 1077 * is applied on a shifted CTB structure 1078 */ 1079 if(ps_proc->i4_ctb_x == ps_sps->i2_pic_wd_in_ctb - 1) 1080 { 1081 WORD32 i4_is_last_ctb_x = 1; 1082 WORD32 i4_is_last_ctb_y = 0; 1083 1084 WORD32 last_x_pos; 1085 last_x_pos = (ps_sps->i2_pic_wd_in_ctb << ps_sps->i1_log2_ctb_size); 1086 if(last_x_pos == ps_sps->i2_pic_width_in_luma_samples) 1087 { 1088 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y); 1089 } 1090 } 1091 1092 1093 /* If the last CTB in the column was a complete CTB then deblocking has to be called from remaining pixels, since deblocking 1094 * is applied on a shifted CTB structure 1095 */ 1096 if(ps_proc->i4_ctb_y == ps_sps->i2_pic_ht_in_ctb - 1) 1097 { 1098 WORD32 i4_is_last_ctb_x = 0; 1099 WORD32 i4_is_last_ctb_y = 1; 1100 WORD32 last_y_pos; 1101 last_y_pos = (ps_sps->i2_pic_ht_in_ctb << ps_sps->i1_log2_ctb_size); 1102 if(last_y_pos == ps_sps->i2_pic_height_in_luma_samples) 1103 { 1104 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y); 1105 } 1106 } 1107 } 1108 } 1109 1110 /* Update proc map for deblk*/ 1111 ihevcd_proc_map_update(ps_proc, proc_type, nctb); 1112 1113 num_ctb_tmp -= nctb; 1114 ihevcd_ctb_pos_update(ps_proc, nctb); 1115 } 1116 1117 if(cur_slice_idx != ps_proc->i4_cur_slice_idx) 1118 { 1119 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1)); 1120 ps_proc->i4_cur_slice_idx = cur_slice_idx; 1121 } 1122 /* Restore the saved variables */ 1123 num_ctb_tmp = num_ctb; 1124 ps_proc->i4_ctb_x -= num_ctb; 1125 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x; 1126 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y; 1127 ps_proc->pu1_pu_map = pu1_pu_map_cur; 1128 ps_proc->ps_tu = ps_tu_cur; 1129 nxt_ctb_slice_y = ps_proc->i4_ctb_slice_y; 1130 nxt_ctb_slice_x = ps_proc->i4_ctb_slice_x; 1131 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y; 1132 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x; 1133 proc_type = PROC_SAO; 1134 1135 while(num_ctb_tmp) 1136 { 1137 1138 1139 /* Check proc map to ensure dependencies for SAO are met */ 1140 ihevcd_proc_map_check(ps_proc, proc_type, nctb); 1141 1142 ihevcd_slice_hdr_update(ps_proc); 1143 1144 1145 if(0 == FRAME_ILF_PAD || ps_codec->i4_num_cores != 1) 1146 { 1147 /* SAO is done even when it is disabled in the current slice, because 1148 * it is performed on a shifted CTB and the neighbor CTBs can belong 1149 * to different slices with SAO enabled */ 1150 if(0 == ps_codec->i4_disable_sao_pic) 1151 { 1152 ps_proc->s_sao_ctxt.ps_pps = ps_proc->ps_pps; 1153 ps_proc->s_sao_ctxt.ps_sps = ps_proc->ps_sps; 1154 ps_proc->s_sao_ctxt.ps_tile = ps_proc->ps_tile; 1155 ps_proc->s_sao_ctxt.ps_codec = ps_proc->ps_codec; 1156 ps_proc->s_sao_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr; 1157 ps_proc->s_sao_ctxt.i4_cur_slice_idx = ps_proc->i4_cur_slice_idx; 1158 1159 1160 #if SAO_PROCESS_SHIFT_CTB 1161 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 1162 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 1163 ps_proc->s_sao_ctxt.is_chroma_yuv420sp_vu = (ps_codec->e_ref_chroma_fmt == IV_YUV_420SP_VU); 1164 1165 ihevcd_sao_shift_ctb(&ps_proc->s_sao_ctxt); 1166 #else 1167 if(ps_proc->i4_ctb_x > 1 && ps_proc->i4_ctb_y > 0) 1168 { 1169 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x - 2; 1170 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1; 1171 1172 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt); 1173 } 1174 1175 if(ps_sps->i2_pic_wd_in_ctb - 1 == ps_proc->i4_ctb_x && ps_proc->i4_ctb_y > 0) 1176 { 1177 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x - 1; 1178 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1; 1179 1180 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt); 1181 1182 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 1183 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1; 1184 1185 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt); 1186 1187 if(ps_sps->i2_pic_ht_in_ctb - 1 == ps_proc->i4_ctb_y) 1188 { 1189 WORD32 i4_ctb_x; 1190 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 1191 for(i4_ctb_x = 0; i4_ctb_x < ps_sps->i2_pic_wd_in_ctb; i4_ctb_x++) 1192 { 1193 ps_proc->s_sao_ctxt.i4_ctb_x = i4_ctb_x; 1194 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt); 1195 } 1196 } 1197 } 1198 #endif 1199 } 1200 1201 1202 /* Call padding if required */ 1203 { 1204 #if SAO_PROCESS_SHIFT_CTB 1205 1206 if(0 == ps_proc->i4_ctb_x) 1207 { 1208 WORD32 pad_ht_luma; 1209 WORD32 pad_ht_chroma; 1210 1211 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma 1212 + (ps_proc->i4_ctb_x * ctb_size 1213 + ps_proc->i4_ctb_y * ctb_size 1214 * ps_codec->i4_strd); 1215 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma 1216 + ps_proc->i4_ctb_x * ctb_size 1217 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2); 1218 1219 pad_ht_luma = ctb_size; 1220 pad_ht_luma += (ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y ? 8 : 0; 1221 pad_ht_chroma = ctb_size / 2; 1222 /* Pad left after 1st CTB is processed */ 1223 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_ctb_luma - 8 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_LEFT); 1224 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_ctb_chroma - 16 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT); 1225 } 1226 1227 if((ps_sps->i2_pic_wd_in_ctb - 1) == ps_proc->i4_ctb_x) 1228 { 1229 WORD32 pad_ht_luma; 1230 WORD32 pad_ht_chroma; 1231 WORD32 cols_remaining = ps_sps->i2_pic_width_in_luma_samples - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size); 1232 1233 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma 1234 + (ps_proc->i4_ctb_x * ctb_size 1235 + ps_proc->i4_ctb_y * ctb_size 1236 * ps_codec->i4_strd); 1237 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma 1238 + ps_proc->i4_ctb_x * ctb_size 1239 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2); 1240 1241 pad_ht_luma = ctb_size; 1242 pad_ht_chroma = ctb_size / 2; 1243 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) 1244 { 1245 pad_ht_luma += 8; 1246 pad_ht_chroma += 16; 1247 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_pic_chroma + (ps_sps->i2_pic_height_in_luma_samples / 2 - 16) * ps_codec->i4_strd, 1248 ps_codec->i4_strd, 16, PAD_LEFT); 1249 } 1250 /* Pad right after last CTB in the current row is processed */ 1251 ps_codec->s_func_selector.ihevc_pad_right_luma_fptr(ps_proc->pu1_cur_ctb_luma + cols_remaining - 8 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_RIGHT); 1252 ps_codec->s_func_selector.ihevc_pad_right_chroma_fptr(ps_proc->pu1_cur_ctb_chroma + cols_remaining - 16 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_RIGHT); 1253 1254 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) 1255 { 1256 UWORD8 *pu1_buf; 1257 /* Since SAO is shifted by 8x8, chroma padding can not be done till second row is processed */ 1258 /* Hence moving top padding to to end of frame, Moving it to second row also results in problems when there is only one row */ 1259 /* Pad top after padding left and right for current rows after processing 1st CTB row */ 1260 ihevc_pad_top(ps_proc->pu1_cur_pic_luma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP); 1261 ihevc_pad_top(ps_proc->pu1_cur_pic_chroma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP / 2); 1262 1263 pu1_buf = ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * ps_sps->i2_pic_height_in_luma_samples - PAD_LEFT; 1264 /* Pad top after padding left and right for current rows after processing 1st CTB row */ 1265 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT); 1266 1267 pu1_buf = ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2) - PAD_LEFT; 1268 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT / 2); 1269 } 1270 } 1271 #else 1272 if(ps_proc->i4_ctb_y > 1) 1273 { 1274 if(0 == ps_proc->i4_ctb_x) 1275 { 1276 WORD32 pad_ht_luma; 1277 WORD32 pad_ht_chroma; 1278 1279 pad_ht_luma = ctb_size; 1280 pad_ht_chroma = ctb_size / 2; 1281 /* Pad left after 1st CTB is processed */ 1282 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_ctb_luma - 2 * ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_LEFT); 1283 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_ctb_chroma - ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT); 1284 } 1285 else if((ps_sps->i2_pic_wd_in_ctb - 1) == ps_proc->i4_ctb_x) 1286 { 1287 WORD32 pad_ht_luma; 1288 WORD32 pad_ht_chroma; 1289 WORD32 cols_remaining = ps_sps->i2_pic_width_in_luma_samples - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size); 1290 1291 pad_ht_luma = ((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) ? 3 * ctb_size : ctb_size; 1292 pad_ht_chroma = ((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) ? 3 * ctb_size / 2 : ctb_size / 2; 1293 /* Pad right after last CTB in the current row is processed */ 1294 ps_codec->s_func_selector.ihevc_pad_right_luma_fptr(ps_proc->pu1_cur_ctb_luma + cols_remaining - 2 * ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_RIGHT); 1295 ps_codec->s_func_selector.ihevc_pad_right_chroma_fptr(ps_proc->pu1_cur_ctb_chroma + cols_remaining - ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_RIGHT); 1296 1297 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) 1298 { 1299 UWORD8 *pu1_buf; 1300 WORD32 pad_ht_luma; 1301 WORD32 pad_ht_chroma; 1302 1303 pad_ht_luma = 2 * ctb_size; 1304 pad_ht_chroma = ctb_size; 1305 1306 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples - 2 * ctb_size), 1307 ps_codec->i4_strd, pad_ht_luma, PAD_LEFT); 1308 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2 - ctb_size), 1309 ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT); 1310 1311 /* Since SAO is shifted by 8x8, chroma padding can not be done till second row is processed */ 1312 /* Hence moving top padding to to end of frame, Moving it to second row also results in problems when there is only one row */ 1313 /* Pad top after padding left and right for current rows after processing 1st CTB row */ 1314 ihevc_pad_top(ps_proc->pu1_cur_pic_luma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP); 1315 ihevc_pad_top(ps_proc->pu1_cur_pic_chroma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP / 2); 1316 1317 pu1_buf = ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * ps_sps->i2_pic_height_in_luma_samples - PAD_LEFT; 1318 /* Pad top after padding left and right for current rows after processing 1st CTB row */ 1319 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT); 1320 1321 pu1_buf = ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2) - PAD_LEFT; 1322 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT / 2); 1323 } 1324 } 1325 } 1326 #endif 1327 } 1328 } 1329 1330 1331 /* Update proc map for SAO*/ 1332 ihevcd_proc_map_update(ps_proc, proc_type, nctb); 1333 /* Update proc map for Completion of CTB*/ 1334 ihevcd_proc_map_update(ps_proc, PROC_ALL, nctb); 1335 { 1336 tile_t *ps_tile; 1337 1338 ps_tile = ps_proc->ps_tile; 1339 num_ctb_tmp -= nctb; 1340 1341 ps_proc->i4_ctb_tile_x += nctb; 1342 ps_proc->i4_ctb_x += nctb; 1343 1344 ps_proc->i4_ctb_slice_x += nctb; 1345 1346 1347 /* Update tile counters */ 1348 if(ps_proc->i4_ctb_tile_x >= (ps_tile->u2_wd)) 1349 { 1350 /*End of tile row*/ 1351 ps_proc->i4_ctb_tile_x = 0; 1352 ps_proc->i4_ctb_x = ps_tile->u1_pos_x; 1353 1354 ps_proc->i4_ctb_tile_y++; 1355 ps_proc->i4_ctb_y++; 1356 if(ps_proc->i4_ctb_tile_y == ps_tile->u2_ht) 1357 { 1358 /* Reached End of Tile */ 1359 ps_proc->i4_ctb_tile_y = 0; 1360 ps_proc->i4_ctb_tile_x = 0; 1361 ps_proc->ps_tile++; 1362 //End of picture 1363 if(!((ps_tile->u2_ht + ps_tile->u1_pos_y == ps_sps->i2_pic_ht_in_ctb) && (ps_tile->u2_wd + ps_tile->u1_pos_x == ps_sps->i2_pic_wd_in_ctb))) 1364 { 1365 ps_tile = ps_proc->ps_tile; 1366 ps_proc->i4_ctb_x = ps_tile->u1_pos_x; 1367 ps_proc->i4_ctb_y = ps_tile->u1_pos_y; 1368 1369 } 1370 } 1371 } 1372 } 1373 } 1374 1375 ps_proc->i4_ctb_cnt -= num_ctb; 1376 } 1377 return ret; 1378 } 1379 1380 void ihevcd_init_proc_ctxt(process_ctxt_t *ps_proc, WORD32 tu_coeff_data_ofst) 1381 { 1382 codec_t *ps_codec; 1383 slice_header_t *ps_slice_hdr; 1384 pps_t *ps_pps; 1385 sps_t *ps_sps; 1386 tile_t *ps_tile, *ps_tile_prev; 1387 WORD32 tile_idx; 1388 WORD32 ctb_size; 1389 WORD32 num_minpu_in_ctb; 1390 WORD32 num_ctb_in_row; 1391 WORD32 ctb_addr; 1392 WORD32 i4_wd_in_ctb; 1393 WORD32 tile_start_ctb_idx; 1394 WORD32 slice_start_ctb_idx; 1395 WORD32 check_tile_wd; 1396 WORD32 continuous_tiles = 0; //Refers to tiles that are continuous, within a slice, horizontally 1397 1398 ps_codec = ps_proc->ps_codec; 1399 1400 ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((ps_proc->i4_cur_slice_idx) & (MAX_SLICE_HDR_CNT - 1)); 1401 ps_proc->ps_slice_hdr = ps_slice_hdr; 1402 ps_proc->ps_pps = ps_codec->ps_pps_base + ps_slice_hdr->i1_pps_id; 1403 ps_pps = ps_proc->ps_pps; 1404 ps_proc->ps_sps = ps_codec->ps_sps_base + ps_pps->i1_sps_id; 1405 ps_sps = ps_proc->ps_sps; 1406 ps_proc->i4_init_done = 1; 1407 ctb_size = 1 << ps_sps->i1_log2_ctb_size; 1408 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE); 1409 num_ctb_in_row = ps_sps->i2_pic_wd_in_ctb; 1410 1411 ps_proc->s_sao_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx; 1412 1413 ihevcd_get_tile_pos(ps_pps, ps_sps, ps_proc->i4_ctb_x, ps_proc->i4_ctb_y, 1414 &ps_proc->i4_ctb_tile_x, &ps_proc->i4_ctb_tile_y, 1415 &tile_idx); 1416 1417 ps_proc->ps_tile = ps_pps->ps_tile + tile_idx; 1418 ps_proc->i4_cur_tile_idx = tile_idx; 1419 ps_tile = ps_proc->ps_tile; 1420 1421 if(ps_pps->i1_tiles_enabled_flag) 1422 { 1423 if(tile_idx) 1424 ps_tile_prev = ps_tile - 1; 1425 else 1426 ps_tile_prev = ps_tile; 1427 1428 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb); 1429 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 1430 1431 /*Check if 1432 * 1. Last tile that ends in frame boundary and 1st tile in next row belongs to same slice 1433 * 1.1. If it does, check if the slice that has these tiles spans across the frame row. 1434 * 2. Vertical tiles are present within a slice */ 1435 if(((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x) && (ps_slice_hdr->i2_ctb_y != ps_tile->u1_pos_y))) 1436 { 1437 continuous_tiles = 1; 1438 } 1439 else 1440 { 1441 check_tile_wd = ps_slice_hdr->i2_ctb_x + ps_tile_prev->u2_wd; 1442 if(!(((check_tile_wd >= ps_sps->i2_pic_wd_in_ctb) && (check_tile_wd % ps_sps->i2_pic_wd_in_ctb == ps_tile->u1_pos_x)) 1443 || ((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x)))) 1444 { 1445 continuous_tiles = 1; 1446 } 1447 } 1448 1449 { 1450 WORD32 i2_independent_ctb_x = ps_slice_hdr->i2_independent_ctb_x; 1451 WORD32 i2_independent_ctb_y = ps_slice_hdr->i2_independent_ctb_y; 1452 1453 /* Handles cases where 1454 * 1. Slices begin at the start of each tile 1455 * 2. Tiles lie in the same slice row.i.e, starting tile_x > slice_x, but tile_y == slice_y 1456 * */ 1457 if(ps_proc->i4_ctb_x >= i2_independent_ctb_x) 1458 { 1459 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - i2_independent_ctb_x; 1460 } 1461 else 1462 { 1463 /* Indicates multiple tiles in a slice case where 1464 * The new tile belongs to an older slice that started in the previous rows-not the present row 1465 * & (tile_y > slice_y and tile_x < slice_x) 1466 */ 1467 if((slice_start_ctb_idx < tile_start_ctb_idx) && (continuous_tiles)) 1468 { 1469 i4_wd_in_ctb = ps_sps->i2_pic_wd_in_ctb; 1470 } 1471 /* Indicates many-tiles-in-one-slice case, for slices that end without spanning the frame width*/ 1472 else 1473 { 1474 i4_wd_in_ctb = ps_tile->u2_wd; 1475 } 1476 1477 if(continuous_tiles) 1478 { 1479 ps_proc->i4_ctb_slice_x = i4_wd_in_ctb 1480 - (i2_independent_ctb_x - ps_proc->i4_ctb_x); 1481 } 1482 else 1483 { 1484 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - ps_tile->u1_pos_x; 1485 } 1486 } 1487 /* Initialize ctb slice y to zero and at the start of slice row initialize it 1488 to difference between ctb_y and slice's start ctb y */ 1489 1490 ps_proc->i4_ctb_slice_y = ps_proc->i4_ctb_y - i2_independent_ctb_y; 1491 1492 /*If beginning of tile, check if slice counters are set correctly*/ 1493 if((0 == ps_proc->i4_ctb_tile_x) && (0 == ps_proc->i4_ctb_tile_y)) 1494 { 1495 if(ps_slice_hdr->i1_dependent_slice_flag) 1496 { 1497 ps_proc->i4_ctb_slice_x = 0; 1498 ps_proc->i4_ctb_slice_y = 0; 1499 } 1500 /*For slices that span across multiple tiles*/ 1501 else if(slice_start_ctb_idx < tile_start_ctb_idx) 1502 { 1503 ps_proc->i4_ctb_slice_y = ps_tile->u1_pos_y - i2_independent_ctb_y; 1504 /* Two Cases 1505 * 1 - slice spans across frame-width- but dose not start from 1st column 1506 * 2 - Slice spans across multiple tiles anywhere is a frame 1507 */ 1508 /*TODO:In a multiple slice clip, if an independent slice span across more than 2 tiles in a row, it is not supported*/ 1509 if(continuous_tiles) //Case 2-implemented for slices that span not more than 2 tiles 1510 { 1511 if(i2_independent_ctb_y <= ps_tile->u1_pos_y) 1512 { 1513 //Check if ctb x is before or after 1514 if(i2_independent_ctb_x > ps_tile->u1_pos_x) 1515 { 1516 ps_proc->i4_ctb_slice_y -= 1; 1517 } 1518 } 1519 } 1520 } 1521 } 1522 //Slice starts from a column which is not the starting tile-column, but is within the tile 1523 if(((i2_independent_ctb_x - ps_tile->u1_pos_x) != 0) && ((ps_proc->i4_ctb_slice_y != 0)) 1524 && ((i2_independent_ctb_x >= ps_tile->u1_pos_x) && (i2_independent_ctb_x < ps_tile->u1_pos_x + ps_tile->u2_wd))) 1525 { 1526 ps_proc->i4_ctb_slice_y -= 1; 1527 } 1528 } 1529 } 1530 else 1531 { 1532 WORD32 i2_independent_ctb_x = ps_slice_hdr->i2_independent_ctb_x; 1533 WORD32 i2_independent_ctb_y = ps_slice_hdr->i2_independent_ctb_y; 1534 1535 1536 { 1537 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - i2_independent_ctb_x; 1538 ps_proc->i4_ctb_slice_y = ps_proc->i4_ctb_y - i2_independent_ctb_y; 1539 if(ps_proc->i4_ctb_slice_x < 0) 1540 { 1541 ps_proc->i4_ctb_slice_x += ps_sps->i2_pic_wd_in_ctb; 1542 ps_proc->i4_ctb_slice_y -= 1; 1543 } 1544 1545 /* Initialize ctb slice y to zero and at the start of slice row initialize it 1546 to difference between ctb_y and slice's start ctb y */ 1547 } 1548 } 1549 1550 /* Compute TU offset for the current CTB set */ 1551 { 1552 1553 WORD32 ctb_luma_min_tu_cnt; 1554 WORD32 ctb_addr; 1555 1556 ctb_addr = ps_proc->i4_ctb_y * num_ctb_in_row + ps_proc->i4_ctb_x; 1557 1558 ctb_luma_min_tu_cnt = (1 << ps_sps->i1_log2_ctb_size) / MIN_TU_SIZE; 1559 ctb_luma_min_tu_cnt *= ctb_luma_min_tu_cnt; 1560 1561 ps_proc->pu1_tu_map = ps_proc->pu1_pic_tu_map 1562 + ctb_luma_min_tu_cnt * ctb_addr; 1563 if(1 == ps_codec->i4_num_cores) 1564 { 1565 ps_proc->ps_tu = ps_proc->ps_pic_tu + ps_proc->pu4_pic_tu_idx[ctb_addr % RESET_TU_BUF_NCTB]; 1566 } 1567 else 1568 { 1569 ps_proc->ps_tu = ps_proc->ps_pic_tu + ps_proc->pu4_pic_tu_idx[ctb_addr]; 1570 } 1571 ps_proc->pv_tu_coeff_data = (UWORD8 *)ps_proc->pv_pic_tu_coeff_data 1572 + tu_coeff_data_ofst; 1573 1574 } 1575 1576 /* Compute PU related elements for the current CTB set */ 1577 { 1578 WORD32 pu_idx; 1579 ctb_addr = ps_proc->i4_ctb_y * num_ctb_in_row + ps_proc->i4_ctb_x; 1580 pu_idx = ps_proc->pu4_pic_pu_idx[ctb_addr]; 1581 ps_proc->pu1_pu_map = ps_proc->pu1_pic_pu_map 1582 + ctb_addr * num_minpu_in_ctb; 1583 ps_proc->ps_pu = ps_proc->ps_pic_pu + pu_idx; 1584 } 1585 1586 /* Number of ctbs processed in one loop of process function */ 1587 { 1588 ps_proc->i4_nctb = MIN(ps_codec->u4_nctb, ps_tile->u2_wd); 1589 } 1590 1591 } 1592 void ihevcd_process_thread(process_ctxt_t *ps_proc) 1593 { 1594 { 1595 ithread_set_affinity(ps_proc->i4_id + 1); 1596 } 1597 while(1) 1598 { 1599 IHEVCD_ERROR_T ret; 1600 proc_job_t s_job; 1601 1602 ret = ihevcd_jobq_dequeue((jobq_t *)ps_proc->pv_proc_jobq, &s_job, 1603 sizeof(proc_job_t), 1); 1604 if((IHEVCD_ERROR_T)IHEVCD_SUCCESS != ret) 1605 break; 1606 1607 ps_proc->i4_ctb_cnt = s_job.i2_ctb_cnt; 1608 ps_proc->i4_ctb_x = s_job.i2_ctb_x; 1609 ps_proc->i4_ctb_y = s_job.i2_ctb_y; 1610 ps_proc->i4_cur_slice_idx = s_job.i2_slice_idx; 1611 1612 1613 1614 if(CMD_PROCESS == s_job.i4_cmd) 1615 { 1616 ihevcd_init_proc_ctxt(ps_proc, s_job.i4_tu_coeff_data_ofst); 1617 ihevcd_process(ps_proc); 1618 } 1619 else if(CMD_FMTCONV == s_job.i4_cmd) 1620 { 1621 sps_t *ps_sps; 1622 codec_t *ps_codec; 1623 ivd_out_bufdesc_t *ps_out_buffer; 1624 WORD32 num_rows; 1625 1626 if(0 == ps_proc->i4_init_done) 1627 { 1628 ihevcd_init_proc_ctxt(ps_proc, 0); 1629 } 1630 ps_sps = ps_proc->ps_sps; 1631 ps_codec = ps_proc->ps_codec; 1632 ps_out_buffer = ps_proc->ps_out_buffer; 1633 num_rows = 1 << ps_sps->i1_log2_ctb_size; 1634 1635 num_rows = MIN(num_rows, (ps_codec->i4_disp_ht - (s_job.i2_ctb_y << ps_sps->i1_log2_ctb_size))); 1636 1637 if(num_rows < 0) 1638 num_rows = 0; 1639 1640 ihevcd_fmt_conv(ps_proc->ps_codec, ps_proc, ps_out_buffer->pu1_bufs[0], ps_out_buffer->pu1_bufs[1], ps_out_buffer->pu1_bufs[2], 1641 s_job.i2_ctb_y << ps_sps->i1_log2_ctb_size, num_rows); 1642 } 1643 } 1644 //ithread_exit(0); 1645 return; 1646 } 1647 1648