/external/llvm/lib/Analysis/ |
TargetTransformInfo.cpp | 117 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, 122 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
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/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyISelLowering.cpp | 218 bool WebAssemblyTargetLowering::isLegalAddressingMode(const DataLayout &DL, 223 // isLegalAddressingMode gives us no way to determine if wrapping could be
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/external/llvm/include/llvm/Analysis/ |
TargetTransformInfoImpl.h | 204 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, 223 if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, 481 if (static_cast<T *>(this)->isLegalAddressingMode(
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/external/llvm/include/llvm/CodeGen/ |
BasicTTIImpl.h | 126 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, 134 return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace); [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/ |
ARCISelLowering.cpp | 698 bool ARCTargetLowering::isLegalAddressingMode(const DataLayout &DL,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
WebAssemblyISelLowering.cpp | 396 bool WebAssemblyTargetLowering::isLegalAddressingMode(const DataLayout &DL, 402 // isLegalAddressingMode gives us no way to determine if wrapping could be [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 518 bool SystemZTargetLowering::isLegalAddressingMode(const DataLayout &DL, [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Analysis/ |
TargetTransformInfoImpl.h | 235 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, 271 if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, 755 if (static_cast<T *>(this)->isLegalAddressingMode(
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
BasicTTIImpl.h | 165 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, 173 return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace, I); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
TargetLowering.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
XCoreISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
TargetTransformInfo.cpp | 144 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, 150 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
AVRISelLowering.cpp | 736 bool AVRTargetLowering::isLegalAddressingMode(const DataLayout &DL, [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
RISCVISelLowering.cpp | 163 bool RISCVTargetLowering::isLegalAddressingMode(const DataLayout &DL, [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AMDGPU/ |
SIISelLowering.cpp | 333 bool SITargetLowering::isLegalAddressingMode(const DataLayout &DL, [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
SPUISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
NVPTXISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | [all...] |