/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/ |
orn-diagnostics.s | 6 orn z5.b, z5.b, #0xfa label 8 // CHECK-NEXT: orn z5.b, z5.b, #0xfa 11 orn z5.b, z5.b, #0xfff9 label 13 // CHECK-NEXT: orn z5.b, z5.b, #0xfff9 16 orn z5.h, z5.h, #0xfffa label 18 // CHECK-NEXT: orn z5.h, z5.h, #0xfffa 21 orn z5.h, z5.h, #0xfffffff9 label 23 // CHECK-NEXT: orn z5.h, z5.h, #0xfffffff9 26 orn z5.s, z5.s, #0xfffffffa label 28 // CHECK-NEXT: orn z5.s, z5.s, #0xfffffff 31 orn z5.s, z5.s, #0xffffffffffffff9 label 36 orn z15.d, z15.d, #0xfffffffffffffffa label 44 orn z7.d, z8.d, #254 label 49 orn z7.d, z8.d, #254 label 58 orn p0.h, p0\/z, p0.h, p1.h label 63 orn p0.s, p0\/z, p0.s, p1.s label 68 orn p0.d, p0\/z, p0.d, p1.d label 76 orn p0.b, p0\/m, p1.b, p2.b label 86 orn z0.d, z0.d, #0x6 label [all...] |
orn.s | 10 orn z5.b, z5.b, #0xf9 label 16 orn z23.h, z23.h, #0xfff9 label 22 orn z0.s, z0.s, #0xfffffff9 label 28 orn z0.d, z0.d, #0xfffffffffffffff9 label 34 orn z5.b, z5.b, #0x6 label 40 orn z23.h, z23.h, #0x6 label 46 orn z0.s, z0.s, #0x6 label 52 orn z0.d, z0.d, #0x6 label 58 orn p0.b, p0/z, p0.b, p0.b label 59 // CHECK-INST: orn p0.b, p0/z, p0.b, p0. 64 orn p15.b, p15\/z, p15.b, p15.b label 80 orn z0.d, z0.d, #0x6 label [all...] |
/external/vixl/src/aarch64/ |
assembler-aarch64.cc | 602 void Assembler::orn(const Register& rd, function in class:vixl::aarch64::Assembler 605 Logical(rd, rn, operand, ORN); [all...] |
logic-aarch64.cc | 1053 LogicVRegister Simulator::orn(VectorFormat vform, function in class:vixl::aarch64::Simulator [all...] |
/external/v8/src/arm64/ |
simulator-logic-arm64.cc | 1012 LogicVRegister Simulator::orn(VectorFormat vform, LogicVRegister dst, function in class:v8::internal::Simulator [all...] |
assembler-arm64.cc | 1245 void Assembler::orn(const Register& rd, function in class:v8::internal::Assembler [all...] |
/external/vixl/src/aarch32/ |
assembler-aarch32.cc | 7695 void Assembler::orn(Condition cond, function in class:vixl::aarch32::Assembler [all...] |
assembler-aarch32.h | 2720 void orn(Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler [all...] |
disasm-aarch32.cc | 1999 void Disassembler::orn(Condition cond, function in class:vixl::aarch32::Disassembler [all...] |