1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2010 4 * Texas Instruments, <www.ti.com> 5 * Aneesh V <aneesh (at) ti.com> 6 */ 7 #ifndef _PL310_H_ 8 #define _PL310_H_ 9 10 #include <linux/types.h> 11 12 /* Register bit fields */ 13 #define PL310_AUX_CTRL_ASSOCIATIVITY_MASK (1 << 16) 14 #define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1) 15 #define L2X0_STNDBY_MODE_EN (1 << 0) 16 #define L2X0_CTRL_EN 1 17 18 #define L310_SHARED_ATT_OVERRIDE_ENABLE (1 << 22) 19 #define L310_AUX_CTRL_DATA_PREFETCH_MASK (1 << 28) 20 #define L310_AUX_CTRL_INST_PREFETCH_MASK (1 << 29) 21 22 struct pl310_regs { 23 u32 pl310_cache_id; 24 u32 pl310_cache_type; 25 u32 pad1[62]; 26 u32 pl310_ctrl; 27 u32 pl310_aux_ctrl; 28 u32 pl310_tag_latency_ctrl; 29 u32 pl310_data_latency_ctrl; 30 u32 pad2[60]; 31 u32 pl310_event_cnt_ctrl; 32 u32 pl310_event_cnt1_cfg; 33 u32 pl310_event_cnt0_cfg; 34 u32 pl310_event_cnt1_val; 35 u32 pl310_event_cnt0_val; 36 u32 pl310_intr_mask; 37 u32 pl310_masked_intr_stat; 38 u32 pl310_raw_intr_stat; 39 u32 pl310_intr_clear; 40 u32 pad3[323]; 41 u32 pl310_cache_sync; 42 u32 pad4[15]; 43 u32 pl310_inv_line_pa; 44 u32 pad5[2]; 45 u32 pl310_inv_way; 46 u32 pad6[12]; 47 u32 pl310_clean_line_pa; 48 u32 pad7[1]; 49 u32 pl310_clean_line_idx; 50 u32 pl310_clean_way; 51 u32 pad8[12]; 52 u32 pl310_clean_inv_line_pa; 53 u32 pad9[1]; 54 u32 pl310_clean_inv_line_idx; 55 u32 pl310_clean_inv_way; 56 u32 pad10[64]; 57 u32 pl310_lockdown_dbase; 58 u32 pl310_lockdown_ibase; 59 u32 pad11[190]; 60 u32 pl310_addr_filter_start; 61 u32 pl310_addr_filter_end; 62 u32 pad12[190]; 63 u32 pl310_test_operation; 64 u32 pad13[3]; 65 u32 pl310_line_data; 66 u32 pad14[7]; 67 u32 pl310_line_tag; 68 u32 pad15[3]; 69 u32 pl310_debug_ctrl; 70 u32 pad16[7]; 71 u32 pl310_prefetch_ctrl; 72 u32 pad17[7]; 73 u32 pl310_power_ctrl; 74 }; 75 76 void pl310_inval_all(void); 77 void pl310_clean_inval_all(void); 78 void pl310_inval_range(u32 start, u32 end); 79 void pl310_clean_inval_range(u32 start, u32 end); 80 81 #endif 82
