| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Hexagon/ |
| dis-duplex-p0.s | 4 r6 = #-1 } define
5 // CHECK: { r7 = #-1; r6 = #-1 }
|
| two-extenders.s | 42 r6 = memw(gp+#0x1000) define
43 # CHECK: { r6 = memw(gp+#4096) }
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/BPF/ |
| insn-unit.s | 34 r6 = *(u16 *)(r1 + 8) // BPF_LDX | BPF_H define
38 // CHECK-64: 69 16 08 00 00 00 00 00 r6 = *(u16 *)(r1 + 8)
79 if r5 s>= r6 goto Llabel0 // BPF_JSGE | BPF_X
83 // CHECK: 7d 65 12 00 00 00 00 00 if r5 s>= r6 goto +18
85 if r6 < r7 goto Llabel0 // BPF_JLT | BPF_X
89 // CHECK: ad 76 11 00 00 00 00 00 if r6 < r7 goto +17
108 if r6 < 0xff goto Llabel0 // BPF_JLT | BPF_K
112 // CHECK: a5 06 07 00 ff 00 00 00 if r6 < 255 goto +7
130 r5 &= r6 // BPF_AND | BPF_X
131 r6 <<= r7 // BPF_LSH | BPF_
[all...] |
| /external/u-boot/arch/nds32/include/asm/ |
| macro.h | 50 li $r6, \data
51 or $r5, $r5, $r6
|
| /external/clang/test/CodeGen/ |
| builtins-ppc-crypto-disabled.c | 37 vector unsigned int r6 = __builtin_crypto_vshasigmaw(aw, 1, 15); local
|
| /external/webrtc/webrtc/modules/audio_coding/codecs/isac/fix/source/ |
| filters_mips.c | 29 int32_t r4, r5, r6, r7; local
54 "lh %[r6], 12(%[in]) \n\t"
71 "madd %[r6], %[r6] \n\t"
124 [r4] "=&r" (r4), [r5] "=&r" (r5), [r6] "=&r" (r6), [r7] "=&r" (r7),
162 "lh %[r6], 6(%[in]) \n\t"
173 "madd %[r6], %[r7] \n\t"
195 [r4] "=&r" (r4), [r5] "=&r" (r5), [r6] "=&r" (r6), [r7] "=&r" (r7)
[all...] |
| transform_mips.c | 30 int32_t r0, r1, r2, r3, r4, r5, r6, r7, r8, r9; local
61 "muleq_s.w.phr %[r6], %[r3], %[r1] \n\t"
68 "addu %[r4], %[r4], %[r6] \n\t"
84 "extr_r.w %[r6], $ac2, 16 \n\t"
94 "shra_r.w %[r6], %[r6], 3 \n\t"
96 "sw %[r6], 4(%[tmpre]) \n\t"
97 "absq_s.w %[r6], %[r6] \n\t"
102 "slt %[r1], %[r6], %[r7] \n\t
609 int32_t r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, max, max1; local
[all...] |
| /frameworks/av/media/libstagefright/codecs/m4v_h263/dec/src/ |
| idct.cpp | 131 int32 r0, r1, r2, r3, r4, r5, r6, r7, r8; /* butterfly nodes */ local
155 r6 = blk[B_SIZE * 5 + i];
158 if (!(r1 | r2 | r3 | r4 | r5 | r6 | r7))
187 r8 = W3 * (r6 + r7);
188 r6 = (r8 - (W3 - W5) * r6);
199 r1 = r4 + r6;
200 r4 -= r6;
201 r6 = r5 + r7;
221 tmpBLK32[(3<<3) + i] = (r8 + r6) >> 8
353 int32 r0, r1, r2, r3, r4, r5, r6, r7, r8; \/* butterfly nodes *\/ local
[all...] |
| /art/runtime/arch/mips/ |
| instruction_set_features_mips.cc | 49 static void GetFlagsFromCppDefined(bool* mips_isa_gte2, bool* r6, bool* fpu_32bit, bool* msa) {
66 *r6 = true;
68 *r6 = false;
79 bool r6; local
81 GetFlagsFromCppDefined(&mips_isa_gte2, &r6, &fpu_32bit, &msa);
84 // Only care if it is R1, R2, R5 or R6 and we assume all CPUs will have a FP unit.
89 r6 = (variant[kPrefixLength] >= '6');
96 // Note, we get FPU bitness and R6-ness from the build (using cpp defines, see above)
98 // sufficient for most purposes. That is, "default" should work for both R2 and R6.
106 return MipsFeaturesUniquePtr(new MipsInstructionSetFeatures(fpu_32bit, mips_isa_gte2, r6, msa))
112 bool r6 = (bitmap & kR6) != 0; local
120 bool r6; local
130 bool r6; local
215 bool r6 = r6_; local
[all...] |
| /device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/ |
| pendsv.h | 31 uint32_t r4, r5, r6, r7; member in struct:PendsvRegsHi
|
| /external/u-boot/arch/arm/include/asm/proc-armv/ |
| processor.h | 29 unsigned long r6; member in struct:context_save_struct
|
| /external/boringssl/src/crypto/fipsmodule/aes/asm/ |
| bsaes-armv7.pl | 72 my ($key,$rounds,$const)=("r4","r5","r6");
920 my ($out,$inp,$rounds,$const)=("r12","r4","r5","r6");
1016 stmdb sp!,{r4-r6,lr}
1027 ldmia sp!,{r4-r6,pc}
1034 stmdb sp!,{r4-r6,lr}
1057 ldmia sp!,{r4-r6,pc}
1064 stmdb sp!,{r4-r6,lr}
1077 ldmia sp!,{r4-r6,pc}
1084 stmdb sp!,{r4-r6,lr}
1107 ldmia sp!,{r4-r6,pc
1934 sub r6, $out, #0x10 subroutine
[all...] |
| /external/libavc/common/ |
| ih264_resi_trans_quant.c | 662 WORD32 r0, r1, r2, r3, r4, r5, r6, r7; local
682 r6 = pu1_src[6];r6 -= pu1_pred[6];
687 a1 = r1 + r6;
703 a1 = r1 - r6;
735 r6 = pi2_out_tmp[48];
739 a1 = r1 + r6;
749 a1 = r1 - r6;
756 r6 = (a6>>1) - a7;
798 FWD_QUANT(r6, u4_abs_value, i4_sign, pu2_threshold_matrix[48]
[all...] |
| /external/libunwind/src/ia64/ |
| Gresume.c | 45 unw_word_t r6; member in struct:__anon29530
73 || (ret = ia64_get (c, c->loc[IA64_REG_R6], &extra.r6)) < 0
|
| /external/skia/tests/ |
| QuickRejectTest.cpp | 116 SkRect r6 = SkRect::MakeLTRB(-120.0f, -120.0f, -110.0f, -110.0f); local
127 REPORTER_ASSERT(reporter, true == canvas.quickReject(r6));
|
| /external/skqp/tests/ |
| QuickRejectTest.cpp | 116 SkRect r6 = SkRect::MakeLTRB(-120.0f, -120.0f, -110.0f, -110.0f); local
127 REPORTER_ASSERT(reporter, true == canvas.quickReject(r6));
|
| /external/u-boot/arch/arc/include/asm/ |
| ptrace.h | 38 long r6; member in struct:pt_regs
|
| /device/linaro/bootloader/arm-trusted-firmware/include/lib/aarch32/ |
| smcc_helpers.h | 43 u_register_t r6; member in struct:smc_ctx
|
| /device/linaro/bootloader/arm-trusted-firmware/services/spd/trusty/ |
| trusty.c | 54 uint64_t r6; member in struct:args
93 /* r4, r5, r6 reserved for future use. */
94 ret.r6 = 0;
249 ret.r4, ret.r5, ret.r6, ret.r7);
|
| /external/capstone/suite/MC/ARM/ |
| thumb-shift-encoding.s.cs | 5 0x66,0xeb,0x0a,0x03 = sbc.w r3, r6, r10 package
8 0x63,0xeb,0x2d,0x46 = sbc.w r6, r3, sp, asr #16
14 0x06,0xea,0x0a,0x03 = and.w r3, r6, r10 package
17 0x03,0xea,0x2d,0x46 = and.w r6, r3, sp, asr #16
|
| /external/libffi/src/powerpc/ |
| darwin.S | 79 r6 = ptr to return value. define
117 mr r30,r6 /* rvalue, */
142 lg r6, (LINKAGE_SIZE + 3 * GPR_BYTES)(r1)
202 sg r6, (LINKAGE_SIZE + 3 * GPR_BYTES)(r28)
247 xor r6,r6,r6
248 sg r6,(LINKAGE_SIZE + 7 * GPR_BYTES)(r28)
249 addi r6,r28,(LINKAGE_SIZE + 7 * GPR_BYTES) ; point to a zeroed counter.
|
| /external/libunwind/tests/ |
| Gia64-test-nat.c | 364 unw_word_t r6, nat6; local
372 if ((ret = unw_get_reg (c, UNW_IA64_GR + 6, &r6)) < 0)
373 panic ("%s: failed to read register r6, error=%d\n", __FUNCTION__, ret);
379 printf (" r6 = %c%016lx (expected %c%016lx)\n",
380 nat6 ? '*' : ' ', r6, (vals[0] & 1) ? '*' : ' ', vals[0]);
385 panic ("%s: r6 not a NaT!\n", __FUNCTION__);
390 panic ("%s: r6 a NaT!\n", __FUNCTION__);
391 if (r6 != vals[0])
392 panic ("%s: r6=%lx instead of %lx!\n", __FUNCTION__, r6, vals[0])
[all...] |
| /external/lzma/Asm/x86/ |
| 7zAsm.asm | 85 r6 equ RSI
define
102 r6 equ x6
define
109 push r6
115 pop r6
|
| /external/python/cpython2/Modules/_ctypes/libffi/src/powerpc/ |
| darwin.S | 79 r6 = ptr to return value. define
117 mr r30,r6 /* rvalue, */
142 lg r6, (LINKAGE_SIZE + 3 * GPR_BYTES)(r1)
202 sg r6, (LINKAGE_SIZE + 3 * GPR_BYTES)(r28)
247 xor r6,r6,r6
248 sg r6,(LINKAGE_SIZE + 7 * GPR_BYTES)(r28)
249 addi r6,r28,(LINKAGE_SIZE + 7 * GPR_BYTES) ; point to a zeroed counter.
|
| /external/aac/libFDK/src/ |
| FDK_hybrid.cpp | 515 FIXP_DBL r1, r6; local
536 r6 = pQmfReal[pReadIdx[6]] >> 2;
540 mHybridReal[0 + invert] = (r6 + r1) << 1;
543 mHybridReal[1 - invert] = (r6 - r1) << 1;
|
