/external/webrtc/webrtc/system_wrappers/include/ |
asm_defines.h | 59 .macro streqh reg1, reg2, num 60 strheq \reg1, \reg2, \num variable
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/external/libvpx/libvpx/third_party/libyuv/source/ |
compare_msa.cc | 59 v4i32 reg0 = {0}, reg1 = {0}, reg2 = {0}, reg3 = {0}; local 76 reg1 = __msa_dpadd_s_w(reg1, vec1, vec1); 83 reg0 += reg1;
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rotate_msa.cc | 85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 99 ILVRL_H(vec0, vec2, vec1, vec3, reg0, reg1, reg2, reg3); 110 ILVRL_W(reg0, reg4, reg1, reg5, res0, res1, res2, res3); 121 ILVRL_H(vec0, vec2, vec1, vec3, reg0, reg1, reg2, reg3); 137 res8 = (v16u8)__msa_ilvr_w((v4i32)reg5, (v4i32)reg1); 138 res9 = (v16u8)__msa_ilvl_w((v4i32)reg5, (v4i32)reg1); 166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 180 ILVRL_H(vec0, vec2, vec1, vec3, reg0, reg1, reg2, reg3); 191 ILVRL_W(reg0, reg4, reg1, reg5, res0, res1, res2, res3); 202 ILVRL_H(vec0, vec2, vec1, vec3, reg0, reg1, reg2, reg3) [all...] |
/external/u-boot/drivers/mtd/nand/ |
nand_ecc.c | 68 uint8_t idx, reg1, reg2, reg3, tmp1, tmp2; local 72 reg1 = reg2 = reg3 = 0; 78 reg1 ^= (idx & 0x3f); 109 ecc_code[2] = ((~reg1) << 2) | 0x03;
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/external/u-boot/post/lib_powerpc/ |
andi.c | 62 unsigned int reg1 = (reg + 1) % 32; local 70 ASM_STW(reg1, stk, 0), 72 ASM_11IX(test->cmd, reg1, reg0, test->op2), 73 ASM_STW(reg1, stk, 8), 74 ASM_LWZ(reg1, stk, 0),
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srawi.c | 62 unsigned int reg1 = (reg + 1) % 32; local 70 ASM_STW(reg1, stk, 0), 72 ASM_11S(test->cmd, reg1, reg0, test->op2), 73 ASM_STW(reg1, stk, 8), 74 ASM_LWZ(reg1, stk, 0), 87 ASM_STW(reg1, stk, 0), 89 ASM_11S(test->cmd, reg1, reg0, test->op2) | BIT_C, 90 ASM_STW(reg1, stk, 8), 91 ASM_LWZ(reg1, stk, 0),
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three.c | 156 unsigned int reg1 = (reg + 1) % 32; local 166 ASM_STW(reg1, stk, 4), 168 ASM_LWZ(reg1, stk, 12), 170 ASM_12(test->cmd, reg2, reg1, reg0), 173 ASM_LWZ(reg1, stk, 4), 187 ASM_STW(reg1, stk, 4), 189 ASM_LWZ(reg1, stk, 12), 191 ASM_12(test->cmd, reg2, reg1, reg0) | BIT_C, 194 ASM_LWZ(reg1, stk, 4),
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threei.c | 76 unsigned int reg1 = (reg + 1) % 32; local 84 ASM_STW(reg1, stk, 0), 86 ASM_11IX(test->cmd, reg1, reg0, test->op2), 87 ASM_STW(reg1, stk, 8), 88 ASM_LWZ(reg1, stk, 0),
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threex.c | 126 unsigned int reg1 = (reg + 1) % 32; local 136 ASM_STW(reg1, stk, 4), 138 ASM_LWZ(reg1, stk, 12), 140 ASM_12X(test->cmd, reg2, reg1, reg0), 143 ASM_LWZ(reg1, stk, 4), 157 ASM_STW(reg1, stk, 4), 159 ASM_LWZ(reg1, stk, 12), 161 ASM_12X(test->cmd, reg2, reg1, reg0) | BIT_C, 164 ASM_LWZ(reg1, stk, 4),
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two.c | 82 unsigned int reg1 = (reg + 1) % 32; local 90 ASM_STW(reg1, stk, 0), 92 ASM_11(test->cmd, reg1, reg0), 93 ASM_STW(reg1, stk, 8), 94 ASM_LWZ(reg1, stk, 0), 107 ASM_STW(reg1, stk, 0), 109 ASM_11(test->cmd, reg1, reg0) | BIT_C, 110 ASM_STW(reg1, stk, 8), 111 ASM_LWZ(reg1, stk, 0),
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twox.c | 82 unsigned int reg1 = (reg + 1) % 32; local 90 ASM_STW(reg1, stk, 0), 92 ASM_11X(test->cmd, reg1, reg0), 93 ASM_STW(reg1, stk, 8), 94 ASM_LWZ(reg1, stk, 0), 107 ASM_STW(reg1, stk, 0), 109 ASM_11X(test->cmd, reg1, reg0) | BIT_C, 110 ASM_STW(reg1, stk, 8), 111 ASM_LWZ(reg1, stk, 0),
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rlwimi.c | 63 unsigned int reg1 = (reg + 1) % 32; local 72 ASM_STW(reg1, stk, 0), 73 ASM_LWZ(reg1, stk, 8), 75 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me), 76 ASM_STW(reg1, stk, 8), 77 ASM_LWZ(reg1, stk, 0), 91 ASM_STW(reg1, stk, 0), 92 ASM_LWZ(reg1, stk, 8), 94 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me) | 96 ASM_STW(reg1, stk, 8) [all...] |
rlwinm.c | 60 unsigned int reg1 = (reg + 1) % 32; local 68 ASM_STW(reg1, stk, 0), 70 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me), 71 ASM_STW(reg1, stk, 8), 72 ASM_LWZ(reg1, stk, 0), 85 ASM_STW(reg1, stk, 0), 87 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, 89 ASM_STW(reg1, stk, 8), 90 ASM_LWZ(reg1, stk, 0),
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rlwnm.c | 61 unsigned int reg1 = (reg + 1) % 32; local 71 ASM_STW(reg1, stk, 4), 73 ASM_LWZ(reg1, stk, 12), 75 ASM_122(test->cmd, reg2, reg1, reg0, test->mb, test->me), 78 ASM_LWZ(reg1, stk, 4), 92 ASM_STW(reg1, stk, 4), 94 ASM_LWZ(reg1, stk, 12), 96 ASM_122(test->cmd, reg2, reg1, reg0, test->mb, test->me) | 100 ASM_LWZ(reg1, stk, 4),
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/external/perfetto/src/profiling/memory/ |
shared_ring_buffer.cc | 151 void* reg1 = mmap(region, size_with_meta, PROT_READ | PROT_WRITE, local 160 if (reg1 != region || reg2 != region + size_with_meta) {
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/external/tensorflow/tensorflow/lite/ |
model_test.cc | 185 const TfLiteRegistration& reg1 = node_and_reg1->second; local 194 ASSERT_EQ(reg1, dummy_reg);
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/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/ |
hisi_dvfs.c | 188 unsigned int reg1 = 0; local 323 reg1 = read_reg_mask(PMCTRL_ACPUDESTVOL, 0x7F, 331 } while ((reg0 != reg1) || (reg2 != 0x1)); 346 reg1 = read_reg_mask(PMCTRL_ACPUCLKDIV, 0x3, 354 } while ((reg1 != cpuext_cfg_val) || 398 unsigned int reg1 = 0; local 570 reg1 = read_reg_mask(PMCTRL_ACPUCLKDIV, 0x3, 576 } while ((reg0 != cpuext_cfg_val) || (reg1 != acpu_ddr_cfg_val)); 606 reg1 = read_reg_mask(PMCTRL_ACPUDESTVOL, 0x7F, 614 } while ((reg0 != reg1) || (reg2 != 0x1)) [all...] |
/external/capstone/arch/X86/ |
X86Mapping.c | 47236 x86_reg reg1, reg2; member in struct:insn_reg2 [all...] |
/external/libyuv/files/source/ |
rotate_msa.cc | 85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 99 ILVRL_H(vec0, vec2, vec1, vec3, reg0, reg1, reg2, reg3); 110 ILVRL_W(reg0, reg4, reg1, reg5, res0, res1, res2, res3); 121 ILVRL_H(vec0, vec2, vec1, vec3, reg0, reg1, reg2, reg3); 137 res8 = (v16u8)__msa_ilvr_w((v4i32)reg5, (v4i32)reg1); 138 res9 = (v16u8)__msa_ilvl_w((v4i32)reg5, (v4i32)reg1); 166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 180 ILVRL_H(vec0, vec2, vec1, vec3, reg0, reg1, reg2, reg3); 191 ILVRL_W(reg0, reg4, reg1, reg5, res0, res1, res2, res3); 202 ILVRL_H(vec0, vec2, vec1, vec3, reg0, reg1, reg2, reg3) [all...] |
scale_msa.cc | 70 v8u16 reg0, reg1, reg2, reg3; local 83 reg1 = __msa_hadd_u_h(vec1, vec1); 87 reg1 += reg3; 89 reg1 = (v8u16)__msa_srari_h((v8i16)reg1, 2); 90 dst0 = (v16u8)__msa_pckev_b((v16i8)reg1, (v16i8)reg0); 133 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 158 reg1 = __msa_hadd_u_h(vec1, vec1); 162 reg5 = (v8u16)__msa_pckev_d((v2i64)reg3, (v2i64)reg1); 164 reg7 = (v8u16)__msa_pckod_d((v2i64)reg3, (v2i64)reg1); 296 v4u32 reg0, reg1, reg2, reg3; local [all...] |
/external/u-boot/arch/arm/mach-keystone/include/mach/ |
clock.h | 108 u32 reg1; member in struct:keystone_pll_regs
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/external/v8/src/arm64/ |
deoptimizer-arm64.cc | 44 CPURegister reg1 = copy_to_input.PopLowestIndex(); local 46 int offset1 = reg1.code() * reg_size; 75 CPURegister reg1 = restore_list.PopLowestIndex(); local 77 int offset1 = reg1.code() * reg_size; 81 masm->Ldp(reg0, reg1, MemOperand(src, offset0)); 84 masm->Ldr(reg1, MemOperand(src, offset1));
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/external/aac/libFDK/include/ |
fixpoint_math.h | 296 FIXP_DBL reg1, reg2; local 319 reg1 = invSqrtTab[index] + (fMultDiv2(diff, Fract) << 1); 321 /* reg1 = t[i] + (t[i+1]-t[i])*fract ... already computed ... 327 reg1 = fMultAddDiv2(reg1, Fract, diff); 341 reg1 = fMultDiv2(reg1, reg2) << 2; 346 return (reg1);
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/external/libvpx/libvpx/vpx_dsp/mips/ |
idct32x32_msa.c | 44 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 48 LD_SH8(tmp_buf, 32, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7); 50 DOTP_CONST_PAIR(reg1, reg7, cospi_28_64, cospi_4_64, reg1, reg7); 52 BUTTERFLY_4(reg1, reg7, reg3, reg5, vec1, vec3, vec2, vec0); 65 LD_SH8((tmp_buf + 16), 32, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7); 69 DOTP_CONST_PAIR(reg6, reg1, cospi_6_64, cospi_26_64, reg6, reg1); 75 reg2 = reg1 + reg5; 76 reg1 = reg1 - reg5 128 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 354 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local 434 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local [all...] |
/external/u-boot/drivers/sound/ |
wm8994.c | 429 int reg1 = 0; local 441 reg1 |= SEL_MCLK1; 446 reg1 |= SEL_MCLK2; 451 reg1 |= SEL_FLL1; 456 reg1 |= SEL_FLL2; 469 reg1 |= WM8994_AIF1CLK_DIV; 476 reg1);
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