Home | History | Annotate | Download | only in mach 
      1 /* SPDX-License-Identifier: GPL-2.0 */
      2 /*
      3  * arch/arm/include/asm/arch-rmobile/rcar-mstp.h
      4  *
      5  * Copyright (C) 2013, 2014 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj (at) renesas.com>
      6  * Copyright (C) 2013, 2014 Renesas Electronics Corporation
      7  */
      8 
      9 #ifndef __ASM_ARCH_RCAR_MSTP_H
     10 #define __ASM_ARCH_RCAR_MSTP_H
     11 
     12 #define mstp_setbits(type, addr, saddr, set) \
     13 		out_##type((saddr), in_##type(addr) | (set))
     14 #define mstp_clrbits(type, addr, saddr, clear) \
     15 		out_##type((saddr), in_##type(addr) & ~(clear))
     16 #define mstp_setclrbits(type, addr, set, clear) \
     17 		out_##type((addr), (in_##type(addr) | (set)) & ~(clear))
     18 #define mstp_setbits_le32(addr, saddr, set) \
     19 		mstp_setbits(le32, addr, saddr, set)
     20 #define mstp_clrbits_le32(addr, saddr, clear) \
     21 		mstp_clrbits(le32, addr, saddr, clear)
     22 #define mstp_setclrbits_le32(addr, set, clear) \
     23 		mstp_setclrbits(le32, addr, set, clear)
     24 
     25 #ifndef CONFIG_SMSTP0_ENA
     26 #define CONFIG_SMSTP0_ENA	0x00
     27 #endif
     28 #ifndef CONFIG_SMSTP1_ENA
     29 #define CONFIG_SMSTP1_ENA	0x00
     30 #endif
     31 #ifndef CONFIG_SMSTP2_ENA
     32 #define CONFIG_SMSTP2_ENA	0x00
     33 #endif
     34 #ifndef CONFIG_SMSTP3_ENA
     35 #define CONFIG_SMSTP3_ENA	0x00
     36 #endif
     37 #ifndef CONFIG_SMSTP4_ENA
     38 #define CONFIG_SMSTP4_ENA	0x00
     39 #endif
     40 #ifndef CONFIG_SMSTP5_ENA
     41 #define CONFIG_SMSTP5_ENA	0x00
     42 #endif
     43 #ifndef CONFIG_SMSTP6_ENA
     44 #define CONFIG_SMSTP6_ENA	0x00
     45 #endif
     46 #ifndef CONFIG_SMSTP7_ENA
     47 #define CONFIG_SMSTP7_ENA	0x00
     48 #endif
     49 #ifndef CONFIG_SMSTP8_ENA
     50 #define CONFIG_SMSTP8_ENA	0x00
     51 #endif
     52 #ifndef CONFIG_SMSTP9_ENA
     53 #define CONFIG_SMSTP9_ENA	0x00
     54 #endif
     55 #ifndef CONFIG_SMSTP10_ENA
     56 #define CONFIG_SMSTP10_ENA	0x00
     57 #endif
     58 #ifndef CONFIG_SMSTP11_ENA
     59 #define CONFIG_SMSTP11_ENA	0x00
     60 #endif
     61 
     62 #ifndef CONFIG_RMSTP0_ENA
     63 #define CONFIG_RMSTP0_ENA	0x00
     64 #endif
     65 #ifndef CONFIG_RMSTP1_ENA
     66 #define CONFIG_RMSTP1_ENA	0x00
     67 #endif
     68 #ifndef CONFIG_RMSTP2_ENA
     69 #define CONFIG_RMSTP2_ENA	0x00
     70 #endif
     71 #ifndef CONFIG_RMSTP3_ENA
     72 #define CONFIG_RMSTP3_ENA	0x00
     73 #endif
     74 #ifndef CONFIG_RMSTP4_ENA
     75 #define CONFIG_RMSTP4_ENA	0x00
     76 #endif
     77 #ifndef CONFIG_RMSTP5_ENA
     78 #define CONFIG_RMSTP5_ENA	0x00
     79 #endif
     80 #ifndef CONFIG_RMSTP6_ENA
     81 #define CONFIG_RMSTP6_ENA	0x00
     82 #endif
     83 #ifndef CONFIG_RMSTP7_ENA
     84 #define CONFIG_RMSTP7_ENA	0x00
     85 #endif
     86 #ifndef CONFIG_RMSTP8_ENA
     87 #define CONFIG_RMSTP8_ENA	0x00
     88 #endif
     89 #ifndef CONFIG_RMSTP9_ENA
     90 #define CONFIG_RMSTP9_ENA	0x00
     91 #endif
     92 #ifndef CONFIG_RMSTP10_ENA
     93 #define CONFIG_RMSTP10_ENA	0x00
     94 #endif
     95 #ifndef CONFIG_RMSTP11_ENA
     96 #define CONFIG_RMSTP11_ENA	0x00
     97 #endif
     98 
     99 struct mstp_ctl {
    100 	u32 s_addr;
    101 	u32 s_dis;
    102 	u32 s_ena;
    103 	u32 r_addr;
    104 	u32 r_dis;
    105 	u32 r_ena;
    106 };
    107 
    108 #endif /* __ASM_ARCH_RCAR_MSTP_H */
    109