1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2013 Freescale Semiconductor, Inc. 4 * Copyright (C) 2015 ECA Sinters 5 * 6 * Author: Fabio Estevam <fabio.estevam (at) freescale.com> 7 * Modified by: Boris Brezillon <boris.brezillon (at) free-electrons.com> 8 */ 9 10 #include <asm/arch/clock.h> 11 #include <asm/arch/imx-regs.h> 12 #include <asm/arch/iomux.h> 13 #include <asm/arch/mx6-pins.h> 14 #include <linux/errno.h> 15 #include <asm/gpio.h> 16 #include <asm/mach-imx/iomux-v3.h> 17 #include <asm/mach-imx/boot_mode.h> 18 #include <mmc.h> 19 #include <fsl_esdhc.h> 20 #include <miiphy.h> 21 #include <netdev.h> 22 #include <asm/arch/mxc_hdmi.h> 23 #include <asm/arch/crm_regs.h> 24 #include <linux/fb.h> 25 #include <ipu_pixfmt.h> 26 #include <asm/io.h> 27 #include <asm/arch/sys_proto.h> 28 #include <micrel.h> 29 #include <asm/mach-imx/mxc_i2c.h> 30 #include <i2c.h> 31 32 #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ 33 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ 34 PAD_CTL_SRE_FAST | PAD_CTL_HYS) 35 36 static iomux_v3_cfg_t const uart2_pads[] = { 37 MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), 38 MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), 39 }; 40 41 void seco_mx6_setup_uart_iomux(void) 42 { 43 imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); 44 } 45 46 #define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ 47 PAD_CTL_SPEED_MED | \ 48 PAD_CTL_DSE_40ohm | \ 49 PAD_CTL_HYS) 50 51 static iomux_v3_cfg_t const enet_pads[] = { 52 MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), 53 MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), 54 MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), 55 MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), 56 MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), 57 MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), 58 MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), 59 MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), 60 MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), 61 MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), 62 MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), 63 MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), 64 MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), 65 MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), 66 MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), 67 }; 68 69 void seco_mx6_setup_enet_iomux(void) 70 { 71 imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); 72 } 73 74 int seco_mx6_rgmii_rework(struct phy_device *phydev) 75 { 76 /* control data pad skew - devaddr = 0x02, register = 0x04 */ 77 ksz9031_phy_extended_write(phydev, 0x02, 78 MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, 79 MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000); 80 /* rx data pad skew - devaddr = 0x02, register = 0x05 */ 81 ksz9031_phy_extended_write(phydev, 0x02, 82 MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, 83 MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000); 84 /* tx data pad skew - devaddr = 0x02, register = 0x05 */ 85 ksz9031_phy_extended_write(phydev, 0x02, 86 MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, 87 MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000); 88 89 /* gtx and rx clock pad skew - devaddr = 0x02, register = 0x08 */ 90 ksz9031_phy_extended_write(phydev, 0x02, 91 MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, 92 MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x03FF); 93 return 0; 94 } 95 96 #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ 97 PAD_CTL_SPEED_LOW | \ 98 PAD_CTL_DSE_80ohm | \ 99 PAD_CTL_SRE_FAST | \ 100 PAD_CTL_HYS) 101 102 static iomux_v3_cfg_t const usdhc3_pads[] = { 103 MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), 104 MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), 105 MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 106 MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 107 MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 108 MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 109 }; 110 111 static iomux_v3_cfg_t const usdhc4_pads[] = { 112 MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), 113 MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), 114 MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 115 MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 116 MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 117 MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 118 }; 119 120 void seco_mx6_setup_usdhc_iomux(int id) 121 { 122 switch (id) { 123 case 3: 124 imx_iomux_v3_setup_multiple_pads(usdhc3_pads, 125 ARRAY_SIZE(usdhc3_pads)); 126 break; 127 128 case 4: 129 imx_iomux_v3_setup_multiple_pads(usdhc4_pads, 130 ARRAY_SIZE(usdhc4_pads)); 131 break; 132 133 default: 134 printf("Warning: invalid usdhc id (%d)\n", id); 135 break; 136 } 137 } 138
