| /external/tensorflow/tensorflow/core/framework/ |
| tensor_testutil_test.cc | 53 int shift_amount = (sizeof(U) << 3) - 1; local
55 U mask = static_cast<U>(1) << shift_amount;
56 for (int bits = 0; bits <= shift_amount; ++bits) {
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| /art/compiler/optimizing/ |
| instruction_simplifier_arm.cc | 119 int shift_amount = 0; local
121 HDataProcWithShifterOp::GetOpInfoFromInstruction(bitfield_op, &op_kind, &shift_amount);
122 shift_amount &= use->GetType() == DataType::Type::kInt32
132 } else if (type == DataType::Type::kInt64 && shift_amount == 1) {
142 shift_amount,
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| instruction_simplifier_arm64.cc | 133 int shift_amount = 0; local
134 HDataProcWithShifterOp::GetOpInfoFromInstruction(bitfield_op, &op_kind, &shift_amount);
146 shift_amount,
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| instruction_simplifier.cc | 348 HInstruction* shift_amount = instruction->GetRight(); local
355 if (shift_amount->IsConstant()) {
356 int64_t cst = Int64FromConstant(shift_amount->AsConstant());
374 DCHECK_EQ(shift_amount->GetType(), DataType::Type::kInt32);
391 if (shift_amount->IsAnd() ||
392 shift_amount->IsOr() ||
393 shift_amount->IsXor() ||
394 shift_amount->IsAdd() ||
395 shift_amount->IsSub()) {
396 int64_t required_result = shift_amount->IsAnd() ? implicit_mask : 0
[all...] |
| /external/deqp-deps/SPIRV-Tools/source/opt/ |
| fold.cpp | 311 uint32_t shift_amount = constants[1]->GetU32BitValue(); local
312 if (shift_amount >= 32) {
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| /external/swiftshader/third_party/SPIRV-Tools/source/opt/ |
| fold.cpp | 330 uint32_t shift_amount = constants[1]->GetU32BitValue(); local
331 if (shift_amount >= 32) {
|
| /external/v8/src/ |
| fixed-dtoa.cc | 42 void Shift(int shift_amount) {
43 DCHECK(-64 <= shift_amount && shift_amount <= 64);
44 if (shift_amount == 0) {
46 } else if (shift_amount == -64) {
49 } else if (shift_amount == 64) {
52 } else if (shift_amount <= 0) {
53 high_bits_ <<= -shift_amount;
54 high_bits_ += low_bits_ >> (64 + shift_amount);
55 low_bits_ <<= -shift_amount;
57 low_bits_ >>= shift_amount; local
59 high_bits_ >>= shift_amount; local
[all...] |
| strtod.cc | 315 int shift_amount = (precision_digits_count + kDenominatorLog) - local
317 input.set_f(input.f() >> shift_amount);
318 input.set_e(input.e() + shift_amount);
321 error = (error >> shift_amount) + 1 + kDenominator;
322 precision_digits_count -= shift_amount;
|
| /external/webrtc/webrtc/common_audio/signal_processing/ |
| signal_processing_unittest.cc | 62 int shift_amount = 1; // Workaround compiler warning using variable here. local
64 EXPECT_EQ(32766, WEBRTC_SPL_SHIFT_W32(a, shift_amount));
|
| /external/v8/src/parsing/ |
| preparsed-scope-data.cc | 142 uint8_t shift_amount = free_quarters_in_last_byte_ * 2; local
143 DCHECK_EQ(backing_store_.back() & (3 << shift_amount), 0);
144 backing_store_.back() |= (data << shift_amount);
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| /external/tensorflow/tensorflow/compiler/xla/service/ |
| algebraic_simplifier.cc | 890 auto* shift_amount = local
914 HloInstruction* shift_amount = local
[all...] |
| /external/deqp-deps/SPIRV-Tools/source/util/ |
| hex_float.h | 579 uint_type shift_amount = static_cast<uint_type>(-num_throwaway_bits); local
580 out_val = static_cast<other_uint_type>(out_val << shift_amount);
[all...] |
| /external/deqp-deps/glslang/SPIRV/ |
| hex_float.h | 509 uint_type shift_amount = static_cast<uint_type>(-num_throwaway_bits); local
510 out_val = static_cast<other_uint_type>(out_val << shift_amount);
[all...] |
| /external/swiftshader/third_party/SPIRV-Tools/source/util/ |
| hex_float.h | 579 uint_type shift_amount = static_cast<uint_type>(-num_throwaway_bits); local
580 out_val = static_cast<other_uint_type>(out_val << shift_amount);
[all...] |
| /external/v8/src/arm/ |
| disasm-arm.cc | 195 int shift_amount = instr->ShiftAmountValue(); local
200 if ((instr->RegShiftValue() == 0) && (shift == LSL) && (shift_amount == 0)) {
206 if ((shift == ROR) && (shift_amount == 0)) {
209 } else if (((shift == LSR) || (shift == ASR)) && (shift_amount == 0)) {
210 shift_amount = 32;
215 shift_amount);
[all...] |
| simulator-arm.cc | 1308 int shift_amount = instr->ShiftAmountValue(); local
[all...] |
| /external/v8/src/arm64/ |
| assembler-arm64-inl.h | 271 Operand::Operand(Register reg, Shift shift, unsigned shift_amount)
276 shift_amount_(shift_amount) {
277 DCHECK(reg.Is64Bits() || (shift_amount < kWRegSizeInBits));
278 DCHECK(reg.Is32Bits() || (shift_amount < kXRegSizeInBits));
279 DCHECK_IMPLIES(reg.IsSP(), shift_amount == 0);
283 Operand::Operand(Register reg, Extend extend, unsigned shift_amount)
288 shift_amount_(shift_amount) {
290 DCHECK_LE(shift_amount, 4);
382 unsigned Operand::shift_amount() const { function in class:v8::internal::Operand
424 unsigned shift_amount)
[all...] |
| assembler-arm64.h | 703 // rm, {<shift> {#<shift_amount>}}
705 // <shift_amount> is uint6_t.
710 unsigned shift_amount = 0); // NOLINT(runtime/explicit)
712 // rm, <extend> {#<shift_amount>}
714 // <shift_amount> is uint2_t.
717 unsigned shift_amount = 0);
752 inline unsigned shift_amount() const;
781 unsigned shift_amount = 0);
785 unsigned shift_amount = 0);
796 unsigned shift_amount() const { return shift_amount_; function in class:v8::internal::MemOperand
[all...] |
| disasm-arm64.cc | 3756 int shift_amount = 8 * ((cmode >> 1) & 3); local
3762 int shift_amount = 8 << (cmode & 1); local
[all...] |