1 /********************************************************** 2 * Copyright 2011 VMware, Inc. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person 5 * obtaining a copy of this software and associated documentation 6 * files (the "Software"), to deal in the Software without 7 * restriction, including without limitation the rights to use, copy, 8 * modify, merge, publish, distribute, sublicense, and/or sell copies 9 * of the Software, and to permit persons to whom the Software is 10 * furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be 13 * included in all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 * 24 **********************************************************/ 25 26 27 #include "pipe/p_format.h" 28 #include "util/u_debug.h" 29 #include "util/u_format.h" 30 #include "util/u_memory.h" 31 32 #include "svga_winsys.h" 33 #include "svga_screen.h" 34 #include "svga_format.h" 35 36 37 /** Describes mapping from gallium formats to SVGA vertex/pixel formats */ 38 struct vgpu10_format_entry 39 { 40 enum pipe_format pformat; 41 SVGA3dSurfaceFormat vertex_format; 42 SVGA3dSurfaceFormat pixel_format; 43 unsigned flags; 44 }; 45 46 struct format_compat_entry 47 { 48 enum pipe_format pformat; 49 const SVGA3dSurfaceFormat *compat_format; 50 }; 51 52 53 /** 54 * Table mapping Gallium formats to SVGA3d vertex/pixel formats. 55 * Note: the table is ordered according to PIPE_FORMAT_x order. 56 */ 57 static const struct vgpu10_format_entry format_conversion_table[] = 58 { 59 /* Gallium format SVGA3D vertex format SVGA3D pixel format Flags */ 60 { PIPE_FORMAT_NONE, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 61 { PIPE_FORMAT_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, SVGA3D_B8G8R8A8_UNORM, TF_GEN_MIPS }, 62 { PIPE_FORMAT_B8G8R8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM, TF_GEN_MIPS }, 63 { PIPE_FORMAT_A8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 64 { PIPE_FORMAT_X8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 65 { PIPE_FORMAT_B5G5R5A1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G5R5A1_UNORM, TF_GEN_MIPS }, 66 { PIPE_FORMAT_B4G4R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 67 { PIPE_FORMAT_B5G6R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G6R5_UNORM, TF_GEN_MIPS }, 68 { PIPE_FORMAT_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, TF_GEN_MIPS }, 69 { PIPE_FORMAT_L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 70 { PIPE_FORMAT_A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_A8_UNORM, TF_GEN_MIPS }, 71 { PIPE_FORMAT_I8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 72 { PIPE_FORMAT_L8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 73 { PIPE_FORMAT_L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 74 { PIPE_FORMAT_UYVY, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 75 { PIPE_FORMAT_YUYV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 76 { PIPE_FORMAT_Z16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D16_UNORM, 0 }, 77 { PIPE_FORMAT_Z32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 78 { PIPE_FORMAT_Z32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT, 0 }, 79 { PIPE_FORMAT_Z24_UNORM_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, 0 }, 80 { PIPE_FORMAT_S8_UINT_Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 81 { PIPE_FORMAT_Z24X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_D24_UNORM_S8_UINT, 0 }, 82 { PIPE_FORMAT_X8Z24_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 83 { PIPE_FORMAT_S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 84 { PIPE_FORMAT_R64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 85 { PIPE_FORMAT_R64G64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 86 { PIPE_FORMAT_R64G64B64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 87 { PIPE_FORMAT_R64G64B64A64_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 88 { PIPE_FORMAT_R32_FLOAT, SVGA3D_R32_FLOAT, SVGA3D_R32_FLOAT, TF_GEN_MIPS }, 89 { PIPE_FORMAT_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, SVGA3D_R32G32_FLOAT, TF_GEN_MIPS }, 90 { PIPE_FORMAT_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, SVGA3D_R32G32B32_FLOAT, TF_GEN_MIPS }, 91 { PIPE_FORMAT_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, SVGA3D_R32G32B32A32_FLOAT, TF_GEN_MIPS }, 92 { PIPE_FORMAT_R32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 93 { PIPE_FORMAT_R32G32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 94 { PIPE_FORMAT_R32G32B32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 95 { PIPE_FORMAT_R32G32B32A32_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 96 { PIPE_FORMAT_R32_USCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST }, 97 { PIPE_FORMAT_R32G32_USCALED, SVGA3D_R32G32_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST }, 98 { PIPE_FORMAT_R32G32B32_USCALED, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST }, 99 { PIPE_FORMAT_R32G32B32A32_USCALED, SVGA3D_R32G32B32A32_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST }, 100 { PIPE_FORMAT_R32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 101 { PIPE_FORMAT_R32G32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 102 { PIPE_FORMAT_R32G32B32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 103 { PIPE_FORMAT_R32G32B32A32_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 104 { PIPE_FORMAT_R32_SSCALED, SVGA3D_R32_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST }, 105 { PIPE_FORMAT_R32G32_SSCALED, SVGA3D_R32G32_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST }, 106 { PIPE_FORMAT_R32G32B32_SSCALED, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST }, 107 { PIPE_FORMAT_R32G32B32A32_SSCALED, SVGA3D_R32G32B32A32_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST }, 108 { PIPE_FORMAT_R16_UNORM, SVGA3D_R16_UNORM, SVGA3D_R16_UNORM, TF_GEN_MIPS }, 109 { PIPE_FORMAT_R16G16_UNORM, SVGA3D_R16G16_UNORM, SVGA3D_R16G16_UNORM, TF_GEN_MIPS }, 110 { PIPE_FORMAT_R16G16B16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_FORMAT_INVALID, VF_W_TO_1 }, 111 { PIPE_FORMAT_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, SVGA3D_R16G16B16A16_UNORM, TF_GEN_MIPS }, 112 { PIPE_FORMAT_R16_USCALED, SVGA3D_R16_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST }, 113 { PIPE_FORMAT_R16G16_USCALED, SVGA3D_R16G16_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST }, 114 { PIPE_FORMAT_R16G16B16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST }, 115 { PIPE_FORMAT_R16G16B16A16_USCALED, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST }, 116 { PIPE_FORMAT_R16_SNORM, SVGA3D_R16_SNORM, SVGA3D_R16_SNORM, 0 }, 117 { PIPE_FORMAT_R16G16_SNORM, SVGA3D_R16G16_SNORM, SVGA3D_R16G16_SNORM, 0 }, 118 { PIPE_FORMAT_R16G16B16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_FORMAT_INVALID, VF_W_TO_1 }, 119 { PIPE_FORMAT_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, SVGA3D_R16G16B16A16_SNORM, 0 }, 120 { PIPE_FORMAT_R16_SSCALED, SVGA3D_R16_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST }, 121 { PIPE_FORMAT_R16G16_SSCALED, SVGA3D_R16G16_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST }, 122 { PIPE_FORMAT_R16G16B16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST }, 123 { PIPE_FORMAT_R16G16B16A16_SSCALED, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST }, 124 { PIPE_FORMAT_R8_UNORM, SVGA3D_R8_UNORM, SVGA3D_R8_UNORM, TF_GEN_MIPS }, 125 { PIPE_FORMAT_R8G8_UNORM, SVGA3D_R8G8_UNORM, SVGA3D_R8G8_UNORM, TF_GEN_MIPS }, 126 { PIPE_FORMAT_R8G8B8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_FORMAT_INVALID, VF_W_TO_1 }, 127 { PIPE_FORMAT_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, SVGA3D_R8G8B8A8_UNORM, TF_GEN_MIPS }, 128 { PIPE_FORMAT_X8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 129 { PIPE_FORMAT_R8_USCALED, SVGA3D_R8_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST }, 130 { PIPE_FORMAT_R8G8_USCALED, SVGA3D_R8G8_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST }, 131 { PIPE_FORMAT_R8G8B8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_U_TO_F_CAST }, 132 { PIPE_FORMAT_R8G8B8A8_USCALED, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, VF_U_TO_F_CAST }, 133 { 73, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 134 { PIPE_FORMAT_R8_SNORM, SVGA3D_R8_SNORM, SVGA3D_R8_SNORM, 0 }, 135 { PIPE_FORMAT_R8G8_SNORM, SVGA3D_R8G8_SNORM, SVGA3D_R8G8_SNORM, 0 }, 136 { PIPE_FORMAT_R8G8B8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_FORMAT_INVALID, VF_W_TO_1 }, 137 { PIPE_FORMAT_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, SVGA3D_R8G8B8A8_SNORM, 0 }, 138 { 78, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 139 { 79, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 140 { 80, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 141 { 81, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 142 { PIPE_FORMAT_R8_SSCALED, SVGA3D_R8_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST }, 143 { PIPE_FORMAT_R8G8_SSCALED, SVGA3D_R8G8_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST }, 144 { PIPE_FORMAT_R8G8B8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 | VF_I_TO_F_CAST }, 145 { PIPE_FORMAT_R8G8B8A8_SSCALED, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, VF_I_TO_F_CAST }, 146 { 86, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 147 { PIPE_FORMAT_R32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 148 { PIPE_FORMAT_R32G32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 149 { PIPE_FORMAT_R32G32B32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 150 { PIPE_FORMAT_R32G32B32A32_FIXED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 151 { PIPE_FORMAT_R16_FLOAT, SVGA3D_R16_FLOAT, SVGA3D_R16_FLOAT, TF_GEN_MIPS }, 152 { PIPE_FORMAT_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, SVGA3D_R16G16_FLOAT, TF_GEN_MIPS }, 153 { PIPE_FORMAT_R16G16B16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 }, 154 { PIPE_FORMAT_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, SVGA3D_R16G16B16A16_FLOAT, TF_GEN_MIPS }, 155 { PIPE_FORMAT_L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 156 { PIPE_FORMAT_L8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 157 { PIPE_FORMAT_R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 158 { PIPE_FORMAT_A8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 159 { PIPE_FORMAT_X8B8G8R8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 160 { PIPE_FORMAT_B8G8R8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8A8_UNORM_SRGB, TF_GEN_MIPS }, 161 { PIPE_FORMAT_B8G8R8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_B8G8R8X8_UNORM_SRGB, TF_GEN_MIPS }, 162 { PIPE_FORMAT_A8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 163 { PIPE_FORMAT_X8R8G8B8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 164 { PIPE_FORMAT_R8G8B8A8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_R8G8B8A8_UNORM_SRGB, TF_GEN_MIPS }, 165 { PIPE_FORMAT_DXT1_RGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, 0 }, 166 { PIPE_FORMAT_DXT1_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM, 0 }, 167 { PIPE_FORMAT_DXT3_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM, 0 }, 168 { PIPE_FORMAT_DXT5_RGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM, 0 }, 169 { PIPE_FORMAT_DXT1_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, 0 }, 170 { PIPE_FORMAT_DXT1_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC1_UNORM_SRGB, 0 }, 171 { PIPE_FORMAT_DXT3_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC2_UNORM_SRGB, 0 }, 172 { PIPE_FORMAT_DXT5_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_BC3_UNORM_SRGB, 0 }, 173 { PIPE_FORMAT_RGTC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_UNORM, 0 }, 174 { PIPE_FORMAT_RGTC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC4_SNORM, 0 }, 175 { PIPE_FORMAT_RGTC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_UNORM, 0 }, 176 { PIPE_FORMAT_RGTC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_BC5_SNORM, 0 }, 177 { PIPE_FORMAT_R8G8_B8G8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 178 { PIPE_FORMAT_G8R8_G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 179 { PIPE_FORMAT_R8SG8SB8UX8U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 180 { PIPE_FORMAT_R5SG5SB6U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 181 { PIPE_FORMAT_A8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 182 { PIPE_FORMAT_B5G5R5X1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 183 { PIPE_FORMAT_R10G10B10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_USCALED }, 184 { PIPE_FORMAT_R11G11B10_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R11G11B10_FLOAT, TF_GEN_MIPS }, 185 { PIPE_FORMAT_R9G9B9E5_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R9G9B9E5_SHAREDEXP, 0 }, 186 { PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_D32_FLOAT_S8X24_UINT, 0 }, 187 { PIPE_FORMAT_R1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 188 { PIPE_FORMAT_R10G10B10X2_USCALED, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 189 { PIPE_FORMAT_R10G10B10X2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 190 { PIPE_FORMAT_L4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 191 { PIPE_FORMAT_B10G10R10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, VF_BGRA }, 192 { PIPE_FORMAT_R10SG10SB10SA2U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 193 { PIPE_FORMAT_R8G8Bx_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 194 { PIPE_FORMAT_R8G8B8X8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 195 { PIPE_FORMAT_B4G4R4X4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 196 { PIPE_FORMAT_X24S8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 197 { PIPE_FORMAT_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 198 { PIPE_FORMAT_X32_S8X24_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 199 { PIPE_FORMAT_B2G3R3_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 200 { PIPE_FORMAT_L16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 201 { PIPE_FORMAT_A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 202 { PIPE_FORMAT_I16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 203 { PIPE_FORMAT_LATC1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 204 { PIPE_FORMAT_LATC1_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 205 { PIPE_FORMAT_LATC2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 206 { PIPE_FORMAT_LATC2_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 207 { PIPE_FORMAT_A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 208 { PIPE_FORMAT_L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 209 { PIPE_FORMAT_L8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 210 { PIPE_FORMAT_I8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 211 { PIPE_FORMAT_A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 212 { PIPE_FORMAT_L16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 213 { PIPE_FORMAT_L16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 214 { PIPE_FORMAT_I16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 215 { PIPE_FORMAT_A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 216 { PIPE_FORMAT_L16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 217 { PIPE_FORMAT_L16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 218 { PIPE_FORMAT_I16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 219 { PIPE_FORMAT_A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 220 { PIPE_FORMAT_L32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 221 { PIPE_FORMAT_L32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 222 { PIPE_FORMAT_I32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 223 { PIPE_FORMAT_YV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 224 { PIPE_FORMAT_YV16, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 225 { PIPE_FORMAT_IYUV, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 226 { PIPE_FORMAT_NV12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 227 { PIPE_FORMAT_NV21, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 228 { PIPE_FORMAT_A4R4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 229 { PIPE_FORMAT_R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 230 { PIPE_FORMAT_R8A8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 231 { PIPE_FORMAT_A8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 232 { PIPE_FORMAT_R10G10B10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SSCALED }, 233 { PIPE_FORMAT_R10G10B10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_SNORM }, 234 { PIPE_FORMAT_B10G10R10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_USCALED }, 235 { PIPE_FORMAT_B10G10R10A2_SSCALED, SVGA3D_R32_UINT, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SSCALED }, 236 { PIPE_FORMAT_B10G10R10A2_SNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, VF_BGRA | VF_PUINT_TO_SNORM }, 237 { PIPE_FORMAT_R8_UINT, SVGA3D_R8_UINT, SVGA3D_R8_UINT, 0 }, 238 { PIPE_FORMAT_R8G8_UINT, SVGA3D_R8G8_UINT, SVGA3D_R8G8_UINT, 0 }, 239 { PIPE_FORMAT_R8G8B8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 }, 240 { PIPE_FORMAT_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, SVGA3D_R8G8B8A8_UINT, 0 }, 241 { PIPE_FORMAT_R8_SINT, SVGA3D_R8_SINT, SVGA3D_R8_SINT, 0 }, 242 { PIPE_FORMAT_R8G8_SINT, SVGA3D_R8G8_SINT, SVGA3D_R8G8_SINT, 0 }, 243 { PIPE_FORMAT_R8G8B8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 }, 244 { PIPE_FORMAT_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, SVGA3D_R8G8B8A8_SINT, 0 }, 245 { PIPE_FORMAT_R16_UINT, SVGA3D_R16_UINT, SVGA3D_R16_UINT, 0 }, 246 { PIPE_FORMAT_R16G16_UINT, SVGA3D_R16G16_UINT, SVGA3D_R16G16_UINT, 0 }, 247 { PIPE_FORMAT_R16G16B16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 }, 248 { PIPE_FORMAT_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, SVGA3D_R16G16B16A16_UINT, 0 }, 249 { PIPE_FORMAT_R16_SINT, SVGA3D_R16_SINT, SVGA3D_R16_SINT, 0 }, 250 { PIPE_FORMAT_R16G16_SINT, SVGA3D_R16G16_SINT, SVGA3D_R16G16_SINT, 0 }, 251 { PIPE_FORMAT_R16G16B16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_FORMAT_INVALID, VF_W_TO_1 }, 252 { PIPE_FORMAT_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, 0 }, 253 { PIPE_FORMAT_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, 0 }, 254 { PIPE_FORMAT_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, 0 }, 255 { PIPE_FORMAT_R32G32B32_UINT, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, 0 }, 256 { PIPE_FORMAT_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, 0 }, 257 { PIPE_FORMAT_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, 0 }, 258 { PIPE_FORMAT_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, 0 }, 259 { PIPE_FORMAT_R32G32B32_SINT, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, 0 }, 260 { PIPE_FORMAT_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, 0 }, 261 { PIPE_FORMAT_A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 262 { PIPE_FORMAT_I8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 263 { PIPE_FORMAT_L8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 264 { PIPE_FORMAT_L8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 265 { PIPE_FORMAT_A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 266 { PIPE_FORMAT_I8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 267 { PIPE_FORMAT_L8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 268 { PIPE_FORMAT_L8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 269 { PIPE_FORMAT_A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 270 { PIPE_FORMAT_I16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 271 { PIPE_FORMAT_L16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 272 { PIPE_FORMAT_L16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 273 { PIPE_FORMAT_A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 274 { PIPE_FORMAT_I16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 275 { PIPE_FORMAT_L16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 276 { PIPE_FORMAT_L16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 277 { PIPE_FORMAT_A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 278 { PIPE_FORMAT_I32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 279 { PIPE_FORMAT_L32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 280 { PIPE_FORMAT_L32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 281 { PIPE_FORMAT_A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 282 { PIPE_FORMAT_I32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 283 { PIPE_FORMAT_L32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 284 { PIPE_FORMAT_L32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 285 { PIPE_FORMAT_B10G10R10A2_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 286 { PIPE_FORMAT_ETC1_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 287 { PIPE_FORMAT_R8G8_R8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 288 { PIPE_FORMAT_G8R8_B8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 289 { PIPE_FORMAT_R8G8B8X8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 290 { PIPE_FORMAT_R8G8B8X8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 291 { PIPE_FORMAT_R8G8B8X8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 292 { PIPE_FORMAT_R8G8B8X8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 293 { PIPE_FORMAT_B10G10R10X2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 294 { PIPE_FORMAT_R16G16B16X16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 295 { PIPE_FORMAT_R16G16B16X16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 296 { PIPE_FORMAT_R16G16B16X16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 297 { PIPE_FORMAT_R16G16B16X16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 298 { PIPE_FORMAT_R16G16B16X16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 299 { PIPE_FORMAT_R32G32B32X32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 300 { PIPE_FORMAT_R32G32B32X32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 301 { PIPE_FORMAT_R32G32B32X32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 302 { PIPE_FORMAT_R8A8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 303 { PIPE_FORMAT_R16A16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 304 { PIPE_FORMAT_R16A16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 305 { PIPE_FORMAT_R16A16_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 306 { PIPE_FORMAT_R32A32_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 307 { PIPE_FORMAT_R8A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 308 { PIPE_FORMAT_R8A8_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 309 { PIPE_FORMAT_R16A16_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 310 { PIPE_FORMAT_R16A16_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 311 { PIPE_FORMAT_R32A32_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 312 { PIPE_FORMAT_R32A32_SINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 313 { PIPE_FORMAT_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, SVGA3D_R10G10B10A2_UINT, 0 }, 314 { PIPE_FORMAT_B5G6R5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 315 { PIPE_FORMAT_BPTC_RGBA_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 316 { PIPE_FORMAT_BPTC_SRGBA, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 317 { PIPE_FORMAT_BPTC_RGB_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 318 { PIPE_FORMAT_BPTC_RGB_UFLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 319 { PIPE_FORMAT_A8L8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 320 { PIPE_FORMAT_A8L8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 321 { PIPE_FORMAT_A8L8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 322 { PIPE_FORMAT_A16L16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 323 { PIPE_FORMAT_G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 324 { PIPE_FORMAT_G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 325 { PIPE_FORMAT_G16R16_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 326 { PIPE_FORMAT_G16R16_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 327 { PIPE_FORMAT_A8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 328 { PIPE_FORMAT_X8B8G8R8_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 329 { PIPE_FORMAT_ETC2_RGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 330 { PIPE_FORMAT_ETC2_SRGB8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 331 { PIPE_FORMAT_ETC2_RGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 332 { PIPE_FORMAT_ETC2_SRGB8A1, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 333 { PIPE_FORMAT_ETC2_RGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 334 { PIPE_FORMAT_ETC2_SRGBA8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 335 { PIPE_FORMAT_ETC2_R11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 336 { PIPE_FORMAT_ETC2_R11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 337 { PIPE_FORMAT_ETC2_RG11_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 338 { PIPE_FORMAT_ETC2_RG11_SNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 339 { PIPE_FORMAT_ASTC_4x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 340 { PIPE_FORMAT_ASTC_5x4, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 341 { PIPE_FORMAT_ASTC_5x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 342 { PIPE_FORMAT_ASTC_6x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 343 { PIPE_FORMAT_ASTC_6x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 344 { PIPE_FORMAT_ASTC_8x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 345 { PIPE_FORMAT_ASTC_8x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 346 { PIPE_FORMAT_ASTC_8x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 347 { PIPE_FORMAT_ASTC_10x5, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 348 { PIPE_FORMAT_ASTC_10x6, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 349 { PIPE_FORMAT_ASTC_10x8, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 350 { PIPE_FORMAT_ASTC_10x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 351 { PIPE_FORMAT_ASTC_12x10, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 352 { PIPE_FORMAT_ASTC_12x12, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 353 { PIPE_FORMAT_ASTC_4x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 354 { PIPE_FORMAT_ASTC_5x4_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 355 { PIPE_FORMAT_ASTC_5x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 356 { PIPE_FORMAT_ASTC_6x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 357 { PIPE_FORMAT_ASTC_6x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 358 { PIPE_FORMAT_ASTC_8x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 359 { PIPE_FORMAT_ASTC_8x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 360 { PIPE_FORMAT_ASTC_8x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 361 { PIPE_FORMAT_ASTC_10x5_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 362 { PIPE_FORMAT_ASTC_10x6_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 363 { PIPE_FORMAT_ASTC_10x8_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 364 { PIPE_FORMAT_ASTC_10x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 365 { PIPE_FORMAT_ASTC_12x10_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 366 { PIPE_FORMAT_ASTC_12x12_SRGB, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 367 { PIPE_FORMAT_P016, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 368 { PIPE_FORMAT_R10G10B10X2_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 369 { PIPE_FORMAT_A1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 370 { PIPE_FORMAT_X1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, 371 }; 372 373 374 /** 375 * Translate a gallium vertex format to a vgpu10 vertex format. 376 * Also, return any special vertex format flags. 377 */ 378 void 379 svga_translate_vertex_format_vgpu10(enum pipe_format format, 380 SVGA3dSurfaceFormat *svga_format, 381 unsigned *vf_flags) 382 { 383 assert(format < ARRAY_SIZE(format_conversion_table)); 384 if (format >= ARRAY_SIZE(format_conversion_table)) { 385 format = PIPE_FORMAT_NONE; 386 } 387 *svga_format = format_conversion_table[format].vertex_format; 388 *vf_flags = format_conversion_table[format].flags; 389 } 390 391 392 /** 393 * Translate a gallium scanout format to a svga format valid 394 * for screen target surface. 395 */ 396 static SVGA3dSurfaceFormat 397 svga_translate_screen_target_format_vgpu10(enum pipe_format format) 398 { 399 switch (format) { 400 case PIPE_FORMAT_B8G8R8A8_UNORM: 401 return SVGA3D_B8G8R8A8_UNORM; 402 case PIPE_FORMAT_B8G8R8X8_UNORM: 403 return SVGA3D_B8G8R8X8_UNORM; 404 case PIPE_FORMAT_B5G6R5_UNORM: 405 return SVGA3D_R5G6B5; 406 case PIPE_FORMAT_B5G5R5A1_UNORM: 407 return SVGA3D_A1R5G5B5; 408 default: 409 debug_printf("Invalid format %s specified for screen target\n", 410 svga_format_name(format)); 411 return SVGA3D_FORMAT_INVALID; 412 } 413 } 414 415 /* 416 * Translate from gallium format to SVGA3D format. 417 */ 418 SVGA3dSurfaceFormat 419 svga_translate_format(const struct svga_screen *ss, 420 enum pipe_format format, 421 unsigned bind) 422 { 423 if (ss->sws->have_vgpu10) { 424 if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) { 425 return format_conversion_table[format].vertex_format; 426 } 427 else if (bind & PIPE_BIND_SCANOUT) { 428 return svga_translate_screen_target_format_vgpu10(format); 429 } 430 else { 431 return format_conversion_table[format].pixel_format; 432 } 433 } 434 435 switch(format) { 436 case PIPE_FORMAT_B8G8R8A8_UNORM: 437 return SVGA3D_A8R8G8B8; 438 case PIPE_FORMAT_B8G8R8X8_UNORM: 439 return SVGA3D_X8R8G8B8; 440 441 /* sRGB required for GL2.1 */ 442 case PIPE_FORMAT_B8G8R8A8_SRGB: 443 return SVGA3D_A8R8G8B8; 444 case PIPE_FORMAT_DXT1_SRGB: 445 case PIPE_FORMAT_DXT1_SRGBA: 446 return SVGA3D_DXT1; 447 case PIPE_FORMAT_DXT3_SRGBA: 448 return SVGA3D_DXT3; 449 case PIPE_FORMAT_DXT5_SRGBA: 450 return SVGA3D_DXT5; 451 452 case PIPE_FORMAT_B5G6R5_UNORM: 453 return SVGA3D_R5G6B5; 454 case PIPE_FORMAT_B5G5R5A1_UNORM: 455 return SVGA3D_A1R5G5B5; 456 case PIPE_FORMAT_B4G4R4A4_UNORM: 457 return SVGA3D_A4R4G4B4; 458 459 case PIPE_FORMAT_R16G16B16A16_UNORM: 460 return SVGA3D_A16B16G16R16; 461 462 case PIPE_FORMAT_Z16_UNORM: 463 assert(!ss->sws->have_vgpu10); 464 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.z16 : SVGA3D_Z_D16; 465 case PIPE_FORMAT_S8_UINT_Z24_UNORM: 466 assert(!ss->sws->have_vgpu10); 467 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.s8z24 : SVGA3D_Z_D24S8; 468 case PIPE_FORMAT_X8Z24_UNORM: 469 assert(!ss->sws->have_vgpu10); 470 return bind & PIPE_BIND_SAMPLER_VIEW ? ss->depth.x8z24 : SVGA3D_Z_D24X8; 471 472 case PIPE_FORMAT_A8_UNORM: 473 return SVGA3D_ALPHA8; 474 case PIPE_FORMAT_L8_UNORM: 475 return SVGA3D_LUMINANCE8; 476 477 case PIPE_FORMAT_DXT1_RGB: 478 case PIPE_FORMAT_DXT1_RGBA: 479 return SVGA3D_DXT1; 480 case PIPE_FORMAT_DXT3_RGBA: 481 return SVGA3D_DXT3; 482 case PIPE_FORMAT_DXT5_RGBA: 483 return SVGA3D_DXT5; 484 485 /* Float formats (only 1, 2 and 4-component formats supported) */ 486 case PIPE_FORMAT_R32_FLOAT: 487 return SVGA3D_R_S23E8; 488 case PIPE_FORMAT_R32G32_FLOAT: 489 return SVGA3D_RG_S23E8; 490 case PIPE_FORMAT_R32G32B32A32_FLOAT: 491 return SVGA3D_ARGB_S23E8; 492 case PIPE_FORMAT_R16_FLOAT: 493 return SVGA3D_R_S10E5; 494 case PIPE_FORMAT_R16G16_FLOAT: 495 return SVGA3D_RG_S10E5; 496 case PIPE_FORMAT_R16G16B16A16_FLOAT: 497 return SVGA3D_ARGB_S10E5; 498 499 case PIPE_FORMAT_Z32_UNORM: 500 /* SVGA3D_Z_D32 is not yet unsupported */ 501 /* fall-through */ 502 default: 503 return SVGA3D_FORMAT_INVALID; 504 } 505 } 506 507 508 /* 509 * Format capability description entry. 510 */ 511 struct format_cap { 512 const char *name; 513 514 SVGA3dSurfaceFormat format; 515 516 /* 517 * Capability index corresponding to the format. 518 */ 519 SVGA3dDevCapIndex devcap; 520 521 /* size of each pixel/block */ 522 unsigned block_width, block_height, block_bytes; 523 524 /* 525 * Mask of supported SVGA3dFormatOp operations, to be inferred when the 526 * capability is not explicitly present. 527 */ 528 uint32 defaultOperations; 529 }; 530 531 532 /* 533 * Format capability description table. 534 * 535 * Ordered by increasing SVGA3dSurfaceFormat value, but with gaps. 536 * 537 * Note: there are some special cases below where we set devcap=0 and 538 * avoid querying the host. In particular, depth/stencil formats which 539 * can be rendered to and sampled from. For example, the gallium format 540 * PIPE_FORMAT_Z24_UNORM_S8_UINT is converted to SVGA3D_D24_UNORM_S8_UINT 541 * for rendering but converted to SVGA3D_R24_UNORM_X8 for sampling. 542 * If we want to query if a format supports both rendering and sampling the 543 * host will tell us no for SVGA3D_D24_UNORM_S8_UINT, SVGA3D_D16_UNORM and 544 * SVGA3D_R24_UNORM_X8. So we override the host query for those 545 * formats and report that both can do rendering and sampling. 546 */ 547 static const struct format_cap format_cap_table[] = { 548 { 549 "SVGA3D_FORMAT_INVALID", 550 SVGA3D_FORMAT_INVALID, 0, 0, 0, 0, 0 551 }, 552 { 553 "SVGA3D_X8R8G8B8", 554 SVGA3D_X8R8G8B8, 555 SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8, 556 1, 1, 4, 557 SVGA3DFORMAT_OP_TEXTURE | 558 SVGA3DFORMAT_OP_CUBETEXTURE | 559 SVGA3DFORMAT_OP_VOLUMETEXTURE | 560 SVGA3DFORMAT_OP_DISPLAYMODE | 561 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 562 }, 563 { 564 "SVGA3D_A8R8G8B8", 565 SVGA3D_A8R8G8B8, 566 SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8, 567 1, 1, 4, 568 SVGA3DFORMAT_OP_TEXTURE | 569 SVGA3DFORMAT_OP_CUBETEXTURE | 570 SVGA3DFORMAT_OP_VOLUMETEXTURE | 571 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 572 }, 573 { 574 "SVGA3D_R5G6B5", 575 SVGA3D_R5G6B5, 576 SVGA3D_DEVCAP_SURFACEFMT_R5G6B5, 577 1, 1, 2, 578 SVGA3DFORMAT_OP_TEXTURE | 579 SVGA3DFORMAT_OP_CUBETEXTURE | 580 SVGA3DFORMAT_OP_VOLUMETEXTURE | 581 SVGA3DFORMAT_OP_DISPLAYMODE | 582 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 583 }, 584 { 585 "SVGA3D_X1R5G5B5", 586 SVGA3D_X1R5G5B5, 587 SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5, 588 1, 1, 2, 589 SVGA3DFORMAT_OP_TEXTURE | 590 SVGA3DFORMAT_OP_CUBETEXTURE | 591 SVGA3DFORMAT_OP_VOLUMETEXTURE | 592 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 593 }, 594 { 595 "SVGA3D_A1R5G5B5", 596 SVGA3D_A1R5G5B5, 597 SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5, 598 1, 1, 2, 599 SVGA3DFORMAT_OP_TEXTURE | 600 SVGA3DFORMAT_OP_CUBETEXTURE | 601 SVGA3DFORMAT_OP_VOLUMETEXTURE | 602 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 603 }, 604 { 605 "SVGA3D_A4R4G4B4", 606 SVGA3D_A4R4G4B4, 607 SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4, 608 1, 1, 2, 609 SVGA3DFORMAT_OP_TEXTURE | 610 SVGA3DFORMAT_OP_CUBETEXTURE | 611 SVGA3DFORMAT_OP_VOLUMETEXTURE | 612 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 613 }, 614 { 615 /* 616 * SVGA3D_Z_D32 is not yet supported, and has no corresponding 617 * SVGA3D_DEVCAP_xxx. 618 */ 619 "SVGA3D_Z_D32", 620 SVGA3D_Z_D32, 0, 0, 0, 0, 0 621 }, 622 { 623 "SVGA3D_Z_D16", 624 SVGA3D_Z_D16, 625 SVGA3D_DEVCAP_SURFACEFMT_Z_D16, 626 1, 1, 2, 627 SVGA3DFORMAT_OP_ZSTENCIL 628 }, 629 { 630 "SVGA3D_Z_D24S8", 631 SVGA3D_Z_D24S8, 632 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8, 633 1, 1, 4, 634 SVGA3DFORMAT_OP_ZSTENCIL 635 }, 636 { 637 "SVGA3D_Z_D15S1", 638 SVGA3D_Z_D15S1, 639 SVGA3D_DEVCAP_MAX, 640 1, 1, 2, 641 SVGA3DFORMAT_OP_ZSTENCIL 642 }, 643 { 644 "SVGA3D_LUMINANCE8", 645 SVGA3D_LUMINANCE8, 646 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8, 647 1, 1, 1, 648 SVGA3DFORMAT_OP_TEXTURE | 649 SVGA3DFORMAT_OP_CUBETEXTURE | 650 SVGA3DFORMAT_OP_VOLUMETEXTURE 651 }, 652 { 653 /* 654 * SVGA3D_LUMINANCE4_ALPHA4 is not supported, and has no corresponding 655 * SVGA3D_DEVCAP_xxx. 656 */ 657 "SVGA3D_LUMINANCE4_ALPHA4", 658 SVGA3D_LUMINANCE4_ALPHA4, 0, 0, 0, 0, 0 659 }, 660 { 661 "SVGA3D_LUMINANCE16", 662 SVGA3D_LUMINANCE16, 663 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16, 664 1, 1, 2, 665 SVGA3DFORMAT_OP_TEXTURE | 666 SVGA3DFORMAT_OP_CUBETEXTURE | 667 SVGA3DFORMAT_OP_VOLUMETEXTURE 668 }, 669 { 670 "SVGA3D_LUMINANCE8_ALPHA8", 671 SVGA3D_LUMINANCE8_ALPHA8, 672 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8, 673 1, 1, 2, 674 SVGA3DFORMAT_OP_TEXTURE | 675 SVGA3DFORMAT_OP_CUBETEXTURE | 676 SVGA3DFORMAT_OP_VOLUMETEXTURE 677 }, 678 { 679 "SVGA3D_DXT1", 680 SVGA3D_DXT1, 681 SVGA3D_DEVCAP_SURFACEFMT_DXT1, 682 4, 4, 8, 683 SVGA3DFORMAT_OP_TEXTURE | 684 SVGA3DFORMAT_OP_CUBETEXTURE 685 }, 686 { 687 "SVGA3D_DXT2", 688 SVGA3D_DXT2, 689 SVGA3D_DEVCAP_SURFACEFMT_DXT2, 690 4, 4, 8, 691 SVGA3DFORMAT_OP_TEXTURE | 692 SVGA3DFORMAT_OP_CUBETEXTURE 693 }, 694 { 695 "SVGA3D_DXT3", 696 SVGA3D_DXT3, 697 SVGA3D_DEVCAP_SURFACEFMT_DXT3, 698 4, 4, 16, 699 SVGA3DFORMAT_OP_TEXTURE | 700 SVGA3DFORMAT_OP_CUBETEXTURE 701 }, 702 { 703 "SVGA3D_DXT4", 704 SVGA3D_DXT4, 705 SVGA3D_DEVCAP_SURFACEFMT_DXT4, 706 4, 4, 16, 707 SVGA3DFORMAT_OP_TEXTURE | 708 SVGA3DFORMAT_OP_CUBETEXTURE 709 }, 710 { 711 "SVGA3D_DXT5", 712 SVGA3D_DXT5, 713 SVGA3D_DEVCAP_SURFACEFMT_DXT5, 714 4, 4, 8, 715 SVGA3DFORMAT_OP_TEXTURE | 716 SVGA3DFORMAT_OP_CUBETEXTURE 717 }, 718 { 719 "SVGA3D_BUMPU8V8", 720 SVGA3D_BUMPU8V8, 721 SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8, 722 1, 1, 2, 723 SVGA3DFORMAT_OP_TEXTURE | 724 SVGA3DFORMAT_OP_CUBETEXTURE | 725 SVGA3DFORMAT_OP_VOLUMETEXTURE 726 }, 727 { 728 /* 729 * SVGA3D_BUMPL6V5U5 is unsupported; it has no corresponding 730 * SVGA3D_DEVCAP_xxx. 731 */ 732 "SVGA3D_BUMPL6V5U5", 733 SVGA3D_BUMPL6V5U5, 0, 0, 0, 0, 0 734 }, 735 { 736 "SVGA3D_BUMPX8L8V8U8", 737 SVGA3D_BUMPX8L8V8U8, 738 SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8, 739 1, 1, 4, 740 SVGA3DFORMAT_OP_TEXTURE | 741 SVGA3DFORMAT_OP_CUBETEXTURE 742 }, 743 { 744 "SVGA3D_FORMAT_DEAD1", 745 SVGA3D_FORMAT_DEAD1, 0, 0, 0, 0, 0 746 }, 747 { 748 "SVGA3D_ARGB_S10E5", 749 SVGA3D_ARGB_S10E5, 750 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5, 751 1, 1, 2, 752 SVGA3DFORMAT_OP_TEXTURE | 753 SVGA3DFORMAT_OP_CUBETEXTURE | 754 SVGA3DFORMAT_OP_VOLUMETEXTURE | 755 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 756 }, 757 { 758 "SVGA3D_ARGB_S23E8", 759 SVGA3D_ARGB_S23E8, 760 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8, 761 1, 1, 4, 762 SVGA3DFORMAT_OP_TEXTURE | 763 SVGA3DFORMAT_OP_CUBETEXTURE | 764 SVGA3DFORMAT_OP_VOLUMETEXTURE | 765 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 766 }, 767 { 768 "SVGA3D_A2R10G10B10", 769 SVGA3D_A2R10G10B10, 770 SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10, 771 1, 1, 4, 772 SVGA3DFORMAT_OP_TEXTURE | 773 SVGA3DFORMAT_OP_CUBETEXTURE | 774 SVGA3DFORMAT_OP_VOLUMETEXTURE | 775 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 776 }, 777 { 778 /* 779 * SVGA3D_V8U8 is unsupported; it has no corresponding 780 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPU8V8 should be used instead. 781 */ 782 "SVGA3D_V8U8", 783 SVGA3D_V8U8, 0, 0, 0, 0, 0 784 }, 785 { 786 "SVGA3D_Q8W8V8U8", 787 SVGA3D_Q8W8V8U8, 788 SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8, 789 1, 1, 4, 790 SVGA3DFORMAT_OP_TEXTURE | 791 SVGA3DFORMAT_OP_CUBETEXTURE 792 }, 793 { 794 "SVGA3D_CxV8U8", 795 SVGA3D_CxV8U8, 796 SVGA3D_DEVCAP_SURFACEFMT_CxV8U8, 797 1, 1, 2, 798 SVGA3DFORMAT_OP_TEXTURE 799 }, 800 { 801 /* 802 * SVGA3D_X8L8V8U8 is unsupported; it has no corresponding 803 * SVGA3D_DEVCAP_xxx. SVGA3D_BUMPX8L8V8U8 should be used instead. 804 */ 805 "SVGA3D_X8L8V8U8", 806 SVGA3D_X8L8V8U8, 0, 0, 0, 0, 0 807 }, 808 { 809 "SVGA3D_A2W10V10U10", 810 SVGA3D_A2W10V10U10, 811 SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10, 812 1, 1, 4, 813 SVGA3DFORMAT_OP_TEXTURE 814 }, 815 { 816 "SVGA3D_ALPHA8", 817 SVGA3D_ALPHA8, 818 SVGA3D_DEVCAP_SURFACEFMT_ALPHA8, 819 1, 1, 1, 820 SVGA3DFORMAT_OP_TEXTURE | 821 SVGA3DFORMAT_OP_CUBETEXTURE | 822 SVGA3DFORMAT_OP_VOLUMETEXTURE 823 }, 824 { 825 "SVGA3D_R_S10E5", 826 SVGA3D_R_S10E5, 827 SVGA3D_DEVCAP_SURFACEFMT_R_S10E5, 828 1, 1, 2, 829 SVGA3DFORMAT_OP_TEXTURE | 830 SVGA3DFORMAT_OP_VOLUMETEXTURE | 831 SVGA3DFORMAT_OP_CUBETEXTURE | 832 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 833 }, 834 { 835 "SVGA3D_R_S23E8", 836 SVGA3D_R_S23E8, 837 SVGA3D_DEVCAP_SURFACEFMT_R_S23E8, 838 1, 1, 4, 839 SVGA3DFORMAT_OP_TEXTURE | 840 SVGA3DFORMAT_OP_VOLUMETEXTURE | 841 SVGA3DFORMAT_OP_CUBETEXTURE | 842 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 843 }, 844 { 845 "SVGA3D_RG_S10E5", 846 SVGA3D_RG_S10E5, 847 SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5, 848 1, 1, 2, 849 SVGA3DFORMAT_OP_TEXTURE | 850 SVGA3DFORMAT_OP_VOLUMETEXTURE | 851 SVGA3DFORMAT_OP_CUBETEXTURE | 852 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 853 }, 854 { 855 "SVGA3D_RG_S23E8", 856 SVGA3D_RG_S23E8, 857 SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8, 858 1, 1, 4, 859 SVGA3DFORMAT_OP_TEXTURE | 860 SVGA3DFORMAT_OP_VOLUMETEXTURE | 861 SVGA3DFORMAT_OP_CUBETEXTURE | 862 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 863 }, 864 { 865 /* 866 * SVGA3D_BUFFER is a placeholder format for index/vertex buffers. 867 */ 868 "SVGA3D_BUFFER", 869 SVGA3D_BUFFER, 0, 1, 1, 1, 0 870 }, 871 { 872 "SVGA3D_Z_D24X8", 873 SVGA3D_Z_D24X8, 874 SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8, 875 1, 1, 4, 876 SVGA3DFORMAT_OP_ZSTENCIL 877 }, 878 { 879 "SVGA3D_V16U16", 880 SVGA3D_V16U16, 881 SVGA3D_DEVCAP_SURFACEFMT_V16U16, 882 1, 1, 4, 883 SVGA3DFORMAT_OP_TEXTURE | 884 SVGA3DFORMAT_OP_CUBETEXTURE | 885 SVGA3DFORMAT_OP_VOLUMETEXTURE 886 }, 887 { 888 "SVGA3D_G16R16", 889 SVGA3D_G16R16, 890 SVGA3D_DEVCAP_SURFACEFMT_G16R16, 891 1, 1, 4, 892 SVGA3DFORMAT_OP_TEXTURE | 893 SVGA3DFORMAT_OP_CUBETEXTURE | 894 SVGA3DFORMAT_OP_VOLUMETEXTURE | 895 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 896 }, 897 { 898 "SVGA3D_A16B16G16R16", 899 SVGA3D_A16B16G16R16, 900 SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16, 901 1, 1, 8, 902 SVGA3DFORMAT_OP_TEXTURE | 903 SVGA3DFORMAT_OP_CUBETEXTURE | 904 SVGA3DFORMAT_OP_VOLUMETEXTURE | 905 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET 906 }, 907 { 908 "SVGA3D_UYVY", 909 SVGA3D_UYVY, 910 SVGA3D_DEVCAP_SURFACEFMT_UYVY, 911 0, 0, 0, 0 912 }, 913 { 914 "SVGA3D_YUY2", 915 SVGA3D_YUY2, 916 SVGA3D_DEVCAP_SURFACEFMT_YUY2, 917 0, 0, 0, 0 918 }, 919 { 920 "SVGA3D_NV12", 921 SVGA3D_NV12, 922 SVGA3D_DEVCAP_SURFACEFMT_NV12, 923 0, 0, 0, 0 924 }, 925 { 926 "SVGA3D_AYUV", 927 SVGA3D_AYUV, 928 SVGA3D_DEVCAP_SURFACEFMT_AYUV, 929 0, 0, 0, 0 930 }, 931 { 932 "SVGA3D_R32G32B32A32_TYPELESS", 933 SVGA3D_R32G32B32A32_TYPELESS, 934 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS, 935 1, 1, 16, 0 936 }, 937 { 938 "SVGA3D_R32G32B32A32_UINT", 939 SVGA3D_R32G32B32A32_UINT, 940 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT, 941 1, 1, 16, 0 942 }, 943 { 944 "SVGA3D_R32G32B32A32_SINT", 945 SVGA3D_R32G32B32A32_SINT, 946 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT, 947 1, 1, 16, 0 948 }, 949 { 950 "SVGA3D_R32G32B32_TYPELESS", 951 SVGA3D_R32G32B32_TYPELESS, 952 SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS, 953 1, 1, 12, 0 954 }, 955 { 956 "SVGA3D_R32G32B32_FLOAT", 957 SVGA3D_R32G32B32_FLOAT, 958 SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT, 959 1, 1, 12, 0 960 }, 961 { 962 "SVGA3D_R32G32B32_UINT", 963 SVGA3D_R32G32B32_UINT, 964 SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT, 965 1, 1, 12, 0 966 }, 967 { 968 "SVGA3D_R32G32B32_SINT", 969 SVGA3D_R32G32B32_SINT, 970 SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT, 971 1, 1, 12, 0 972 }, 973 { 974 "SVGA3D_R16G16B16A16_TYPELESS", 975 SVGA3D_R16G16B16A16_TYPELESS, 976 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS, 977 1, 1, 8, 0 978 }, 979 { 980 "SVGA3D_R16G16B16A16_UINT", 981 SVGA3D_R16G16B16A16_UINT, 982 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT, 983 1, 1, 8, 0 984 }, 985 { 986 "SVGA3D_R16G16B16A16_SNORM", 987 SVGA3D_R16G16B16A16_SNORM, 988 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM, 989 1, 1, 8, 0 990 }, 991 { 992 "SVGA3D_R16G16B16A16_SINT", 993 SVGA3D_R16G16B16A16_SINT, 994 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT, 995 1, 1, 8, 0 996 }, 997 { 998 "SVGA3D_R32G32_TYPELESS", 999 SVGA3D_R32G32_TYPELESS, 1000 SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS, 1001 1, 1, 8, 0 1002 }, 1003 { 1004 "SVGA3D_R32G32_UINT", 1005 SVGA3D_R32G32_UINT, 1006 SVGA3D_DEVCAP_DXFMT_R32G32_UINT, 1007 1, 1, 8, 0 1008 }, 1009 { 1010 "SVGA3D_R32G32_SINT", 1011 SVGA3D_R32G32_SINT, 1012 SVGA3D_DEVCAP_DXFMT_R32G32_SINT, 1013 1, 1, 8, 1014 0 1015 }, 1016 { 1017 "SVGA3D_R32G8X24_TYPELESS", 1018 SVGA3D_R32G8X24_TYPELESS, 1019 SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS, 1020 1, 1, 8, 0 1021 }, 1022 { 1023 /* Special case: no devcap / report sampler and depth/stencil ability 1024 */ 1025 "SVGA3D_D32_FLOAT_S8X24_UINT", 1026 SVGA3D_D32_FLOAT_S8X24_UINT, 1027 0, /*SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT*/ 1028 1, 1, 8, 1029 SVGA3DFORMAT_OP_TEXTURE | 1030 SVGA3DFORMAT_OP_CUBETEXTURE | 1031 SVGA3DFORMAT_OP_VOLUMETEXTURE | 1032 SVGA3DFORMAT_OP_ZSTENCIL 1033 }, 1034 { 1035 /* Special case: no devcap / report sampler and depth/stencil ability 1036 */ 1037 "SVGA3D_R32_FLOAT_X8X24", 1038 SVGA3D_R32_FLOAT_X8X24, 1039 0, /*SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24_TYPELESS*/ 1040 1, 1, 8, 1041 SVGA3DFORMAT_OP_TEXTURE | 1042 SVGA3DFORMAT_OP_CUBETEXTURE | 1043 SVGA3DFORMAT_OP_VOLUMETEXTURE | 1044 SVGA3DFORMAT_OP_ZSTENCIL 1045 }, 1046 { 1047 "SVGA3D_X32_G8X24_UINT", 1048 SVGA3D_X32_G8X24_UINT, 1049 SVGA3D_DEVCAP_DXFMT_X32_TYPELESS_G8X24_UINT, 1050 1, 1, 4, 0 1051 }, 1052 { 1053 "SVGA3D_R10G10B10A2_TYPELESS", 1054 SVGA3D_R10G10B10A2_TYPELESS, 1055 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS, 1056 1, 1, 4, 0 1057 }, 1058 { 1059 "SVGA3D_R10G10B10A2_UINT", 1060 SVGA3D_R10G10B10A2_UINT, 1061 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT, 1062 1, 1, 4, 0 1063 }, 1064 { 1065 "SVGA3D_R11G11B10_FLOAT", 1066 SVGA3D_R11G11B10_FLOAT, 1067 SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT, 1068 1, 1, 4, 0 1069 }, 1070 { 1071 "SVGA3D_R8G8B8A8_TYPELESS", 1072 SVGA3D_R8G8B8A8_TYPELESS, 1073 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS, 1074 1, 1, 4, 0 1075 }, 1076 { 1077 "SVGA3D_R8G8B8A8_UNORM", 1078 SVGA3D_R8G8B8A8_UNORM, 1079 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM, 1080 1, 1, 4, 0 1081 }, 1082 { 1083 "SVGA3D_R8G8B8A8_UNORM_SRGB", 1084 SVGA3D_R8G8B8A8_UNORM_SRGB, 1085 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB, 1086 1, 1, 4, 0 1087 }, 1088 { 1089 "SVGA3D_R8G8B8A8_UINT", 1090 SVGA3D_R8G8B8A8_UINT, 1091 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT, 1092 1, 1, 4, 0 1093 }, 1094 { 1095 "SVGA3D_R8G8B8A8_SINT", 1096 SVGA3D_R8G8B8A8_SINT, 1097 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT, 1098 1, 1, 4, 0 1099 }, 1100 { 1101 "SVGA3D_R16G16_TYPELESS", 1102 SVGA3D_R16G16_TYPELESS, 1103 SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS, 1104 1, 1, 4, 0 1105 }, 1106 { 1107 "SVGA3D_R16G16_UINT", 1108 SVGA3D_R16G16_UINT, 1109 SVGA3D_DEVCAP_DXFMT_R16G16_UINT, 1110 1, 1, 4, 0 1111 }, 1112 { 1113 "SVGA3D_R16G16_SINT", 1114 SVGA3D_R16G16_SINT, 1115 SVGA3D_DEVCAP_DXFMT_R16G16_SINT, 1116 1, 1, 4, 0 1117 }, 1118 { 1119 "SVGA3D_R32_TYPELESS", 1120 SVGA3D_R32_TYPELESS, 1121 SVGA3D_DEVCAP_DXFMT_R32_TYPELESS, 1122 1, 1, 4, 0 1123 }, 1124 { 1125 /* Special case: no devcap / report sampler and depth/stencil ability 1126 */ 1127 "SVGA3D_D32_FLOAT", 1128 SVGA3D_D32_FLOAT, 1129 0, /*SVGA3D_DEVCAP_DXFMT_D32_FLOAT*/ 1130 1, 1, 4, 1131 SVGA3DFORMAT_OP_TEXTURE | 1132 SVGA3DFORMAT_OP_CUBETEXTURE | 1133 SVGA3DFORMAT_OP_VOLUMETEXTURE | 1134 SVGA3DFORMAT_OP_ZSTENCIL 1135 }, 1136 { 1137 "SVGA3D_R32_UINT", 1138 SVGA3D_R32_UINT, 1139 SVGA3D_DEVCAP_DXFMT_R32_UINT, 1140 1, 1, 4, 0 1141 }, 1142 { 1143 "SVGA3D_R32_SINT", 1144 SVGA3D_R32_SINT, 1145 SVGA3D_DEVCAP_DXFMT_R32_SINT, 1146 1, 1, 4, 0 1147 }, 1148 { 1149 "SVGA3D_R24G8_TYPELESS", 1150 SVGA3D_R24G8_TYPELESS, 1151 SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS, 1152 1, 1, 4, 0 1153 }, 1154 { 1155 /* Special case: no devcap / report sampler and depth/stencil ability 1156 */ 1157 "SVGA3D_D24_UNORM_S8_UINT", 1158 SVGA3D_D24_UNORM_S8_UINT, 1159 0, /*SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT*/ 1160 1, 1, 4, 1161 SVGA3DFORMAT_OP_TEXTURE | 1162 SVGA3DFORMAT_OP_CUBETEXTURE | 1163 SVGA3DFORMAT_OP_VOLUMETEXTURE | 1164 SVGA3DFORMAT_OP_ZSTENCIL 1165 }, 1166 { 1167 /* Special case: no devcap / report sampler and depth/stencil ability 1168 */ 1169 "SVGA3D_R24_UNORM_X8", 1170 SVGA3D_R24_UNORM_X8, 1171 0, /*SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8_TYPELESS*/ 1172 1, 1, 4, 1173 SVGA3DFORMAT_OP_TEXTURE | 1174 SVGA3DFORMAT_OP_CUBETEXTURE | 1175 SVGA3DFORMAT_OP_VOLUMETEXTURE | 1176 SVGA3DFORMAT_OP_ZSTENCIL 1177 }, 1178 { 1179 "SVGA3D_X24_G8_UINT", 1180 SVGA3D_X24_G8_UINT, 1181 SVGA3D_DEVCAP_DXFMT_X24_TYPELESS_G8_UINT, 1182 1, 1, 4, 0 1183 }, 1184 { 1185 "SVGA3D_R8G8_TYPELESS", 1186 SVGA3D_R8G8_TYPELESS, 1187 SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS, 1188 1, 1, 2, 0 1189 }, 1190 { 1191 "SVGA3D_R8G8_UNORM", 1192 SVGA3D_R8G8_UNORM, 1193 SVGA3D_DEVCAP_DXFMT_R8G8_UNORM, 1194 1, 1, 2, 0 1195 }, 1196 { 1197 "SVGA3D_R8G8_UINT", 1198 SVGA3D_R8G8_UINT, 1199 SVGA3D_DEVCAP_DXFMT_R8G8_UINT, 1200 1, 1, 2, 0 1201 }, 1202 { 1203 "SVGA3D_R8G8_SINT", 1204 SVGA3D_R8G8_SINT, 1205 SVGA3D_DEVCAP_DXFMT_R8G8_SINT, 1206 1, 1, 2, 0 1207 }, 1208 { 1209 "SVGA3D_R16_TYPELESS", 1210 SVGA3D_R16_TYPELESS, 1211 SVGA3D_DEVCAP_DXFMT_R16_TYPELESS, 1212 1, 1, 2, 0 1213 }, 1214 { 1215 "SVGA3D_R16_UNORM", 1216 SVGA3D_R16_UNORM, 1217 SVGA3D_DEVCAP_DXFMT_R16_UNORM, 1218 1, 1, 2, 0 1219 }, 1220 { 1221 "SVGA3D_R16_UINT", 1222 SVGA3D_R16_UINT, 1223 SVGA3D_DEVCAP_DXFMT_R16_UINT, 1224 1, 1, 2, 0 1225 }, 1226 { 1227 "SVGA3D_R16_SNORM", 1228 SVGA3D_R16_SNORM, 1229 SVGA3D_DEVCAP_DXFMT_R16_SNORM, 1230 1, 1, 2, 0 1231 }, 1232 { 1233 "SVGA3D_R16_SINT", 1234 SVGA3D_R16_SINT, 1235 SVGA3D_DEVCAP_DXFMT_R16_SINT, 1236 1, 1, 2, 0 1237 }, 1238 { 1239 "SVGA3D_R8_TYPELESS", 1240 SVGA3D_R8_TYPELESS, 1241 SVGA3D_DEVCAP_DXFMT_R8_TYPELESS, 1242 1, 1, 1, 0 1243 }, 1244 { 1245 "SVGA3D_R8_UNORM", 1246 SVGA3D_R8_UNORM, 1247 SVGA3D_DEVCAP_DXFMT_R8_UNORM, 1248 1, 1, 1, 0 1249 }, 1250 { 1251 "SVGA3D_R8_UINT", 1252 SVGA3D_R8_UINT, 1253 SVGA3D_DEVCAP_DXFMT_R8_UINT, 1254 1, 1, 1, 0 1255 }, 1256 { 1257 "SVGA3D_R8_SNORM", 1258 SVGA3D_R8_SNORM, 1259 SVGA3D_DEVCAP_DXFMT_R8_SNORM, 1260 1, 1, 1, 0 1261 }, 1262 { 1263 "SVGA3D_R8_SINT", 1264 SVGA3D_R8_SINT, 1265 SVGA3D_DEVCAP_DXFMT_R8_SINT, 1266 1, 1, 1, 0 1267 }, 1268 { 1269 "SVGA3D_P8", 1270 SVGA3D_P8, 0, 0, 0, 0, 0 1271 }, 1272 { 1273 "SVGA3D_R9G9B9E5_SHAREDEXP", 1274 SVGA3D_R9G9B9E5_SHAREDEXP, 1275 SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP, 1276 1, 1, 4, 0 1277 }, 1278 { 1279 "SVGA3D_R8G8_B8G8_UNORM", 1280 SVGA3D_R8G8_B8G8_UNORM, 0, 0, 0, 0, 0 1281 }, 1282 { 1283 "SVGA3D_G8R8_G8B8_UNORM", 1284 SVGA3D_G8R8_G8B8_UNORM, 0, 0, 0, 0, 0 1285 }, 1286 { 1287 "SVGA3D_BC1_TYPELESS", 1288 SVGA3D_BC1_TYPELESS, 1289 SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS, 1290 4, 4, 8, 0 1291 }, 1292 { 1293 "SVGA3D_BC1_UNORM_SRGB", 1294 SVGA3D_BC1_UNORM_SRGB, 1295 SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB, 1296 4, 4, 8, 0 1297 }, 1298 { 1299 "SVGA3D_BC2_TYPELESS", 1300 SVGA3D_BC2_TYPELESS, 1301 SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS, 1302 4, 4, 16, 0 1303 }, 1304 { 1305 "SVGA3D_BC2_UNORM_SRGB", 1306 SVGA3D_BC2_UNORM_SRGB, 1307 SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB, 1308 4, 4, 16, 0 1309 }, 1310 { 1311 "SVGA3D_BC3_TYPELESS", 1312 SVGA3D_BC3_TYPELESS, 1313 SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS, 1314 4, 4, 16, 0 1315 }, 1316 { 1317 "SVGA3D_BC3_UNORM_SRGB", 1318 SVGA3D_BC3_UNORM_SRGB, 1319 4, 4, 16, 0 1320 }, 1321 { 1322 "SVGA3D_BC4_TYPELESS", 1323 SVGA3D_BC4_TYPELESS, 1324 SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS, 1325 4, 4, 8, 0 1326 }, 1327 { 1328 "SVGA3D_ATI1", 1329 SVGA3D_ATI1, 0, 0, 0, 0, 0 1330 }, 1331 { 1332 "SVGA3D_BC4_SNORM", 1333 SVGA3D_BC4_SNORM, 1334 SVGA3D_DEVCAP_DXFMT_BC4_SNORM, 1335 4, 4, 8, 0 1336 }, 1337 { 1338 "SVGA3D_BC5_TYPELESS", 1339 SVGA3D_BC5_TYPELESS, 1340 SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS, 1341 4, 4, 16, 0 1342 }, 1343 { 1344 "SVGA3D_ATI2", 1345 SVGA3D_ATI2, 0, 0, 0, 0, 0 1346 }, 1347 { 1348 "SVGA3D_BC5_SNORM", 1349 SVGA3D_BC5_SNORM, 1350 SVGA3D_DEVCAP_DXFMT_BC5_SNORM, 1351 4, 4, 16, 0 1352 }, 1353 { 1354 "SVGA3D_R10G10B10_XR_BIAS_A2_UNORM", 1355 SVGA3D_R10G10B10_XR_BIAS_A2_UNORM, 0, 0, 0, 0, 0 1356 }, 1357 { 1358 "SVGA3D_B8G8R8A8_TYPELESS", 1359 SVGA3D_B8G8R8A8_TYPELESS, 1360 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS, 1361 1, 1, 4, 0 1362 }, 1363 { 1364 "SVGA3D_B8G8R8A8_UNORM_SRGB", 1365 SVGA3D_B8G8R8A8_UNORM_SRGB, 1366 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB, 1367 1, 1, 4, 0 1368 }, 1369 { 1370 "SVGA3D_B8G8R8X8_TYPELESS", 1371 SVGA3D_B8G8R8X8_TYPELESS, 1372 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS, 1373 1, 1, 4, 0 1374 }, 1375 { 1376 "SVGA3D_B8G8R8X8_UNORM_SRGB", 1377 SVGA3D_B8G8R8X8_UNORM_SRGB, 1378 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB, 1379 1, 1, 4, 0 1380 }, 1381 { 1382 "SVGA3D_Z_DF16", 1383 SVGA3D_Z_DF16, 1384 SVGA3D_DEVCAP_SURFACEFMT_Z_DF16, 1385 1, 1, 2, 0 1386 }, 1387 { 1388 "SVGA3D_Z_DF24", 1389 SVGA3D_Z_DF24, 1390 SVGA3D_DEVCAP_SURFACEFMT_Z_DF24, 1391 1, 1, 4, 0 1392 }, 1393 { 1394 "SVGA3D_Z_D24S8_INT", 1395 SVGA3D_Z_D24S8_INT, 1396 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT, 1397 1, 1, 4, 0 1398 }, 1399 { 1400 "SVGA3D_YV12", 1401 SVGA3D_YV12, 0, 0, 0, 0, 0 1402 }, 1403 { 1404 "SVGA3D_R32G32B32A32_FLOAT", 1405 SVGA3D_R32G32B32A32_FLOAT, 1406 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT, 1407 1, 1, 16, 0 1408 }, 1409 { 1410 "SVGA3D_R16G16B16A16_FLOAT", 1411 SVGA3D_R16G16B16A16_FLOAT, 1412 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT, 1413 1, 1, 8, 0 1414 }, 1415 { 1416 "SVGA3D_R16G16B16A16_UNORM", 1417 SVGA3D_R16G16B16A16_UNORM, 1418 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM, 1419 1, 1, 8, 0 1420 }, 1421 { 1422 "SVGA3D_R32G32_FLOAT", 1423 SVGA3D_R32G32_FLOAT, 1424 SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT, 1425 1, 1, 8, 0 1426 }, 1427 { 1428 "SVGA3D_R10G10B10A2_UNORM", 1429 SVGA3D_R10G10B10A2_UNORM, 1430 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM, 1431 1, 1, 4, 0 1432 }, 1433 { 1434 "SVGA3D_R8G8B8A8_SNORM", 1435 SVGA3D_R8G8B8A8_SNORM, 1436 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM, 1437 1, 1, 4, 0 1438 }, 1439 { 1440 "SVGA3D_R16G16_FLOAT", 1441 SVGA3D_R16G16_FLOAT, 1442 SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT, 1443 1, 1, 4, 0 1444 }, 1445 { 1446 "SVGA3D_R16G16_UNORM", 1447 SVGA3D_R16G16_UNORM, 1448 SVGA3D_DEVCAP_DXFMT_R16G16_UNORM, 1449 1, 1, 4, 0 1450 }, 1451 { 1452 "SVGA3D_R16G16_SNORM", 1453 SVGA3D_R16G16_SNORM, 1454 SVGA3D_DEVCAP_DXFMT_R16G16_SNORM, 1455 1, 1, 4, 0 1456 }, 1457 { 1458 "SVGA3D_R32_FLOAT", 1459 SVGA3D_R32_FLOAT, 1460 SVGA3D_DEVCAP_DXFMT_R32_FLOAT, 1461 1, 1, 4, 0 1462 }, 1463 { 1464 "SVGA3D_R8G8_SNORM", 1465 SVGA3D_R8G8_SNORM, 1466 SVGA3D_DEVCAP_DXFMT_R8G8_SNORM, 1467 1, 1, 2, 0 1468 }, 1469 { 1470 "SVGA3D_R16_FLOAT", 1471 SVGA3D_R16_FLOAT, 1472 SVGA3D_DEVCAP_DXFMT_R16_FLOAT, 1473 1, 1, 2, 0 1474 }, 1475 { 1476 "SVGA3D_D16_UNORM", 1477 SVGA3D_D16_UNORM, 1478 0, /*SVGA3D_DEVCAP_DXFMT_D16_UNORM*/ 1479 1, 1, 2, 1480 SVGA3DFORMAT_OP_TEXTURE | 1481 SVGA3DFORMAT_OP_CUBETEXTURE | 1482 SVGA3DFORMAT_OP_VOLUMETEXTURE | 1483 SVGA3DFORMAT_OP_ZSTENCIL 1484 }, 1485 { 1486 "SVGA3D_A8_UNORM", 1487 SVGA3D_A8_UNORM, 1488 SVGA3D_DEVCAP_DXFMT_A8_UNORM, 1489 1, 1, 1, 0 1490 }, 1491 { 1492 "SVGA3D_BC1_UNORM", 1493 SVGA3D_BC1_UNORM, 1494 SVGA3D_DEVCAP_DXFMT_BC1_UNORM, 1495 4, 4, 8, 0 1496 }, 1497 { 1498 "SVGA3D_BC2_UNORM", 1499 SVGA3D_BC2_UNORM, 1500 SVGA3D_DEVCAP_DXFMT_BC2_UNORM, 1501 4, 4, 16, 0 1502 }, 1503 { 1504 "SVGA3D_BC3_UNORM", 1505 SVGA3D_BC3_UNORM, 1506 SVGA3D_DEVCAP_DXFMT_BC3_UNORM, 1507 4, 4, 16, 0 1508 }, 1509 { 1510 "SVGA3D_B5G6R5_UNORM", 1511 SVGA3D_B5G6R5_UNORM, 1512 SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM, 1513 1, 1, 2, 0 1514 }, 1515 { 1516 "SVGA3D_B5G5R5A1_UNORM", 1517 SVGA3D_B5G5R5A1_UNORM, 1518 SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM, 1519 1, 1, 2, 0 1520 }, 1521 { 1522 "SVGA3D_B8G8R8A8_UNORM", 1523 SVGA3D_B8G8R8A8_UNORM, 1524 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM, 1525 1, 1, 4, 0 1526 }, 1527 { 1528 "SVGA3D_B8G8R8X8_UNORM", 1529 SVGA3D_B8G8R8X8_UNORM, 1530 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM, 1531 1, 1, 4, 0 1532 }, 1533 { 1534 "SVGA3D_BC4_UNORM", 1535 SVGA3D_BC4_UNORM, 1536 SVGA3D_DEVCAP_DXFMT_BC4_UNORM, 1537 4, 4, 8, 0 1538 }, 1539 { 1540 "SVGA3D_BC5_UNORM", 1541 SVGA3D_BC5_UNORM, 1542 SVGA3D_DEVCAP_DXFMT_BC5_UNORM, 1543 4, 4, 16, 0 1544 } 1545 }; 1546 1547 static const SVGA3dSurfaceFormat compat_x8r8g8b8[] = { 1548 SVGA3D_X8R8G8B8, SVGA3D_A8R8G8B8, SVGA3D_B8G8R8X8_UNORM, 1549 SVGA3D_B8G8R8A8_UNORM, 0 1550 }; 1551 static const SVGA3dSurfaceFormat compat_r8[] = { 1552 SVGA3D_R8_UNORM, SVGA3D_NV12, SVGA3D_YV12, 0 1553 }; 1554 static const SVGA3dSurfaceFormat compat_g8r8[] = { 1555 SVGA3D_R8G8_UNORM, SVGA3D_NV12, 0 1556 }; 1557 static const SVGA3dSurfaceFormat compat_r5g6b5[] = { 1558 SVGA3D_R5G6B5, SVGA3D_B5G6R5_UNORM, 0 1559 }; 1560 1561 static const struct format_compat_entry format_compats[] = { 1562 {PIPE_FORMAT_B8G8R8X8_UNORM, compat_x8r8g8b8}, 1563 {PIPE_FORMAT_B8G8R8A8_UNORM, compat_x8r8g8b8}, 1564 {PIPE_FORMAT_R8_UNORM, compat_r8}, 1565 {PIPE_FORMAT_R8G8_UNORM, compat_g8r8}, 1566 {PIPE_FORMAT_B5G6R5_UNORM, compat_r5g6b5} 1567 }; 1568 1569 /** 1570 * Debug only: 1571 * 1. check that format_cap_table[i] matches the i-th SVGA3D format. 1572 * 2. check that format_conversion_table[i].pformat == i. 1573 */ 1574 static void 1575 check_format_tables(void) 1576 { 1577 static boolean first_call = TRUE; 1578 1579 if (first_call) { 1580 unsigned i; 1581 1582 STATIC_ASSERT(ARRAY_SIZE(format_cap_table) == SVGA3D_FORMAT_MAX); 1583 for (i = 0; i < ARRAY_SIZE(format_cap_table); i++) { 1584 assert(format_cap_table[i].format == i); 1585 } 1586 1587 STATIC_ASSERT(ARRAY_SIZE(format_conversion_table) == PIPE_FORMAT_COUNT); 1588 for (i = 0; i < ARRAY_SIZE(format_conversion_table); i++) { 1589 assert(format_conversion_table[i].pformat == i); 1590 } 1591 1592 first_call = FALSE; 1593 } 1594 } 1595 1596 1597 /* 1598 * Get format capabilities from the host. It takes in consideration 1599 * deprecated/unsupported formats, and formats which are implicitely assumed to 1600 * be supported when the host does not provide an explicit capability entry. 1601 */ 1602 void 1603 svga_get_format_cap(struct svga_screen *ss, 1604 SVGA3dSurfaceFormat format, 1605 SVGA3dSurfaceFormatCaps *caps) 1606 { 1607 struct svga_winsys_screen *sws = ss->sws; 1608 SVGA3dDevCapResult result; 1609 const struct format_cap *entry; 1610 1611 #ifdef DEBUG 1612 check_format_tables(); 1613 #else 1614 (void) check_format_tables; 1615 #endif 1616 1617 assert(format < ARRAY_SIZE(format_cap_table)); 1618 entry = &format_cap_table[format]; 1619 assert(entry->format == format); 1620 1621 if (entry->devcap && sws->get_cap(sws, entry->devcap, &result)) { 1622 assert(format < SVGA3D_UYVY || entry->defaultOperations == 0); 1623 1624 /* Explicitly advertised format */ 1625 if (entry->devcap > SVGA3D_DEVCAP_DX) { 1626 /* Translate DX/VGPU10 format cap to VGPU9 cap */ 1627 caps->value = 0; 1628 if (result.u & SVGA3D_DXFMT_COLOR_RENDERTARGET) 1629 caps->value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET; 1630 if (!(result.u & SVGA3D_DXFMT_BLENDABLE)) 1631 caps->value |= SVGA3DFORMAT_OP_NOALPHABLEND; 1632 if (result.u & SVGA3D_DXFMT_DEPTH_RENDERTARGET) 1633 caps->value |= SVGA3DFORMAT_OP_ZSTENCIL; 1634 if (result.u & SVGA3D_DXFMT_SHADER_SAMPLE) 1635 caps->value |= (SVGA3DFORMAT_OP_TEXTURE | 1636 SVGA3DFORMAT_OP_CUBETEXTURE); 1637 if (result.u & SVGA3D_DXFMT_VOLUME) 1638 caps->value |= SVGA3DFORMAT_OP_VOLUMETEXTURE; 1639 } 1640 else { 1641 /* Return VGPU9 format cap as-is */ 1642 caps->value = result.u; 1643 } 1644 1645 } else { 1646 /* Implicitly advertised format -- use default caps */ 1647 caps->value = entry->defaultOperations; 1648 } 1649 } 1650 1651 1652 void 1653 svga_format_size(SVGA3dSurfaceFormat format, 1654 unsigned *block_width, 1655 unsigned *block_height, 1656 unsigned *bytes_per_block) 1657 { 1658 assert(format < ARRAY_SIZE(format_cap_table)); 1659 *block_width = format_cap_table[format].block_width; 1660 *block_height = format_cap_table[format].block_height; 1661 *bytes_per_block = format_cap_table[format].block_bytes; 1662 /* Make sure the table entry was valid */ 1663 if (*block_width == 0) 1664 debug_printf("Bad table entry for %s\n", svga_format_name(format)); 1665 assert(*block_width); 1666 assert(*block_height); 1667 assert(*bytes_per_block); 1668 } 1669 1670 1671 const char * 1672 svga_format_name(SVGA3dSurfaceFormat format) 1673 { 1674 assert(format < ARRAY_SIZE(format_cap_table)); 1675 return format_cap_table[format].name; 1676 } 1677 1678 1679 /** 1680 * Is the given SVGA3dSurfaceFormat a signed or unsigned integer color format? 1681 */ 1682 boolean 1683 svga_format_is_integer(SVGA3dSurfaceFormat format) 1684 { 1685 switch (format) { 1686 case SVGA3D_R32G32B32A32_SINT: 1687 case SVGA3D_R32G32B32_SINT: 1688 case SVGA3D_R32G32_SINT: 1689 case SVGA3D_R32_SINT: 1690 case SVGA3D_R16G16B16A16_SINT: 1691 case SVGA3D_R16G16_SINT: 1692 case SVGA3D_R16_SINT: 1693 case SVGA3D_R8G8B8A8_SINT: 1694 case SVGA3D_R8G8_SINT: 1695 case SVGA3D_R8_SINT: 1696 case SVGA3D_R32G32B32A32_UINT: 1697 case SVGA3D_R32G32B32_UINT: 1698 case SVGA3D_R32G32_UINT: 1699 case SVGA3D_R32_UINT: 1700 case SVGA3D_R16G16B16A16_UINT: 1701 case SVGA3D_R16G16_UINT: 1702 case SVGA3D_R16_UINT: 1703 case SVGA3D_R8G8B8A8_UINT: 1704 case SVGA3D_R8G8_UINT: 1705 case SVGA3D_R8_UINT: 1706 case SVGA3D_R10G10B10A2_UINT: 1707 return TRUE; 1708 default: 1709 return FALSE; 1710 } 1711 } 1712 1713 boolean 1714 svga_format_support_gen_mips(enum pipe_format format) 1715 { 1716 assert(format < ARRAY_SIZE(format_conversion_table)); 1717 return ((format_conversion_table[format].flags & TF_GEN_MIPS) > 0); 1718 } 1719 1720 1721 /** 1722 * Given a texture format, return the expected data type returned from 1723 * the texture sampler. For example, UNORM8 formats return floating point 1724 * values while SINT formats returned signed integer values. 1725 * Note: this function could be moved into the gallum u_format.[ch] code 1726 * if it's useful to anyone else. 1727 */ 1728 enum tgsi_return_type 1729 svga_get_texture_datatype(enum pipe_format format) 1730 { 1731 const struct util_format_description *desc = util_format_description(format); 1732 enum tgsi_return_type t; 1733 1734 if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN ) { 1735 if (util_format_is_depth_or_stencil(format)) { 1736 t = TGSI_RETURN_TYPE_FLOAT; /* XXX revisit this */ 1737 } 1738 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) { 1739 t = TGSI_RETURN_TYPE_FLOAT; 1740 } 1741 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED) { 1742 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_UNORM : TGSI_RETURN_TYPE_UINT; 1743 } 1744 else if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) { 1745 t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_SNORM : TGSI_RETURN_TYPE_SINT; 1746 } 1747 else { 1748 assert(!"Unexpected channel type in svga_get_texture_datatype()"); 1749 t = TGSI_RETURN_TYPE_FLOAT; 1750 } 1751 } 1752 else { 1753 /* compressed format, shared exponent format, etc. */ 1754 switch (format) { 1755 case PIPE_FORMAT_DXT1_RGB: 1756 case PIPE_FORMAT_DXT1_RGBA: 1757 case PIPE_FORMAT_DXT3_RGBA: 1758 case PIPE_FORMAT_DXT5_RGBA: 1759 case PIPE_FORMAT_DXT1_SRGB: 1760 case PIPE_FORMAT_DXT1_SRGBA: 1761 case PIPE_FORMAT_DXT3_SRGBA: 1762 case PIPE_FORMAT_DXT5_SRGBA: 1763 case PIPE_FORMAT_RGTC1_UNORM: 1764 case PIPE_FORMAT_RGTC2_UNORM: 1765 case PIPE_FORMAT_LATC1_UNORM: 1766 case PIPE_FORMAT_LATC2_UNORM: 1767 case PIPE_FORMAT_ETC1_RGB8: 1768 t = TGSI_RETURN_TYPE_UNORM; 1769 break; 1770 case PIPE_FORMAT_RGTC1_SNORM: 1771 case PIPE_FORMAT_RGTC2_SNORM: 1772 case PIPE_FORMAT_LATC1_SNORM: 1773 case PIPE_FORMAT_LATC2_SNORM: 1774 case PIPE_FORMAT_R10G10B10X2_SNORM: 1775 t = TGSI_RETURN_TYPE_SNORM; 1776 break; 1777 case PIPE_FORMAT_R11G11B10_FLOAT: 1778 case PIPE_FORMAT_R9G9B9E5_FLOAT: 1779 t = TGSI_RETURN_TYPE_FLOAT; 1780 break; 1781 default: 1782 assert(!"Unexpected channel type in svga_get_texture_datatype()"); 1783 t = TGSI_RETURN_TYPE_FLOAT; 1784 } 1785 } 1786 1787 return t; 1788 } 1789 1790 1791 /** 1792 * Given an svga context, return true iff there are currently any integer color 1793 * buffers attached to the framebuffer. 1794 */ 1795 boolean 1796 svga_has_any_integer_cbufs(const struct svga_context *svga) 1797 { 1798 unsigned i; 1799 for (i = 0; i < PIPE_MAX_COLOR_BUFS; ++i) { 1800 struct pipe_surface *cbuf = svga->curr.framebuffer.cbufs[i]; 1801 1802 if (cbuf && util_format_is_pure_integer(cbuf->format)) { 1803 return TRUE; 1804 } 1805 } 1806 return FALSE; 1807 } 1808 1809 1810 /** 1811 * Given an SVGA format, return the corresponding typeless format. 1812 * If there is no typeless format, return the format unchanged. 1813 */ 1814 SVGA3dSurfaceFormat 1815 svga_typeless_format(SVGA3dSurfaceFormat format) 1816 { 1817 switch (format) { 1818 case SVGA3D_R32G32B32A32_UINT: 1819 case SVGA3D_R32G32B32A32_SINT: 1820 case SVGA3D_R32G32B32A32_FLOAT: 1821 return SVGA3D_R32G32B32A32_TYPELESS; 1822 case SVGA3D_R32G32B32_FLOAT: 1823 case SVGA3D_R32G32B32_UINT: 1824 case SVGA3D_R32G32B32_SINT: 1825 return SVGA3D_R32G32B32_TYPELESS; 1826 case SVGA3D_R16G16B16A16_UINT: 1827 case SVGA3D_R16G16B16A16_UNORM: 1828 case SVGA3D_R16G16B16A16_SNORM: 1829 case SVGA3D_R16G16B16A16_SINT: 1830 case SVGA3D_R16G16B16A16_FLOAT: 1831 return SVGA3D_R16G16B16A16_TYPELESS; 1832 case SVGA3D_R32G32_UINT: 1833 case SVGA3D_R32G32_SINT: 1834 case SVGA3D_R32G32_FLOAT: 1835 return SVGA3D_R32G32_TYPELESS; 1836 case SVGA3D_D32_FLOAT_S8X24_UINT: 1837 case SVGA3D_X32_G8X24_UINT: 1838 case SVGA3D_R32G8X24_TYPELESS: 1839 return SVGA3D_R32G8X24_TYPELESS; 1840 case SVGA3D_R10G10B10A2_UINT: 1841 case SVGA3D_R10G10B10A2_UNORM: 1842 return SVGA3D_R10G10B10A2_TYPELESS; 1843 case SVGA3D_R8G8B8A8_UNORM: 1844 case SVGA3D_R8G8B8A8_SNORM: 1845 case SVGA3D_R8G8B8A8_UNORM_SRGB: 1846 case SVGA3D_R8G8B8A8_UINT: 1847 case SVGA3D_R8G8B8A8_SINT: 1848 case SVGA3D_R8G8B8A8_TYPELESS: 1849 return SVGA3D_R8G8B8A8_TYPELESS; 1850 case SVGA3D_R16G16_UINT: 1851 case SVGA3D_R16G16_SINT: 1852 case SVGA3D_R16G16_UNORM: 1853 case SVGA3D_R16G16_SNORM: 1854 case SVGA3D_R16G16_FLOAT: 1855 return SVGA3D_R16G16_TYPELESS; 1856 case SVGA3D_D32_FLOAT: 1857 case SVGA3D_R32_FLOAT: 1858 case SVGA3D_R32_UINT: 1859 case SVGA3D_R32_SINT: 1860 case SVGA3D_R32_TYPELESS: 1861 return SVGA3D_R32_TYPELESS; 1862 case SVGA3D_D24_UNORM_S8_UINT: 1863 case SVGA3D_R24G8_TYPELESS: 1864 return SVGA3D_R24G8_TYPELESS; 1865 case SVGA3D_X24_G8_UINT: 1866 return SVGA3D_R24_UNORM_X8; 1867 case SVGA3D_R8G8_UNORM: 1868 case SVGA3D_R8G8_SNORM: 1869 case SVGA3D_R8G8_UINT: 1870 case SVGA3D_R8G8_SINT: 1871 return SVGA3D_R8G8_TYPELESS; 1872 case SVGA3D_D16_UNORM: 1873 case SVGA3D_R16_UNORM: 1874 case SVGA3D_R16_UINT: 1875 case SVGA3D_R16_SNORM: 1876 case SVGA3D_R16_SINT: 1877 case SVGA3D_R16_FLOAT: 1878 case SVGA3D_R16_TYPELESS: 1879 return SVGA3D_R16_TYPELESS; 1880 case SVGA3D_R8_UNORM: 1881 case SVGA3D_R8_UINT: 1882 case SVGA3D_R8_SNORM: 1883 case SVGA3D_R8_SINT: 1884 return SVGA3D_R8_TYPELESS; 1885 case SVGA3D_B8G8R8A8_UNORM_SRGB: 1886 case SVGA3D_B8G8R8A8_UNORM: 1887 case SVGA3D_B8G8R8A8_TYPELESS: 1888 return SVGA3D_B8G8R8A8_TYPELESS; 1889 case SVGA3D_B8G8R8X8_UNORM_SRGB: 1890 case SVGA3D_B8G8R8X8_UNORM: 1891 case SVGA3D_B8G8R8X8_TYPELESS: 1892 return SVGA3D_B8G8R8X8_TYPELESS; 1893 case SVGA3D_BC1_UNORM: 1894 case SVGA3D_BC1_UNORM_SRGB: 1895 case SVGA3D_BC1_TYPELESS: 1896 return SVGA3D_BC1_TYPELESS; 1897 case SVGA3D_BC2_UNORM: 1898 case SVGA3D_BC2_UNORM_SRGB: 1899 case SVGA3D_BC2_TYPELESS: 1900 return SVGA3D_BC2_TYPELESS; 1901 case SVGA3D_BC3_UNORM: 1902 case SVGA3D_BC3_UNORM_SRGB: 1903 case SVGA3D_BC3_TYPELESS: 1904 return SVGA3D_BC3_TYPELESS; 1905 case SVGA3D_BC4_UNORM: 1906 case SVGA3D_BC4_SNORM: 1907 return SVGA3D_BC4_TYPELESS; 1908 case SVGA3D_BC5_UNORM: 1909 case SVGA3D_BC5_SNORM: 1910 return SVGA3D_BC5_TYPELESS; 1911 1912 /* Special cases (no corresponding _TYPELESS formats) */ 1913 case SVGA3D_A8_UNORM: 1914 case SVGA3D_B5G5R5A1_UNORM: 1915 case SVGA3D_B5G6R5_UNORM: 1916 case SVGA3D_R11G11B10_FLOAT: 1917 case SVGA3D_R9G9B9E5_SHAREDEXP: 1918 return format; 1919 default: 1920 debug_printf("Unexpected format %s in %s\n", 1921 svga_format_name(format), __FUNCTION__); 1922 return format; 1923 } 1924 } 1925 1926 1927 /** 1928 * Given a surface format, return the corresponding format to use for 1929 * a texture sampler. In most cases, it's the format unchanged, but there 1930 * are some special cases. 1931 */ 1932 SVGA3dSurfaceFormat 1933 svga_sampler_format(SVGA3dSurfaceFormat format) 1934 { 1935 switch (format) { 1936 case SVGA3D_D16_UNORM: 1937 return SVGA3D_R16_UNORM; 1938 case SVGA3D_D24_UNORM_S8_UINT: 1939 return SVGA3D_R24_UNORM_X8; 1940 case SVGA3D_D32_FLOAT: 1941 return SVGA3D_R32_FLOAT; 1942 case SVGA3D_D32_FLOAT_S8X24_UINT: 1943 return SVGA3D_R32_FLOAT_X8X24; 1944 default: 1945 return format; 1946 } 1947 } 1948 1949 1950 /** 1951 * Is the given format an uncompressed snorm format? 1952 */ 1953 bool 1954 svga_format_is_uncompressed_snorm(SVGA3dSurfaceFormat format) 1955 { 1956 switch (format) { 1957 case SVGA3D_R8G8B8A8_SNORM: 1958 case SVGA3D_R8G8_SNORM: 1959 case SVGA3D_R8_SNORM: 1960 case SVGA3D_R16G16B16A16_SNORM: 1961 case SVGA3D_R16G16_SNORM: 1962 case SVGA3D_R16_SNORM: 1963 return true; 1964 default: 1965 return false; 1966 } 1967 } 1968 1969 1970 bool 1971 svga_format_is_typeless(SVGA3dSurfaceFormat format) 1972 { 1973 switch (format) { 1974 case SVGA3D_R32G32B32A32_TYPELESS: 1975 case SVGA3D_R32G32B32_TYPELESS: 1976 case SVGA3D_R16G16B16A16_TYPELESS: 1977 case SVGA3D_R32G32_TYPELESS: 1978 case SVGA3D_R32G8X24_TYPELESS: 1979 case SVGA3D_R10G10B10A2_TYPELESS: 1980 case SVGA3D_R8G8B8A8_TYPELESS: 1981 case SVGA3D_R16G16_TYPELESS: 1982 case SVGA3D_R32_TYPELESS: 1983 case SVGA3D_R24G8_TYPELESS: 1984 case SVGA3D_R8G8_TYPELESS: 1985 case SVGA3D_R16_TYPELESS: 1986 case SVGA3D_R8_TYPELESS: 1987 case SVGA3D_BC1_TYPELESS: 1988 case SVGA3D_BC2_TYPELESS: 1989 case SVGA3D_BC3_TYPELESS: 1990 case SVGA3D_BC4_TYPELESS: 1991 case SVGA3D_BC5_TYPELESS: 1992 case SVGA3D_B8G8R8A8_TYPELESS: 1993 case SVGA3D_B8G8R8X8_TYPELESS: 1994 return true; 1995 default: 1996 return false; 1997 } 1998 } 1999 2000 2001 /** 2002 * \brief Can we import a surface with a given SVGA3D format as a texture? 2003 * 2004 * \param ss[in] pointer to the svga screen. 2005 * \param pformat[in] pipe format of the local texture. 2006 * \param sformat[in] svga3d format of the imported surface. 2007 * \param bind[in] bind flags of the imported texture. 2008 * \param verbose[in] Print out incompatibilities in debug mode. 2009 */ 2010 bool 2011 svga_format_is_shareable(const struct svga_screen *ss, 2012 enum pipe_format pformat, 2013 SVGA3dSurfaceFormat sformat, 2014 unsigned bind, 2015 bool verbose) 2016 { 2017 SVGA3dSurfaceFormat default_format = 2018 svga_translate_format(ss, pformat, bind); 2019 int i; 2020 2021 if (default_format == SVGA3D_FORMAT_INVALID) 2022 return false; 2023 if (default_format == sformat) 2024 return true; 2025 2026 for (i = 0; i < ARRAY_SIZE(format_compats); ++i) { 2027 if (format_compats[i].pformat == pformat) { 2028 const SVGA3dSurfaceFormat *compat_format = 2029 format_compats[i].compat_format; 2030 while (*compat_format != 0) { 2031 if (*compat_format == sformat) 2032 return true; 2033 compat_format++; 2034 } 2035 } 2036 } 2037 2038 if (verbose) { 2039 debug_printf("Incompatible imported surface format.\n"); 2040 debug_printf("Texture format: \"%s\". Imported format: \"%s\".\n", 2041 svga_format_name(default_format), 2042 svga_format_name(sformat)); 2043 } 2044 2045 return false; 2046 } 2047 2048 2049 /** 2050 * Return the sRGB format which corresponds to the given (linear) format. 2051 * If there's no such sRGB format, return the format as-is. 2052 */ 2053 SVGA3dSurfaceFormat 2054 svga_linear_to_srgb(SVGA3dSurfaceFormat format) 2055 { 2056 switch (format) { 2057 case SVGA3D_R8G8B8A8_UNORM: 2058 return SVGA3D_R8G8B8A8_UNORM_SRGB; 2059 case SVGA3D_BC1_UNORM: 2060 return SVGA3D_BC1_UNORM_SRGB; 2061 case SVGA3D_BC2_UNORM: 2062 return SVGA3D_BC2_UNORM_SRGB; 2063 case SVGA3D_BC3_UNORM: 2064 return SVGA3D_BC3_UNORM_SRGB; 2065 case SVGA3D_B8G8R8A8_UNORM: 2066 return SVGA3D_B8G8R8A8_UNORM_SRGB; 2067 case SVGA3D_B8G8R8X8_UNORM: 2068 return SVGA3D_B8G8R8X8_UNORM_SRGB; 2069 default: 2070 return format; 2071 } 2072 } 2073 2074 2075 /** 2076 * Implement pipe_screen::is_format_supported(). 2077 * \param bindings bitmask of PIPE_BIND_x flags 2078 */ 2079 boolean 2080 svga_is_format_supported(struct pipe_screen *screen, 2081 enum pipe_format format, 2082 enum pipe_texture_target target, 2083 unsigned sample_count, 2084 unsigned bindings) 2085 { 2086 struct svga_screen *ss = svga_screen(screen); 2087 SVGA3dSurfaceFormat svga_format; 2088 SVGA3dSurfaceFormatCaps caps; 2089 SVGA3dSurfaceFormatCaps mask; 2090 2091 assert(bindings); 2092 2093 if (sample_count > 1) { 2094 /* In ms_samples, if bit N is set it means that we support 2095 * multisample with N+1 samples per pixel. 2096 */ 2097 if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) { 2098 return FALSE; 2099 } 2100 } 2101 2102 svga_format = svga_translate_format(ss, format, bindings); 2103 if (svga_format == SVGA3D_FORMAT_INVALID) { 2104 return FALSE; 2105 } 2106 2107 if (!ss->sws->have_vgpu10 && 2108 util_format_is_srgb(format) && 2109 (bindings & (PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_RENDER_TARGET))) { 2110 /* We only support sRGB rendering with vgpu10 */ 2111 return FALSE; 2112 } 2113 2114 /* 2115 * For VGPU10 vertex formats, skip querying host capabilities 2116 */ 2117 2118 if (ss->sws->have_vgpu10 && (bindings & PIPE_BIND_VERTEX_BUFFER)) { 2119 SVGA3dSurfaceFormat svga_format; 2120 unsigned flags; 2121 svga_translate_vertex_format_vgpu10(format, &svga_format, &flags); 2122 return svga_format != SVGA3D_FORMAT_INVALID; 2123 } 2124 2125 /* 2126 * Override host capabilities, so that we end up with the same 2127 * visuals for all virtual hardware implementations. 2128 */ 2129 if (bindings & PIPE_BIND_DISPLAY_TARGET) { 2130 switch (svga_format) { 2131 case SVGA3D_A8R8G8B8: 2132 case SVGA3D_X8R8G8B8: 2133 case SVGA3D_R5G6B5: 2134 break; 2135 2136 /* VGPU10 formats */ 2137 case SVGA3D_B8G8R8A8_UNORM: 2138 case SVGA3D_B8G8R8X8_UNORM: 2139 case SVGA3D_B5G6R5_UNORM: 2140 case SVGA3D_B8G8R8X8_UNORM_SRGB: 2141 case SVGA3D_B8G8R8A8_UNORM_SRGB: 2142 case SVGA3D_R8G8B8A8_UNORM_SRGB: 2143 break; 2144 2145 /* Often unsupported/problematic. This means we end up with the same 2146 * visuals for all virtual hardware implementations. 2147 */ 2148 case SVGA3D_A4R4G4B4: 2149 case SVGA3D_A1R5G5B5: 2150 return FALSE; 2151 2152 default: 2153 return FALSE; 2154 } 2155 } 2156 2157 /* 2158 * Query the host capabilities. 2159 */ 2160 svga_get_format_cap(ss, svga_format, &caps); 2161 2162 if (bindings & PIPE_BIND_RENDER_TARGET) { 2163 /* Check that the color surface is blendable, unless it's an 2164 * integer format. 2165 */ 2166 if (!svga_format_is_integer(svga_format) && 2167 (caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) { 2168 return FALSE; 2169 } 2170 } 2171 2172 mask.value = 0; 2173 if (bindings & PIPE_BIND_RENDER_TARGET) { 2174 mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET; 2175 } 2176 if (bindings & PIPE_BIND_DEPTH_STENCIL) { 2177 mask.value |= SVGA3DFORMAT_OP_ZSTENCIL; 2178 } 2179 if (bindings & PIPE_BIND_SAMPLER_VIEW) { 2180 mask.value |= SVGA3DFORMAT_OP_TEXTURE; 2181 } 2182 2183 if (target == PIPE_TEXTURE_CUBE) { 2184 mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE; 2185 } 2186 else if (target == PIPE_TEXTURE_3D) { 2187 mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE; 2188 } 2189 2190 return (caps.value & mask.value) == mask.value; 2191 } 2192
