1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines the TargetMachine and LLVMTargetMachine classes. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_TARGET_TARGETMACHINE_H 15 #define LLVM_TARGET_TARGETMACHINE_H 16 17 #include "llvm/ADT/StringRef.h" 18 #include "llvm/ADT/Triple.h" 19 #include "llvm/IR/DataLayout.h" 20 #include "llvm/Pass.h" 21 #include "llvm/Support/CodeGen.h" 22 #include "llvm/Target/TargetOptions.h" 23 #include <string> 24 25 namespace llvm { 26 27 class Function; 28 class GlobalValue; 29 class MachineModuleInfo; 30 class Mangler; 31 class MCAsmInfo; 32 class MCContext; 33 class MCInstrInfo; 34 class MCRegisterInfo; 35 class MCSubtargetInfo; 36 class MCSymbol; 37 class raw_pwrite_stream; 38 class PassManagerBuilder; 39 class Target; 40 class TargetIntrinsicInfo; 41 class TargetIRAnalysis; 42 class TargetTransformInfo; 43 class TargetLoweringObjectFile; 44 class TargetPassConfig; 45 class TargetSubtargetInfo; 46 47 // The old pass manager infrastructure is hidden in a legacy namespace now. 48 namespace legacy { 49 class PassManagerBase; 50 } 51 using legacy::PassManagerBase; 52 53 //===----------------------------------------------------------------------===// 54 /// 55 /// Primary interface to the complete machine description for the target 56 /// machine. All target-specific information should be accessible through this 57 /// interface. 58 /// 59 class TargetMachine { 60 protected: // Can only create subclasses. 61 TargetMachine(const Target &T, StringRef DataLayoutString, 62 const Triple &TargetTriple, StringRef CPU, StringRef FS, 63 const TargetOptions &Options); 64 65 /// The Target that this machine was created for. 66 const Target &TheTarget; 67 68 /// DataLayout for the target: keep ABI type size and alignment. 69 /// 70 /// The DataLayout is created based on the string representation provided 71 /// during construction. It is kept here only to avoid reparsing the string 72 /// but should not really be used during compilation, because it has an 73 /// internal cache that is context specific. 74 const DataLayout DL; 75 76 /// Triple string, CPU name, and target feature strings the TargetMachine 77 /// instance is created with. 78 Triple TargetTriple; 79 std::string TargetCPU; 80 std::string TargetFS; 81 82 Reloc::Model RM = Reloc::Static; 83 CodeModel::Model CMModel = CodeModel::Small; 84 CodeGenOpt::Level OptLevel = CodeGenOpt::Default; 85 86 /// Contains target specific asm information. 87 const MCAsmInfo *AsmInfo; 88 89 const MCRegisterInfo *MRI; 90 const MCInstrInfo *MII; 91 const MCSubtargetInfo *STI; 92 93 unsigned RequireStructuredCFG : 1; 94 unsigned O0WantsFastISel : 1; 95 96 public: 97 const TargetOptions DefaultOptions; 98 mutable TargetOptions Options; 99 100 TargetMachine(const TargetMachine &) = delete; 101 void operator=(const TargetMachine &) = delete; 102 virtual ~TargetMachine(); 103 104 const Target &getTarget() const { return TheTarget; } 105 106 const Triple &getTargetTriple() const { return TargetTriple; } 107 StringRef getTargetCPU() const { return TargetCPU; } 108 StringRef getTargetFeatureString() const { return TargetFS; } 109 110 /// Virtual method implemented by subclasses that returns a reference to that 111 /// target's TargetSubtargetInfo-derived member variable. 112 virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const { 113 return nullptr; 114 } 115 virtual TargetLoweringObjectFile *getObjFileLowering() const { 116 return nullptr; 117 } 118 119 /// This method returns a pointer to the specified type of 120 /// TargetSubtargetInfo. In debug builds, it verifies that the object being 121 /// returned is of the correct type. 122 template <typename STC> const STC &getSubtarget(const Function &F) const { 123 return *static_cast<const STC*>(getSubtargetImpl(F)); 124 } 125 126 /// Create a DataLayout. 127 const DataLayout createDataLayout() const { return DL; } 128 129 /// Test if a DataLayout if compatible with the CodeGen for this target. 130 /// 131 /// The LLVM Module owns a DataLayout that is used for the target independent 132 /// optimizations and code generation. This hook provides a target specific 133 /// check on the validity of this DataLayout. 134 bool isCompatibleDataLayout(const DataLayout &Candidate) const { 135 return DL == Candidate; 136 } 137 138 /// Get the pointer size for this target. 139 /// 140 /// This is the only time the DataLayout in the TargetMachine is used. 141 unsigned getPointerSize(unsigned AS) const { 142 return DL.getPointerSize(AS); 143 } 144 145 unsigned getPointerSizeInBits(unsigned AS) const { 146 return DL.getPointerSizeInBits(AS); 147 } 148 149 unsigned getProgramPointerSize() const { 150 return DL.getPointerSize(DL.getProgramAddressSpace()); 151 } 152 153 unsigned getAllocaPointerSize() const { 154 return DL.getPointerSize(DL.getAllocaAddrSpace()); 155 } 156 157 /// Reset the target options based on the function's attributes. 158 // FIXME: Remove TargetOptions that affect per-function code generation 159 // from TargetMachine. 160 void resetTargetOptions(const Function &F) const; 161 162 /// Return target specific asm information. 163 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; } 164 165 const MCRegisterInfo *getMCRegisterInfo() const { return MRI; } 166 const MCInstrInfo *getMCInstrInfo() const { return MII; } 167 const MCSubtargetInfo *getMCSubtargetInfo() const { return STI; } 168 169 /// If intrinsic information is available, return it. If not, return null. 170 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { 171 return nullptr; 172 } 173 174 bool requiresStructuredCFG() const { return RequireStructuredCFG; } 175 void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; } 176 177 /// Returns the code generation relocation model. The choices are static, PIC, 178 /// and dynamic-no-pic, and target default. 179 Reloc::Model getRelocationModel() const; 180 181 /// Returns the code model. The choices are small, kernel, medium, large, and 182 /// target default. 183 CodeModel::Model getCodeModel() const; 184 185 bool isPositionIndependent() const; 186 187 bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const; 188 189 /// Returns true if this target uses emulated TLS. 190 bool useEmulatedTLS() const; 191 192 /// Returns the TLS model which should be used for the given global variable. 193 TLSModel::Model getTLSModel(const GlobalValue *GV) const; 194 195 /// Returns the optimization level: None, Less, Default, or Aggressive. 196 CodeGenOpt::Level getOptLevel() const; 197 198 /// Overrides the optimization level. 199 void setOptLevel(CodeGenOpt::Level Level); 200 201 void setFastISel(bool Enable) { Options.EnableFastISel = Enable; } 202 bool getO0WantsFastISel() { return O0WantsFastISel; } 203 void setO0WantsFastISel(bool Enable) { O0WantsFastISel = Enable; } 204 void setGlobalISel(bool Enable) { Options.EnableGlobalISel = Enable; } 205 void setMachineOutliner(bool Enable) { 206 Options.EnableMachineOutliner = Enable; 207 } 208 void setSupportsDefaultOutlining(bool Enable) { 209 Options.SupportsDefaultOutlining = Enable; 210 } 211 212 bool shouldPrintMachineCode() const { return Options.PrintMachineCode; } 213 214 bool getUniqueSectionNames() const { return Options.UniqueSectionNames; } 215 216 /// Return true if data objects should be emitted into their own section, 217 /// corresponds to -fdata-sections. 218 bool getDataSections() const { 219 return Options.DataSections; 220 } 221 222 /// Return true if functions should be emitted into their own section, 223 /// corresponding to -ffunction-sections. 224 bool getFunctionSections() const { 225 return Options.FunctionSections; 226 } 227 228 /// Get a \c TargetIRAnalysis appropriate for the target. 229 /// 230 /// This is used to construct the new pass manager's target IR analysis pass, 231 /// set up appropriately for this target machine. Even the old pass manager 232 /// uses this to answer queries about the IR. 233 TargetIRAnalysis getTargetIRAnalysis(); 234 235 /// Return a TargetTransformInfo for a given function. 236 /// 237 /// The returned TargetTransformInfo is specialized to the subtarget 238 /// corresponding to \p F. 239 virtual TargetTransformInfo getTargetTransformInfo(const Function &F); 240 241 /// Allow the target to modify the pass manager, e.g. by calling 242 /// PassManagerBuilder::addExtension. 243 virtual void adjustPassManager(PassManagerBuilder &) {} 244 245 /// These enums are meant to be passed into addPassesToEmitFile to indicate 246 /// what type of file to emit, and returned by it to indicate what type of 247 /// file could actually be made. 248 enum CodeGenFileType { 249 CGFT_AssemblyFile, 250 CGFT_ObjectFile, 251 CGFT_Null // Do not emit any output. 252 }; 253 254 /// Add passes to the specified pass manager to get the specified file 255 /// emitted. Typically this will involve several steps of code generation. 256 /// This method should return true if emission of this file type is not 257 /// supported, or false on success. 258 /// \p MMI is an optional parameter that, if set to non-nullptr, 259 /// will be used to set the MachineModuloInfo for this PM. 260 virtual bool addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &, 261 raw_pwrite_stream *, CodeGenFileType, 262 bool /*DisableVerify*/ = true, 263 MachineModuleInfo *MMI = nullptr) { 264 return true; 265 } 266 267 /// Add passes to the specified pass manager to get machine code emitted with 268 /// the MCJIT. This method returns true if machine code is not supported. It 269 /// fills the MCContext Ctx pointer which can be used to build custom 270 /// MCStreamer. 271 /// 272 virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&, 273 raw_pwrite_stream &, 274 bool /*DisableVerify*/ = true) { 275 return true; 276 } 277 278 /// True if subtarget inserts the final scheduling pass on its own. 279 /// 280 /// Branch relaxation, which must happen after block placement, can 281 /// on some targets (e.g. SystemZ) expose additional post-RA 282 /// scheduling opportunities. 283 virtual bool targetSchedulesPostRAScheduling() const { return false; }; 284 285 void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV, 286 Mangler &Mang, bool MayAlwaysUsePrivate = false) const; 287 MCSymbol *getSymbol(const GlobalValue *GV) const; 288 289 /// True if the target uses physical regs at Prolog/Epilog insertion 290 /// time. If true (most machines), all vregs must be allocated before 291 /// PEI. If false (virtual-register machines), then callee-save register 292 /// spilling and scavenging are not needed or used. 293 virtual bool usesPhysRegsForPEI() const { return true; } 294 295 /// True if the target wants to use interprocedural register allocation by 296 /// default. The -enable-ipra flag can be used to override this. 297 virtual bool useIPRA() const { 298 return false; 299 } 300 }; 301 302 /// This class describes a target machine that is implemented with the LLVM 303 /// target-independent code generator. 304 /// 305 class LLVMTargetMachine : public TargetMachine { 306 protected: // Can only create subclasses. 307 LLVMTargetMachine(const Target &T, StringRef DataLayoutString, 308 const Triple &TT, StringRef CPU, StringRef FS, 309 const TargetOptions &Options, Reloc::Model RM, 310 CodeModel::Model CM, CodeGenOpt::Level OL); 311 312 void initAsmInfo(); 313 314 public: 315 /// Get a TargetTransformInfo implementation for the target. 316 /// 317 /// The TTI returned uses the common code generator to answer queries about 318 /// the IR. 319 TargetTransformInfo getTargetTransformInfo(const Function &F) override; 320 321 /// Create a pass configuration object to be used by addPassToEmitX methods 322 /// for generating a pipeline of CodeGen passes. 323 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); 324 325 /// Add passes to the specified pass manager to get the specified file 326 /// emitted. Typically this will involve several steps of code generation. 327 /// \p MMI is an optional parameter that, if set to non-nullptr, 328 /// will be used to set the MachineModuloInfofor this PM. 329 bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out, 330 raw_pwrite_stream *DwoOut, CodeGenFileType FileType, 331 bool DisableVerify = true, 332 MachineModuleInfo *MMI = nullptr) override; 333 334 /// Add passes to the specified pass manager to get machine code emitted with 335 /// the MCJIT. This method returns true if machine code is not supported. It 336 /// fills the MCContext Ctx pointer which can be used to build custom 337 /// MCStreamer. 338 bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx, 339 raw_pwrite_stream &Out, 340 bool DisableVerify = true) override; 341 342 /// Returns true if the target is expected to pass all machine verifier 343 /// checks. This is a stopgap measure to fix targets one by one. We will 344 /// remove this at some point and always enable the verifier when 345 /// EXPENSIVE_CHECKS is enabled. 346 virtual bool isMachineVerifierClean() const { return true; } 347 348 /// Adds an AsmPrinter pass to the pipeline that prints assembly or 349 /// machine code from the MI representation. 350 bool addAsmPrinter(PassManagerBase &PM, raw_pwrite_stream &Out, 351 raw_pwrite_stream *DwoOut, CodeGenFileType FileTYpe, 352 MCContext &Context); 353 }; 354 355 } // end namespace llvm 356 357 #endif // LLVM_TARGET_TARGETMACHINE_H 358
