Home | History | Annotate | Download | only in arch-omap5
      1 /* SPDX-License-Identifier: GPL-2.0+ */
      2 /*
      3  * (C) Copyright 2010
      4  * Texas Instruments, <www.ti.com>
      5  */
      6 
      7 #ifndef _SYS_PROTO_H_
      8 #define _SYS_PROTO_H_
      9 
     10 #include <asm/arch/omap.h>
     11 #include <asm/io.h>
     12 #include <asm/arch/clock.h>
     13 #include <asm/omap_common.h>
     14 #include <linux/mtd/omap_gpmc.h>
     15 #include <asm/arch/clock.h>
     16 #include <asm/ti-common/sys_proto.h>
     17 
     18 /*
     19  * Structure for Iodelay configuration registers.
     20  * Theoretical max for g_delay is 21560 ps.
     21  * Theoretical max for a_delay is 1/3rd of g_delay max.
     22  * So using u16 for both a/g_delay.
     23  */
     24 struct iodelay_cfg_entry {
     25 	u16 offset;
     26 	u16 a_delay;
     27 	u16 g_delay;
     28 };
     29 
     30 struct pad_conf_entry {
     31 	u32 offset;
     32 	u32 val;
     33 };
     34 
     35 struct mmc_platform_fixups {
     36 	const char *hw_rev;
     37 	u32 unsupported_caps;
     38 	u32 max_freq;
     39 };
     40 
     41 struct omap_sysinfo {
     42 	char *board_string;
     43 };
     44 extern const struct omap_sysinfo sysinfo;
     45 
     46 void gpmc_init(void);
     47 void watchdog_init(void);
     48 u32 get_device_type(void);
     49 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
     50 void do_set_mux32(u32 base, struct pad_conf_entry const *array, int size);
     51 void set_muxconf_regs(void);
     52 u32 wait_on_value(u32, u32, void *, u32);
     53 void sdelay(unsigned long);
     54 void setup_early_clocks(void);
     55 void prcm_init(void);
     56 void do_board_detect(void);
     57 void vcores_init(void);
     58 void bypass_dpll(u32 const base);
     59 void freq_update_core(void);
     60 u32 get_sys_clk_freq(void);
     61 u32 omap5_ddr_clk(void);
     62 void cancel_out(u32 *num, u32 *den, u32 den_limit);
     63 void sdram_init(void);
     64 u32 omap_sdram_size(void);
     65 u32 cortex_rev(void);
     66 void save_omap_boot_params(void);
     67 void init_omap_revision(void);
     68 void init_package_revision(void);
     69 void do_io_settings(void);
     70 void sri2c_init(void);
     71 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
     72 u32 warm_reset(void);
     73 void force_emif_self_refresh(void);
     74 void get_ioregs(const struct ctrl_ioregs **regs);
     75 void srcomp_enable(void);
     76 void setup_warmreset_time(void);
     77 const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr);
     78 
     79 static inline u32 div_round_up(u32 num, u32 den)
     80 {
     81 	return (num + den - 1)/den;
     82 }
     83 
     84 static inline u32 usec_to_32k(u32 usec)
     85 {
     86 	return div_round_up(32768 * usec, 1000000);
     87 }
     88 
     89 #define OMAP5_SERVICE_L2ACTLR_SET    0x104
     90 #define OMAP5_SERVICE_ACR_SET        0x107
     91 
     92 #endif
     93