1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2002-2010 4 * Wolfgang Denk, DENX Software Engineering, wd (at) denx.de. 5 */ 6 7 #ifndef __ASM_GBL_DATA_H 8 #define __ASM_GBL_DATA_H 9 10 #include "config.h" 11 #include "asm/types.h" 12 13 /* Architecture-specific global data */ 14 struct arch_global_data { 15 #if defined(CONFIG_FSL_ESDHC) 16 u32 sdhc_clk; 17 #if defined(CONFIG_FSL_ESDHC_ADAPTER_IDENT) 18 u8 sdhc_adapter; 19 #endif 20 #endif 21 #if defined(CONFIG_MPC8xx) 22 unsigned long brg_clk; 23 #endif 24 #if defined(CONFIG_CPM2) 25 /* There are many clocks on the MPC8260 - see page 9-5 */ 26 unsigned long vco_out; 27 unsigned long cpm_clk; 28 unsigned long scc_clk; 29 unsigned long brg_clk; 30 #endif 31 /* TODO: sjg (at) chromium.org: Should these be unslgned long? */ 32 #if defined(CONFIG_MPC83xx) 33 /* There are other clocks in the MPC83XX */ 34 u32 csb_clk; 35 # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 36 defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) 37 u32 tsec1_clk; 38 u32 tsec2_clk; 39 u32 usbdr_clk; 40 # elif defined(CONFIG_MPC8309) 41 u32 usbdr_clk; 42 # endif 43 # if defined(CONFIG_MPC834x) 44 u32 usbmph_clk; 45 # endif /* CONFIG_MPC834x */ 46 # if defined(CONFIG_MPC8315) 47 u32 tdm_clk; 48 # endif 49 u32 core_clk; 50 u32 enc_clk; 51 u32 lbiu_clk; 52 u32 lclk_clk; 53 # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 54 defined(CONFIG_MPC837x) 55 u32 pciexp1_clk; 56 u32 pciexp2_clk; 57 # endif 58 # if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) 59 u32 sata_clk; 60 # endif 61 # if defined(CONFIG_MPC8360) 62 u32 mem_sec_clk; 63 # endif /* CONFIG_MPC8360 */ 64 #endif 65 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 66 u32 lbc_clk; 67 void *cpu; 68 #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ 69 #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \ 70 defined(CONFIG_MPC86xx) 71 u32 i2c1_clk; 72 u32 i2c2_clk; 73 #endif 74 #if defined(CONFIG_QE) 75 u32 qe_clk; 76 u32 brg_clk; 77 uint mp_alloc_base; 78 uint mp_alloc_top; 79 #endif /* CONFIG_QE */ 80 #if defined(CONFIG_FSL_LAW) 81 u32 used_laws; 82 #endif 83 #if defined(CONFIG_E500) 84 u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32]; 85 #endif 86 unsigned long reset_status; /* reset status register at boot */ 87 #if defined(CONFIG_MPC83xx) 88 unsigned long arbiter_event_attributes; 89 unsigned long arbiter_event_address; 90 #endif 91 #if defined(CONFIG_CPM2) 92 unsigned int dp_alloc_base; 93 unsigned int dp_alloc_top; 94 #endif 95 #ifdef CONFIG_SYS_FPGA_COUNT 96 unsigned fpga_state[CONFIG_SYS_FPGA_COUNT]; 97 #endif 98 #if defined(CONFIG_WD_MAX_RATE) 99 unsigned long long wdt_last; /* trace watch-dog triggering rate */ 100 #endif 101 #if defined(CONFIG_LWMON5) 102 unsigned long kbd_status; 103 #endif 104 }; 105 106 #include <asm-generic/global_data.h> 107 108 #if 1 109 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") 110 #else /* We could use plain global data, but the resulting code is bigger */ 111 #define XTRN_DECLARE_GLOBAL_DATA_PTR extern 112 #define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \ 113 gd_t *gd 114 #endif 115 116 #endif /* __ASM_GBL_DATA_H */ 117
