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      1 /*
      2  * Copyright 2008 Corbin Simpson <MostAwesomeDude (at) gmail.com>
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the "Software"),
      6  * to deal in the Software without restriction, including without limitation
      7  * on the rights to use, copy, modify, merge, publish, distribute, sub
      8  * license, and/or sell copies of the Software, and to permit persons to whom
      9  * the Software is furnished to do so, subject to the following conditions:
     10  *
     11  * The above copyright notice and this permission notice (including the next
     12  * paragraph) shall be included in all copies or substantial portions of the
     13  * Software.
     14  *
     15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
     18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
     19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
     20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
     21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
     22 
     23 #ifndef R300_CONTEXT_H
     24 #define R300_CONTEXT_H
     25 
     26 #define R300_BUFFER_ALIGNMENT 64
     27 
     28 #include "draw/draw_vertex.h"
     29 
     30 #include "util/u_blitter.h"
     31 
     32 #include "pipe/p_context.h"
     33 #include "util/u_inlines.h"
     34 #include "util/u_transfer.h"
     35 
     36 #include "r300_defines.h"
     37 #include "r300_screen.h"
     38 #include "compiler/radeon_regalloc.h"
     39 
     40 struct u_upload_mgr;
     41 struct r300_context;
     42 struct r300_fragment_shader;
     43 struct r300_vertex_shader;
     44 struct r300_stencilref_context;
     45 
     46 enum colormask_swizzle {
     47     COLORMASK_BGRA,
     48     COLORMASK_RGBA,
     49     COLORMASK_RRRR,
     50     COLORMASK_AAAA,
     51     COLORMASK_GRRG,
     52     COLORMASK_ARRA,
     53     COLORMASK_BGRX,
     54     COLORMASK_RGBX,
     55     COLORMASK_NUM_SWIZZLES
     56 };
     57 
     58 struct r300_atom {
     59     /* Name, for debugging. */
     60     const char* name;
     61     /* Opaque state. */
     62     void* state;
     63     /* Emit the state to the context. */
     64     void (*emit)(struct r300_context*, unsigned, void*);
     65     /* Upper bound on number of dwords to emit. */
     66     unsigned size;
     67     /* Whether this atom should be emitted. */
     68     boolean dirty;
     69     /* Whether this atom may be emitted with state == NULL. */
     70     boolean allow_null_state;
     71 };
     72 
     73 struct r300_aa_state {
     74     struct r300_surface *dest;
     75 
     76     uint32_t aa_config;
     77 };
     78 
     79 struct r300_blend_state {
     80     struct pipe_blend_state state;
     81 
     82     uint32_t cb_clamp[COLORMASK_NUM_SWIZZLES][8];
     83     uint32_t cb_noclamp[8];
     84     uint32_t cb_noclamp_noalpha[8];
     85     uint32_t cb_no_readwrite[8];
     86 };
     87 
     88 struct r300_blend_color_state {
     89     struct pipe_blend_color state;
     90     uint32_t cb[3];
     91 };
     92 
     93 struct r300_clip_state {
     94     uint32_t cb[29];
     95 };
     96 
     97 struct r300_dsa_state {
     98     struct pipe_depth_stencil_alpha_state dsa;
     99 
    100     /* This is actually a command buffer with named dwords. */
    101     uint32_t cb_begin;
    102     uint32_t z_buffer_control;  /* R300_ZB_CNTL: 0x4f00 */
    103     uint32_t z_stencil_control; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */
    104     uint32_t stencil_ref_mask;  /* R300_ZB_STENCILREFMASK: 0x4f08 */
    105     uint32_t cb_reg;
    106     uint32_t stencil_ref_bf;    /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
    107     uint32_t cb_reg1;
    108     uint32_t alpha_value;       /* R500_FG_ALPHA_VALUE: 0x4be0 */
    109 
    110     /* Same, but without ZB reads and writes. */
    111     uint32_t cb_zb_no_readwrite[8]; /* ZB not bound */
    112 
    113     /* Emitted separately: */
    114     uint32_t alpha_function;
    115 
    116     /* Whether a two-sided stencil is enabled. */
    117     boolean two_sided;
    118     /* Whether a fallback should be used for a two-sided stencil ref value. */
    119     boolean two_sided_stencil_ref;
    120 };
    121 
    122 struct r300_hyperz_state {
    123     int flush;
    124     /* This is actually a command buffer with named dwords. */
    125     uint32_t cb_flush_begin;
    126     uint32_t zb_zcache_ctlstat;     /* R300_ZB_CACHE_CNTL */
    127     uint32_t cb_begin;
    128     uint32_t zb_bw_cntl;            /* R300_ZB_BW_CNTL */
    129     uint32_t cb_reg1;
    130     uint32_t zb_depthclearvalue;    /* R300_ZB_DEPTHCLEARVALUE */
    131     uint32_t cb_reg2;
    132     uint32_t sc_hyperz;             /* R300_SC_HYPERZ */
    133     uint32_t cb_reg3;
    134     uint32_t gb_z_peq_config;       /* R300_GB_Z_PEQ_CONFIG: 0x4028 */
    135 };
    136 
    137 struct r300_gpu_flush {
    138     uint32_t cb_flush_clean[6];
    139 };
    140 
    141 #define RS_STATE_MAIN_SIZE 27
    142 
    143 struct r300_rs_state {
    144     /* Original rasterizer state. */
    145     struct pipe_rasterizer_state rs;
    146     /* Draw-specific rasterizer state. */
    147     struct pipe_rasterizer_state rs_draw;
    148 
    149     /* Command buffers. */
    150     uint32_t cb_main[RS_STATE_MAIN_SIZE];
    151     uint32_t cb_poly_offset_zb16[5];
    152     uint32_t cb_poly_offset_zb24[5];
    153 
    154     /* The index to cb_main where the cull_mode register value resides. */
    155     unsigned cull_mode_index;
    156 
    157     /* Whether polygon offset is enabled. */
    158     boolean polygon_offset_enable;
    159 
    160     /* This is emitted in the draw function. */
    161     uint32_t color_control;         /* R300_GA_COLOR_CONTROL: 0x4278 */
    162 };
    163 
    164 struct r300_rs_block {
    165     uint32_t vap_vtx_state_cntl;  /* R300_VAP_VTX_STATE_CNTL: 0x2180 */
    166     uint32_t vap_vsm_vtx_assm;    /* R300_VAP_VSM_VTX_ASSM: 0x2184 */
    167     uint32_t vap_out_vtx_fmt[2];  /* R300_VAP_OUTPUT_VTX_FMT_[0-1]: 0x2090 */
    168     uint32_t gb_enable;
    169 
    170     uint32_t ip[8]; /* R300_RS_IP_[0-7], R500_RS_IP_[0-7] */
    171     uint32_t count; /* R300_RS_COUNT */
    172     uint32_t inst_count; /* R300_RS_INST_COUNT */
    173     uint32_t inst[8]; /* R300_RS_INST_[0-7] */
    174 };
    175 
    176 struct r300_sampler_state {
    177     struct pipe_sampler_state state;
    178 
    179     uint32_t filter0;      /* R300_TX_FILTER0: 0x4400 */
    180     uint32_t filter1;      /* R300_TX_FILTER1: 0x4440 */
    181 
    182     /* Min/max LOD must be clamped to [0, last_level], thus
    183      * it's dependent on a currently bound texture */
    184     unsigned min_lod, max_lod;
    185 };
    186 
    187 struct r300_texture_format_state {
    188     uint32_t format0; /* R300_TX_FORMAT0: 0x4480 */
    189     uint32_t format1; /* R300_TX_FORMAT1: 0x44c0 */
    190     uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */
    191     uint32_t tile_config; /* R300_TX_OFFSET (subset thereof) */
    192     uint32_t us_format0;   /* R500_US_FORMAT0_0: 0x4640 (through 15) */
    193 };
    194 
    195 struct r300_sampler_view {
    196     struct pipe_sampler_view base;
    197 
    198     /* For resource_copy_region. */
    199     unsigned width0_override;
    200     unsigned height0_override;
    201 
    202     /* Swizzles in the PIPE_SWIZZLE_* representation,
    203      * derived from base. */
    204     unsigned char swizzle[4];
    205 
    206     /* Copy of r300_texture::texture_format_state with format-specific bits
    207      * added. */
    208     struct r300_texture_format_state format;
    209 
    210     /* The texture cache region for this texture. */
    211     uint32_t texcache_region;
    212 };
    213 
    214 struct r300_texture_sampler_state {
    215     struct r300_texture_format_state format;
    216     uint32_t filter0;      /* R300_TX_FILTER0: 0x4400 */
    217     uint32_t filter1;      /* R300_TX_FILTER1: 0x4440 */
    218     uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */
    219 };
    220 
    221 struct r300_textures_state {
    222     /* Textures. */
    223     struct r300_sampler_view *sampler_views[16];
    224     int sampler_view_count;
    225     /* Sampler states. */
    226     struct r300_sampler_state *sampler_states[16];
    227     int sampler_state_count;
    228 
    229     /* This is the merge of the texture and sampler states. */
    230     unsigned count;
    231     uint32_t tx_enable;         /* R300_TX_ENABLE: 0x4101 */
    232     struct r300_texture_sampler_state regs[16];
    233 };
    234 
    235 struct r300_vertex_stream_state {
    236     /* R300_VAP_PROG_STREAK_CNTL_[0-7] */
    237     uint32_t vap_prog_stream_cntl[8];
    238     /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */
    239     uint32_t vap_prog_stream_cntl_ext[8];
    240 
    241     unsigned count;
    242 };
    243 
    244 struct r300_invariant_state {
    245     uint32_t cb[24];
    246 };
    247 
    248 struct r300_vap_invariant_state {
    249     uint32_t cb[11];
    250 };
    251 
    252 struct r300_viewport_state {
    253     float xscale;         /* R300_VAP_VPORT_XSCALE:  0x2098 */
    254     float xoffset;        /* R300_VAP_VPORT_XOFFSET: 0x209c */
    255     float yscale;         /* R300_VAP_VPORT_YSCALE:  0x20a0 */
    256     float yoffset;        /* R300_VAP_VPORT_YOFFSET: 0x20a4 */
    257     float zscale;         /* R300_VAP_VPORT_ZSCALE:  0x20a8 */
    258     float zoffset;        /* R300_VAP_VPORT_ZOFFSET: 0x20ac */
    259     uint32_t vte_control; /* R300_VAP_VTE_CNTL:      0x20b0 */
    260 };
    261 
    262 struct r300_ztop_state {
    263     uint32_t z_buffer_top;      /* R300_ZB_ZTOP: 0x4f14 */
    264 };
    265 
    266 /* The next several objects are not pure Radeon state; they inherit from
    267  * various Gallium classes. */
    268 
    269 struct r300_constant_buffer {
    270     /* Buffer of constants */
    271     uint32_t *ptr;
    272     /* Remapping table. */
    273     unsigned *remap_table;
    274     /* const buffer base */
    275     uint32_t buffer_base;
    276 };
    277 
    278 /* Query object.
    279  *
    280  * This is not a subclass of pipe_query because pipe_query is never
    281  * actually fully defined. So, rather than have it as a member, and do
    282  * subclass-style casting, we treat pipe_query as an opaque, and just
    283  * trust that our state tracker does not ever mess up query objects.
    284  */
    285 struct r300_query {
    286     /* The kind of query. Currently only OQ is supported. */
    287     unsigned type;
    288     /* The number of pipes where query results are stored. */
    289     unsigned num_pipes;
    290     /* How many results have been written, in dwords. It's incremented
    291      * after end_query and flush. */
    292     unsigned num_results;
    293     /* if begin has been emitted */
    294     boolean begin_emitted;
    295 
    296     /* The buffer where query results are stored. */
    297     struct pb_buffer *buf;
    298 };
    299 
    300 struct r300_surface {
    301     struct pipe_surface base;
    302 
    303     /* Winsys buffer backing the texture. */
    304     struct pb_buffer *buf;
    305 
    306     enum radeon_bo_domain domain;
    307 
    308     uint32_t offset;    /* COLOROFFSET or DEPTHOFFSET. */
    309     uint32_t pitch;     /* COLORPITCH or DEPTHPITCH. */
    310     uint32_t pitch_zmask; /* ZMASK_PITCH */
    311     uint32_t pitch_hiz;   /* HIZ_PITCH */
    312     uint32_t pitch_cmask; /* CMASK_PITCH */
    313     uint32_t format;    /* US_OUT_FMT or ZB_FORMAT. */
    314 
    315     /* Parameters dedicated to the CBZB clear. */
    316     uint32_t cbzb_width;            /* Aligned width. */
    317     uint32_t cbzb_height;           /* Half of the height. */
    318     uint32_t cbzb_midpoint_offset;  /* DEPTHOFFSET. */
    319     uint32_t cbzb_pitch;            /* DEPTHPITCH. */
    320     uint32_t cbzb_format;           /* ZB_FORMAT. */
    321 
    322     /* Whether the CBZB clear is allowed on the surface. */
    323     boolean cbzb_allowed;
    324 
    325     unsigned colormask_swizzle;
    326 };
    327 
    328 struct r300_texture_desc {
    329     /* Width, height, and depth.
    330      * Most of the time, these are equal to pipe_texture::width0, height0,
    331      * and depth0. However, NPOT 3D textures must have dimensions aligned
    332      * to POT, and this is the only case when these variables differ from
    333      * pipe_texture. */
    334     unsigned width0, height0, depth0;
    335 
    336     /* Buffer tiling.
    337      * Macrotiling is specified per-level because small mipmaps cannot
    338      * be macrotiled. */
    339     enum radeon_bo_layout microtile;
    340     enum radeon_bo_layout macrotile[R300_MAX_TEXTURE_LEVELS];
    341 
    342     /* Offsets into the buffer. */
    343     unsigned offset_in_bytes[R300_MAX_TEXTURE_LEVELS];
    344 
    345     /* Strides for each mip-level. */
    346     unsigned stride_in_bytes[R300_MAX_TEXTURE_LEVELS];
    347 
    348     /* Size of one zslice or face or 2D image based on the texture target. */
    349     unsigned layer_size_in_bytes[R300_MAX_TEXTURE_LEVELS];
    350 
    351     /* Total size of this texture, in bytes,
    352      * derived from the texture properties. */
    353     unsigned size_in_bytes;
    354 
    355     /**
    356      * If non-zero, override the natural texture layout with
    357      * a custom stride (in bytes).
    358      *
    359      * \note Mipmapping fails for textures with a non-natural layout!
    360      *
    361      * \sa r300_texture_get_stride
    362      */
    363     unsigned stride_in_bytes_override;
    364 
    365     /* Whether this texture has non-power-of-two dimensions.
    366      * It can be either a regular texture or a rectangle one. */
    367     boolean is_npot;
    368 
    369     /* This flag says that hardware must use the stride for addressing
    370      * instead of the width. */
    371     boolean uses_stride_addressing;
    372 
    373     /* Whether CBZB fast color clear is allowed on the miplevel. */
    374     boolean cbzb_allowed[R300_MAX_TEXTURE_LEVELS];
    375 
    376     /* Zbuffer compression info for each miplevel. */
    377     boolean zcomp8x8[R300_MAX_TEXTURE_LEVELS];
    378     /* If zero, then disable Z compression/HiZ. */
    379     unsigned zmask_dwords[R300_MAX_TEXTURE_LEVELS];
    380     unsigned hiz_dwords[R300_MAX_TEXTURE_LEVELS];
    381     /* Zmask/HiZ strides for each miplevel. */
    382     unsigned zmask_stride_in_pixels[R300_MAX_TEXTURE_LEVELS];
    383     unsigned hiz_stride_in_pixels[R300_MAX_TEXTURE_LEVELS];
    384 
    385     /* CMASK info for AA buffers (no mipmapping). */
    386     unsigned cmask_dwords;
    387     unsigned cmask_stride_in_pixels;
    388 };
    389 
    390 struct r300_resource
    391 {
    392     struct u_resource b;
    393 
    394     /* Winsys buffer backing this resource. */
    395     struct pb_buffer *buf;
    396     enum radeon_bo_domain domain;
    397 
    398     /* Constant buffers and SWTCL vertex and index buffers are in user
    399      * memory. */
    400     uint8_t *malloced_buffer;
    401 
    402     /* Texture description (addressing, layout, special features). */
    403     struct r300_texture_desc tex;
    404 
    405     /* This is the level tiling flags were last time set for.
    406      * It's used to prevent redundant tiling-flags changes from happening.*/
    407     unsigned surface_level;
    408 };
    409 
    410 struct r300_vertex_element_state {
    411     unsigned count;
    412     struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
    413     unsigned format_size[PIPE_MAX_ATTRIBS];
    414 
    415     /* The size of the vertex, in dwords. */
    416     unsigned vertex_size_dwords;
    417 
    418     struct r300_vertex_stream_state vertex_stream;
    419 };
    420 
    421 enum r300_hiz_func {
    422     HIZ_FUNC_NONE,
    423 
    424     /* The function, when determined, is set in stone
    425      * until the next HiZ clear. */
    426 
    427     /* MAX is written to the HiZ buffer.
    428      * Used for LESS, LEQUAL. */
    429     HIZ_FUNC_MAX,
    430 
    431     /* MIN is written to the HiZ buffer.
    432      * Used for GREATER, GEQUAL. */
    433     HIZ_FUNC_MIN,
    434 };
    435 
    436 /* For deferred fragment shader state validation. */
    437 enum r300_fs_validity_status {
    438     FRAGMENT_SHADER_VALID,      /* No need to change/validate the FS. */
    439     FRAGMENT_SHADER_MAYBE_DIRTY,/* Validate the FS if external state was changed. */
    440     FRAGMENT_SHADER_DIRTY       /* Always validate the FS (if the FS was changed) */
    441 };
    442 
    443 struct r300_context {
    444     /* Parent class */
    445     struct pipe_context context;
    446 
    447     /* The interface to the windowing system, etc. */
    448     struct radeon_winsys *rws;
    449     /* The submission context. */
    450     struct radeon_winsys_ctx *ctx;
    451     /* The command stream. */
    452     struct radeon_winsys_cs *cs;
    453     /* Screen. */
    454     struct r300_screen *screen;
    455 
    456     /* Draw module. Used mostly for SW TCL. */
    457     struct draw_context* draw;
    458     /* Vertex buffer for SW TCL. */
    459     struct pb_buffer *vbo;
    460     /* Offset and size into the SW TCL VBO. */
    461     size_t draw_vbo_offset;
    462 
    463     /* Accelerated blit support. */
    464     struct blitter_context* blitter;
    465     /* Stencil two-sided reference value fallback. */
    466     struct r300_stencilref_context *stencilref_fallback;
    467 
    468     /* The KIL opcode needs the first texture unit to be enabled
    469      * on r3xx-r4xx. In order to calm down the CS checker, we bind this
    470      * dummy texture there. */
    471     struct r300_sampler_view *texkill_sampler;
    472 
    473     /* When no vertex buffer is set, this one is used instead to prevent
    474      * hardlocks. */
    475     struct pipe_vertex_buffer dummy_vb;
    476 
    477     /* The currently active query. */
    478     struct r300_query *query_current;
    479     /* The saved query for blitter operations. */
    480     struct r300_query *blitter_saved_query;
    481     /* Query list. */
    482     struct r300_query query_list;
    483 
    484     /* Various CSO state objects. */
    485 
    486     /* Each atom is emitted in the order it appears here, which can affect
    487      * performance and stability if not handled with care. */
    488     /* GPU flush. */
    489     struct r300_atom gpu_flush;
    490     /* Clears must be emitted immediately after the flush. */
    491     /* HiZ clear */
    492     struct r300_atom hiz_clear;
    493     /* zmask clear */
    494     struct r300_atom zmask_clear;
    495     /* cmask clear */
    496     struct r300_atom cmask_clear;
    497     /* Anti-aliasing (MSAA) state. */
    498     struct r300_atom aa_state;
    499     /* Framebuffer state. */
    500     struct r300_atom fb_state;
    501     /* HyperZ state (various SC/ZB bits). */
    502     struct r300_atom hyperz_state;
    503     /* ZTOP state. */
    504     struct r300_atom ztop_state;
    505     /* Depth, stencil, and alpha state. */
    506     struct r300_atom dsa_state;
    507     /* Blend state. */
    508     struct r300_atom blend_state;
    509     /* Blend color state. */
    510     struct r300_atom blend_color_state;
    511     /* Scissor state. */
    512     struct r300_atom scissor_state;
    513     /* Sample mask. */
    514     struct r300_atom sample_mask;
    515     /* Invariant state. This must be emitted to get the engine started. */
    516     struct r300_atom invariant_state;
    517     /* Viewport state. */
    518     struct r300_atom viewport_state;
    519     /* PVS flush. */
    520     struct r300_atom pvs_flush;
    521     /* VAP invariant state. */
    522     struct r300_atom vap_invariant_state;
    523     /* Vertex stream formatting state. */
    524     struct r300_atom vertex_stream_state;
    525     /* Vertex shader. */
    526     struct r300_atom vs_state;
    527     /* User clip planes. */
    528     struct r300_atom clip_state;
    529     /* RS block state + VAP (vertex shader) output mapping state. */
    530     struct r300_atom rs_block_state;
    531     /* Rasterizer state. */
    532     struct r300_atom rs_state;
    533     /* Framebuffer state (pipelined regs). */
    534     struct r300_atom fb_state_pipelined;
    535     /* Fragment shader. */
    536     struct r300_atom fs;
    537     /* Fragment shader RC_CONSTANT_STATE variables. */
    538     struct r300_atom fs_rc_constant_state;
    539     /* Fragment shader constant buffer. */
    540     struct r300_atom fs_constants;
    541     /* Vertex shader constant buffer. */
    542     struct r300_atom vs_constants;
    543     /* Texture cache invalidate. */
    544     struct r300_atom texture_cache_inval;
    545     /* Textures state. */
    546     struct r300_atom textures_state;
    547     /* Occlusion query. */
    548     struct r300_atom query_start;
    549 
    550     /* The pointers to the first and the last atom. */
    551     struct r300_atom *first_dirty, *last_dirty;
    552 
    553     /* Vertex elements for Gallium. */
    554     struct r300_vertex_element_state *velems;
    555 
    556     /* Vertex info for Draw. */
    557     struct vertex_info vertex_info;
    558 
    559     struct pipe_stencil_ref stencil_ref;
    560     struct pipe_viewport_state viewport;
    561 
    562     /* Stream locations for SWTCL. */
    563     int stream_loc_notcl[16];
    564 
    565     /* Flag indicating whether or not the HW is dirty. */
    566     uint32_t dirty_hw;
    567     /* Whether polygon offset is enabled. */
    568     boolean polygon_offset_enabled;
    569     /* Z buffer bit depth. */
    570     uint32_t zbuffer_bpp;
    571     /* Whether rendering is conditional and should be skipped. */
    572     boolean skip_rendering;
    573     /* The flag above saved by blitter. */
    574     unsigned char blitter_saved_skip_rendering;
    575     /* Point sprites texcoord index,  1 bit per texcoord */
    576     int sprite_coord_enable;
    577     /* Whether two-sided color selection is enabled (AKA light_twoside). */
    578     boolean two_sided_color;
    579     boolean flatshade;
    580     boolean clip_halfz;
    581     /* Whether fast color clear is enabled. */
    582     boolean cbzb_clear;
    583     /* Whether fragment shader needs to be validated. */
    584     enum r300_fs_validity_status fs_status;
    585     /* Framebuffer multi-write. */
    586     boolean fb_multiwrite;
    587     unsigned num_samples;
    588     boolean msaa_enable;
    589     boolean alpha_to_one;
    590     boolean alpha_to_coverage;
    591 
    592     void *dsa_decompress_zmask;
    593 
    594     struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
    595     unsigned nr_vertex_buffers;
    596     struct u_upload_mgr *uploader;
    597 
    598     struct slab_child_pool pool_transfers;
    599 
    600     /* Stat counter. */
    601     uint64_t flush_counter;
    602 
    603     /* const tracking for VS */
    604     int vs_const_base;
    605 
    606     /* Vertex array state info */
    607     boolean vertex_arrays_dirty;
    608     boolean vertex_arrays_indexed;
    609     int vertex_arrays_offset;
    610     int vertex_arrays_instance_id;
    611     boolean instancing_enabled;
    612 
    613     /* Hyper-Z stats. */
    614     boolean hyperz_enabled;     /* Whether it owns Hyper-Z access. */
    615     int64_t hyperz_time_of_last_flush; /* Time of the last flush with Z clear. */
    616     unsigned num_z_clears;      /* Since the last flush. */
    617 
    618     /* ZMask state. */
    619     boolean zmask_in_use;       /* Whether ZMASK is enabled. */
    620     boolean zmask_decompress;   /* Whether ZMASK is being decompressed. */
    621     struct pipe_surface *locked_zbuffer; /* Unbound zbuffer which still has data in ZMASK. */
    622 
    623     /* HiZ state. */
    624     boolean hiz_in_use;         /* Whether HIZ is enabled. */
    625     enum r300_hiz_func hiz_func; /* HiZ function. Can be either MIN or MAX. */
    626     uint32_t hiz_clear_value;   /* HiZ clear value. */
    627 
    628     /* CMASK state. */
    629     boolean cmask_access;
    630     boolean cmask_in_use;
    631     uint32_t color_clear_value; /* RGBA8 or RGBA1010102 */
    632     uint32_t color_clear_value_ar; /* RGBA16F */
    633     uint32_t color_clear_value_gb; /* RGBA16F */
    634 
    635     /* Compiler state. */
    636     struct rc_regalloc_state fs_regalloc_state; /* Register allocator info for
    637                                                  * fragment shaders. */
    638 };
    639 
    640 #define foreach_atom(r300, atom) \
    641     for (atom = &r300->gpu_flush; atom != (&r300->query_start)+1; atom++)
    642 
    643 #define foreach_dirty_atom(r300, atom) \
    644     for (atom = r300->first_dirty; atom != r300->last_dirty; atom++)
    645 
    646 /* Convenience cast wrappers. */
    647 static inline struct r300_query* r300_query(struct pipe_query* q)
    648 {
    649     return (struct r300_query*)q;
    650 }
    651 
    652 static inline struct r300_surface* r300_surface(struct pipe_surface* surf)
    653 {
    654     return (struct r300_surface*)surf;
    655 }
    656 
    657 static inline struct r300_resource* r300_resource(struct pipe_resource* tex)
    658 {
    659     return (struct r300_resource*)tex;
    660 }
    661 
    662 static inline struct r300_context* r300_context(struct pipe_context* context)
    663 {
    664     return (struct r300_context*)context;
    665 }
    666 
    667 static inline struct r300_fragment_shader *r300_fs(struct r300_context *r300)
    668 {
    669     return (struct r300_fragment_shader*)r300->fs.state;
    670 }
    671 
    672 static inline void r300_mark_atom_dirty(struct r300_context *r300,
    673                                         struct r300_atom *atom)
    674 {
    675     atom->dirty = TRUE;
    676 
    677     if (!r300->first_dirty) {
    678         r300->first_dirty = atom;
    679         r300->last_dirty = atom+1;
    680     } else {
    681         if (atom < r300->first_dirty)
    682             r300->first_dirty = atom;
    683         else if (atom+1 > r300->last_dirty)
    684             r300->last_dirty = atom+1;
    685     }
    686 }
    687 
    688 static inline struct pipe_surface *
    689 r300_get_nonnull_cb(struct pipe_framebuffer_state *fb, unsigned i)
    690 {
    691     if (fb->cbufs[i])
    692         return fb->cbufs[i];
    693 
    694     /* The i-th framebuffer is NULL, return any non-NULL one. */
    695     for (i = 0; i < fb->nr_cbufs; i++)
    696         if (fb->cbufs[i])
    697             return fb->cbufs[i];
    698 
    699     return NULL;
    700 }
    701 
    702 struct pipe_context* r300_create_context(struct pipe_screen* screen,
    703                                          void *priv, unsigned flags);
    704 
    705 /* Context initialization. */
    706 struct draw_stage* r300_draw_stage(struct r300_context* r300);
    707 void r300_init_blit_functions(struct r300_context *r300);
    708 void r300_init_flush_functions(struct r300_context* r300);
    709 void r300_init_query_functions(struct r300_context* r300);
    710 void r300_init_render_functions(struct r300_context *r300);
    711 void r300_init_state_functions(struct r300_context* r300);
    712 void r300_init_resource_functions(struct r300_context* r300);
    713 
    714 /* r300_blit.c */
    715 void r300_decompress_zmask(struct r300_context *r300);
    716 void r300_decompress_zmask_locked_unsafe(struct r300_context *r300);
    717 void r300_decompress_zmask_locked(struct r300_context *r300);
    718 bool r300_is_blit_supported(enum pipe_format format);
    719 
    720 /* r300_flush.c */
    721 void r300_flush(struct pipe_context *pipe,
    722                 unsigned flags,
    723                 struct pipe_fence_handle **fence);
    724 
    725 /* r300_hyperz.c */
    726 void r300_update_hyperz_state(struct r300_context* r300);
    727 
    728 /* r300_query.c */
    729 void r300_resume_query(struct r300_context *r300,
    730                        struct r300_query *query);
    731 void r300_stop_query(struct r300_context *r300);
    732 
    733 /* r300_render_translate.c */
    734 void r300_translate_index_buffer(struct r300_context *r300,
    735                                  const struct pipe_draw_info *info,
    736                                  struct pipe_resource **out_index_buffer,
    737                                  unsigned *index_size, unsigned index_offset,
    738                                  unsigned *start, unsigned count);
    739 
    740 /* r300_render_stencilref.c */
    741 void r300_plug_in_stencil_ref_fallback(struct r300_context *r300);
    742 
    743 /* r300_render.c */
    744 void r500_emit_index_bias(struct r300_context *r300, int index_bias);
    745 void r300_blitter_draw_rectangle(struct blitter_context *blitter,
    746                                  void *vertex_elements_cso,
    747                                  blitter_get_vs_func get_vs,
    748                                  int x1, int y1, int x2, int y2,
    749                                  float depth, unsigned num_instances,
    750                                  enum blitter_attrib_type type,
    751                                  const union blitter_attrib *attrib);
    752 
    753 /* r300_state.c */
    754 enum r300_fb_state_change {
    755     R300_CHANGED_FB_STATE = 0,
    756     R300_CHANGED_HYPERZ_FLAG,
    757     R300_CHANGED_MULTIWRITE,
    758     R300_CHANGED_CMASK_ENABLE,
    759 };
    760 
    761 void r300_mark_fb_state_dirty(struct r300_context *r300,
    762                               enum r300_fb_state_change change);
    763 void r300_mark_fs_code_dirty(struct r300_context *r300);
    764 
    765 struct pipe_sampler_view *
    766 r300_create_sampler_view_custom(struct pipe_context *pipe,
    767                          struct pipe_resource *texture,
    768                          const struct pipe_sampler_view *templ,
    769                          unsigned width0_override,
    770                          unsigned height0_override);
    771 
    772 /* r300_state_derived.c */
    773 void r300_update_derived_state(struct r300_context* r300);
    774 
    775 /* r300_debug.c */
    776 void r500_dump_rs_block(struct r300_rs_block *rs);
    777 
    778 
    779 static inline boolean CTX_DBG_ON(struct r300_context * ctx, unsigned flags)
    780 {
    781     return SCREEN_DBG_ON(ctx->screen, flags);
    782 }
    783 
    784 static inline void CTX_DBG(struct r300_context * ctx, unsigned flags,
    785                        const char * fmt, ...)
    786 {
    787     if (CTX_DBG_ON(ctx, flags)) {
    788         va_list va;
    789         va_start(va, fmt);
    790         vfprintf(stderr, fmt, va);
    791         va_end(va);
    792     }
    793 }
    794 
    795 #define DBG_ON  CTX_DBG_ON
    796 #define DBG     CTX_DBG
    797 
    798 #endif /* R300_CONTEXT_H */
    799