| /external/capstone/arch/X86/ |
| X86DisassemblerDecoder.c | 1957 int vvvv; local
[all...] |
| X86DisassemblerDecoder.h | 672 /* The VEX.vvvv field, which contains a third register operand for some AVX
674 Reg vvvv; member in struct:InternalInstruction
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.cpp | 1704 int vvvv; local
[all...] |
| X86DisassemblerDecoder.h | 600 // The VEX.vvvv field, which contains a third register operand for some AVX
602 Reg vvvv; member in struct:llvm::X86Disassembler::InternalInstruction
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.cpp | 1694 int vvvv; local
[all...] |
| X86DisassemblerDecoder.h | 596 // The VEX.vvvv field, which contains a third register operand for some AVX
598 Reg vvvv; member in struct:llvm::X86Disassembler::InternalInstruction
|
| /external/cldr/tools/java/org/unicode/cldr/util/ |
| TimezoneFormatter.java | 83 VVVV(Type.GENERIC, Location.LOCATION, Length.OTHER), vvvv(Type.GENERIC, Location.NON_LOCATION, Length.LONG), v(Type.GENERIC, Location.NON_LOCATION, enum constant in enum:TimezoneFormatter.Format
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 488 /* The VEX.vvvv field, which contains a third register operand for some AVX
490 Reg vvvv; member in struct:InternalInstruction
|
| /external/v8/src/ia32/ |
| disasm-ia32.cc | 737 int mod, regop, rm, vvvv = vex_vreg(); local
742 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
747 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
752 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
757 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
762 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
767 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
772 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
777 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
782 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
831 int mod, regop, rm, vvvv = vex_vreg(); local
894 int mod, regop, rm, vvvv = vex_vreg(); local
947 int mod, regop, rm, vvvv = vex_vreg(); local
1008 int mod, regop, rm, vvvv = vex_vreg(); local
1049 int mod, regop, rm, vvvv = vex_vreg(); local
1071 int mod, regop, rm, vvvv = vex_vreg(); local
1101 int mod, regop, rm, vvvv = vex_vreg(); local
1181 int mod, regop, rm, vvvv = vex_vreg(); local
[all...] |
| /external/swiftshader/src/Pipeline/ |
| SamplerCore.cpp | 95 Float4 vvvv = v; local
109 computeLod(texture, lod, anisotropy, uDelta, vDelta, uuuu, vvvv, bias.x, dsx, dsy, function);
114 cubeFace(face, uuuu, vvvv, u, v, w, M);
120 computeLod3D(texture, lod, uuuu, vvvv, wwww, bias.x, dsx, dsy, function);
125 c = sampleFilter(texture, uuuu, vvvv, wwww, offset, lod, anisotropy, uDelta, vDelta, face, function);
129 Vector4f cf = sampleFloatFilter(texture, uuuu, vvvv, wwww, qqqq, offset, lod, anisotropy, uDelta, vDelta, face, function);
259 Float4 vvvv = v; local
273 computeLod(texture, lod, anisotropy, uDelta, vDelta, uuuu, vvvv, bias.x, dsx, dsy, function);
278 cubeFace(face, uuuu, vvvv, u, v, w, M);
284 computeLod3D(texture, lod, uuuu, vvvv, wwww, bias.x, dsx, dsy, function)
663 Short4 vvvv = texelFetch ? Short4(As<Int4>(v)) : address(v, state.addressingModeV, mipmap); local
858 Short4 vvvv = texelFetch ? Short4(As<Int4>(v_)) : address(v_, state.addressingModeV, mipmap); local
[all...] |
| /external/swiftshader/src/Shader/ |
| SamplerCore.cpp | 95 Float4 vvvv = v; local
109 computeLod(texture, lod, anisotropy, uDelta, vDelta, uuuu, vvvv, bias.x, dsx, dsy, function);
114 cubeFace(face, uuuu, vvvv, u, v, w, M);
120 computeLod3D(texture, lod, uuuu, vvvv, wwww, bias.x, dsx, dsy, function);
125 c = sampleFilter(texture, uuuu, vvvv, wwww, offset, lod, anisotropy, uDelta, vDelta, face, function);
129 Vector4f cf = sampleFloatFilter(texture, uuuu, vvvv, wwww, qqqq, offset, lod, anisotropy, uDelta, vDelta, face, function);
304 Float4 vvvv = v; local
318 computeLod(texture, lod, anisotropy, uDelta, vDelta, uuuu, vvvv, bias.x, dsx, dsy, function);
323 cubeFace(face, uuuu, vvvv, u, v, w, M);
329 computeLod3D(texture, lod, uuuu, vvvv, wwww, bias.x, dsx, dsy, function)
754 Short4 vvvv = texelFetch ? Short4(As<Int4>(v)) : address(v, state.addressingModeV, mipmap); local
949 Short4 vvvv = texelFetch ? Short4(As<Int4>(v_)) : address(v_, state.addressingModeV, mipmap); local
[all...] |
| /external/v8/src/x64/ |
| disasm-x64.cc | 885 int mod, regop, rm, vvvv = vex_vreg(); local
890 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
895 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
900 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
905 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
910 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
915 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
920 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
925 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
930 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
970 int mod, regop, rm, vvvv = vex_vreg(); local
1016 int mod, regop, rm, vvvv = vex_vreg(); local
1088 int mod, regop, rm, vvvv = vex_vreg(); local
1174 int mod, regop, rm, vvvv = vex_vreg(); local
1218 int mod, regop, rm, vvvv = vex_vreg(); local
1241 int mod, regop, rm, vvvv = vex_vreg(); local
1282 int mod, regop, rm, vvvv = vex_vreg(); local
1335 int mod, regop, rm, vvvv = vex_vreg(); local
[all...] |
| /art/compiler/utils/x86/ |
| assembler_x86.cc | 111 // VEX.vvvv
113 XmmRegister vvvv = operand.AsXmmRegister(); local
114 int inverted_reg = 15-static_cast<int>(vvvv);
118 Register vvvv = operand.AsCpuRegister(); local
119 int inverted_reg = 15 - static_cast<int>(vvvv);
[all...] |
| /art/compiler/utils/x86_64/ |
| assembler_x86_64.cc | 117 // VEX.vvvv
119 XmmRegister vvvv = operand.AsXmmRegister(); local
120 int inverted_reg = 15-static_cast<int>(vvvv.AsFloatRegister());
124 CpuRegister vvvv = operand.AsCpuRegister(); local
125 int inverted_reg = 15 - static_cast<int>(vvvv.AsRegister());
[all...] |
