| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/ |
| zip1.s | 10 zip1 z0.b, z0.b, z0.b label
11 // CHECK-INST: zip1 z0.b, z0.b, z0.b
16 zip1 z0.h, z0.h, z0.h label
17 // CHECK-INST: zip1 z0.h, z0.h, z0.h
22 zip1 z0.s, z0.s, z0.s label
23 // CHECK-INST: zip1 z0.s, z0.s, z0.s
28 zip1 z0.d, z0.d, z0.d label
29 // CHECK-INST: zip1 z0.d, z0.d, z0.d
34 zip1 z31.b, z31.b, z31.b label
35 // CHECK-INST: zip1 z31.b, z31.b, z31.
40 zip1 z31.h, z31.h, z31.h label
46 zip1 z31.s, z31.s, z31.s label
52 zip1 z31.d, z31.d, z31.d label
58 zip1 p0.b, p0.b, p0.b label
64 zip1 p0.h, p0.h, p0.h label
70 zip1 p0.s, p0.s, p0.s label
76 zip1 p0.d, p0.d, p0.d label
82 zip1 p15.b, p15.b, p15.b label
88 zip1 p15.s, p15.s, p15.s label
94 zip1 p15.h, p15.h, p15.h label
100 zip1 p15.d, p15.d, p15.d label
[all...] |
| zip1-diagnostics.s | 4 zip1 z10.h, z22.h, z31.x label
6 // CHECK-NEXT: zip1 z10.h, z22.h, z31.x
10 zip1 z10.h, z3.h, z15.b label
12 // CHECK-NEXT: zip1 z10.h, z3.h, z15.b
16 zip1 z1.h, z2.h label
18 // CHECK-NEXT: zip1 z1.h, z2.h
22 zip1 z1.s, z2.s, z32.s label
24 // CHECK-NEXT: zip1 z1.s, z2.s, z32.s
28 zip1 p1.s, p2.s, p16.s label
30 // CHECK-NEXT: zip1 p1.s, p2.s, p16.
34 zip1 z1.s, z2.s, p3.s label
40 zip1 p1.s, p2.s, z3.s label
50 zip1 z31.d, z31.d, z31.d label
56 zip1 z31.d, z31.d, z31.d label
[all...] |
| /external/v8/src/arm64/ |
| simulator-logic-arm64.cc | 2857 LogicVRegister Simulator::zip1(VectorFormat vform, LogicVRegister dst, function in class:v8::internal::Simulator
[all...] |
| assembler-arm64.cc | 1948 void Assembler::zip1(const VRegister& vd, const VRegister& vn, function in class:v8::internal::Assembler
[all...] |
| /external/vixl/src/aarch64/ |
| logic-aarch64.cc | 3603 LogicVRegister Simulator::zip1(VectorFormat vform, function in class:vixl::aarch64::Simulator
[all...] |
