| /external/llvm/test/MC/Mips/mips32r2/ |
| invalid.s | 1 # Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| invalid.s | 1 # Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| invalid.s | 1 # Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| invalid.s | 1 # Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| invalid.s | 1 # Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| invalid.s | 1 # Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r2/ |
| invalid.s | 1 # Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r3/ |
| invalid.s | 1 # Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r5/ |
| invalid.s | 1 # Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r2/ |
| invalid.s | 1 # Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r3/ |
| invalid.s | 1 # Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r5/ |
| invalid.s | 1 # Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid.s | 1 # Instructions that are available for the current ISA but should be rejected by
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid.s | 1 # Instructions that are available for the current ISA but should be rejected by
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r6/ |
| invalid.s | 1 # Instructions that are available for the current ISA but should be rejected by
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/ |
| invalid.s | 1 # Instructions that are available for the current ISA but should be rejected by
|
| /art/test/etc/ |
| run-test-jar | 48 ISA=x86
379 ISA="x86_64"
721 ISA=
728 ISA=$(echo $ISA_adb_invocation | grep -Ewo "${ARCHITECTURES_PATTERN}")
729 if [ x"$ISA" != "x" ]; then
733 if [ x"$ISA" = "x" ]; then
783 mkdir_locations="${DEX_LOCATION}/dalvik-cache/$ISA"
849 mkdir_locations="${mkdir_locations} ${DEX_LOCATION}/oat/$ISA"
852 app_image="--base=0x4000 --app-image-file=$DEX_LOCATION/oat/$ISA/$TEST_NAME.art --resolve-startup-const-strings=true"
863 --oat-file=$DEX_LOCATION/oat/$ISA/$TEST_NAME.odex
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips2/ |
| invalid-mips32.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
46 c.eq.s $fcc1, $f2, $f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
47 c.f.s $fcc4, $f2, $f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
48 c.le.s $fcc6, $f2, $f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
49 c.lt.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
50 c.nge.s $fcc3, $f2, $f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
51 c.ngl.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
52 c.ngle.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
53 c.ngt.s $fcc5, $f8, $f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA leve
[all...] |
| invalid-mips32r2.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
14 c.eq.s $fcc1, $f2, $f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
15 c.f.s $fcc4, $f2, $f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
16 c.le.s $fcc6, $f2, $f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
17 c.lt.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
18 c.nge.s $fcc3, $f2, $f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
19 c.ngl.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
20 c.ngle.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
21 c.ngt.s $fcc5, $f8, $f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA leve
[all...] |
| invalid-mips5.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
74 c.eq.s $fcc1, $f2, $f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
75 c.f.s $fcc4, $f2, $f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
76 c.le.s $fcc6, $f2, $f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
77 c.lt.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
78 c.nge.s $fcc3, $f2, $f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
79 c.ngl.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
80 c.ngle.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
81 c.ngt.s $fcc5, $f8, $f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA leve
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips3/ |
| invalid-mips4.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
31 c.eq.s $fcc1, $f2, $f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
32 c.f.s $fcc4, $f2, $f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
33 c.le.s $fcc6, $f2, $f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
34 c.lt.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
35 c.nge.s $fcc3, $f2, $f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
36 c.ngl.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
37 c.ngle.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
38 c.ngt.s $fcc5, $f8, $f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA leve
[all...] |
| invalid-mips5.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
33 c.eq.s $fcc1, $f2, $f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
34 c.f.s $fcc4, $f2, $f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
35 c.le.s $fcc6, $f2, $f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
36 c.lt.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
37 c.nge.s $fcc3, $f2, $f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
38 c.ngl.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
39 c.ngle.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
40 c.ngt.s $fcc5, $f8, $f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA leve
[all...] |
| /external/libdivsufsort/lib/ |
| trsort.c | 264 tr_copy(saidx_t *ISA, const saidx_t *SA,
274 if((0 <= (s = *c - depth)) && (ISA[s] == v)) {
276 ISA[s] = d - SA;
280 if((0 <= (s = *c - depth)) && (ISA[s] == v)) {
282 ISA[s] = d - SA;
289 tr_partialcopy(saidx_t *ISA, const saidx_t *SA,
299 if((0 <= (s = *c - depth)) && (ISA[s] == v)) {
301 rank = ISA[s + depth];
303 ISA[s] = newrank;
309 rank = ISA[*e]
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips1/ |
| invalid-mips5-wrong-error.s | 47 c.eq.s $fcc1, $f2, $f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
48 c.f.s $fcc4, $f2, $f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
49 c.le.s $fcc6, $f2, $f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
50 c.lt.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
51 c.nge.s $fcc3, $f2, $f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
52 c.ngl.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
53 c.ngle.s $fcc2, $f2, $f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
54 c.ngt.s $fcc5, $f8, $f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
55 c.ole.s $fcc3, $f7, $f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
56 c.olt.s $fcc6, $f2, $f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA leve
[all...] |
| /external/llvm/lib/Target/AMDGPU/Utils/ |
| AMDGPUBaseInfo.cpp | 53 IsaVersion ISA = getIsaVersion(Features);
60 Header.amd_machine_version_major = ISA.Major;
61 Header.amd_machine_version_minor = ISA.Minor;
62 Header.amd_machine_version_stepping = ISA.Stepping;
|
