/external/u-boot/drivers/ddr/marvell/a38x/ |
ddr3_training_hw_algo.c | 50 enum hws_access_type access_type = ACCESS_TYPE_UNICAST; 76 ACCESS_TYPE_UNICAST, pup_index, 125 ACCESS_TYPE_UNICAST, i, 200 ACCESS_TYPE_UNICAST, pup, 203 (dev_num, ACCESS_TYPE_UNICAST, 204 if_id, ACCESS_TYPE_UNICAST, 374 ACCESS_TYPE_UNICAST, pup, 380 ACCESS_TYPE_UNICAST, 382 ACCESS_TYPE_UNICAST, pup, 489 ACCESS_TYPE_UNICAST, pup [all...] |
ddr3_training_pbs.c | 60 (dev_num, ACCESS_TYPE_UNICAST, if_id, 65 (dev_num, ACCESS_TYPE_UNICAST, if_id, 187 (dev_num, ACCESS_TYPE_UNICAST, if_id, 188 ACCESS_TYPE_UNICAST, pup, DDR_PHY_DATA, 194 (dev_num, ACCESS_TYPE_UNICAST, if_id, 195 ACCESS_TYPE_UNICAST, pup, DDR_PHY_DATA, 248 ACCESS_TYPE_UNICAST, 250 ACCESS_TYPE_UNICAST, pup, 258 ACCESS_TYPE_UNICAST, 260 ACCESS_TYPE_UNICAST, pup [all...] |
ddr3_training_leveling.c | 89 (dev_num, ACCESS_TYPE_UNICAST, if_id, 94 (dev_num, ACCESS_TYPE_UNICAST, if_id, 151 (dev_num, ACCESS_TYPE_UNICAST, if_id, 233 (dev_num, ACCESS_TYPE_UNICAST, 245 ACCESS_TYPE_UNICAST, 303 ACCESS_TYPE_UNICAST, 305 ACCESS_TYPE_UNICAST, 319 (dev_num, ACCESS_TYPE_UNICAST, if_id, 366 (dev_num, ACCESS_TYPE_UNICAST, if_id, 0, 407 (dev_num, ACCESS_TYPE_UNICAST, if_id, 0 [all...] |
ddr3_training_bist.c | 85 ret = ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, 91 ret = ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, 98 ret = ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, 104 ret = ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, if_id, 130 ACCESS_TYPE_UNICAST, 141 ACCESS_TYPE_UNICAST, 236 ddr3_tip_if_read(0, ACCESS_TYPE_UNICAST, 0, reg_map[subphy], &read_data, MASK_ALL_BITS); 506 ddr3_tip_if_write(0, ACCESS_TYPE_UNICAST, 0, ODPG_DATA_CTRL_REG, 0, MASK_ALL_BITS); 507 mv_ddr_odpg_bist_prepare(pattern, ACCESS_TYPE_UNICAST, OPER_WRITE, STRESS_NONE, DURATION_SINGLE, 514 ddr3_tip_if_write(0, ACCESS_TYPE_UNICAST, 0, ODPG_DATA_BUFFER_OFFS_REG [all...] |
ddr3_training_centralization.c | 83 (dev_num, ACCESS_TYPE_UNICAST, if_id, 87 (dev_num, ACCESS_TYPE_UNICAST, if_id, 144 ACCESS_TYPE_UNICAST, bus_id, 438 ACCESS_TYPE_UNICAST, bus_id, 451 (dev_num, ACCESS_TYPE_UNICAST, 452 if_id, ACCESS_TYPE_UNICAST, 460 ACCESS_TYPE_UNICAST, 462 ACCESS_TYPE_UNICAST, 481 CHECK_STATUS(ddr3_tip_if_write(dev_num, ACCESS_TYPE_UNICAST, 519 CHECK_STATUS(ddr3_tip_if_read(dev_num, ACCESS_TYPE_UNICAST, [all...] |
ddr3_debug.c | 122 (dev_num, ACCESS_TYPE_UNICAST, 141 ACCESS_TYPE_UNICAST, bus_id, 152 ACCESS_TYPE_UNICAST, bus_id, 563 (dev_num, ACCESS_TYPE_UNICAST, if_id, 0x14c8, 568 (dev_num, ACCESS_TYPE_UNICAST, if_id, 0x17c8, 573 (dev_num, ACCESS_TYPE_UNICAST, if_id, 0x1dc8, 584 ACCESS_TYPE_UNICAST, 592 ACCESS_TYPE_UNICAST, 603 (dev_num, ACCESS_TYPE_UNICAST, 612 ACCESS_TYPE_UNICAST, bus_id [all...] |
ddr3_training.c | 268 (dev_num, ACCESS_TYPE_UNICAST, if_id, 275 (dev_num, ACCESS_TYPE_UNICAST, if_id, 282 (dev_num, ACCESS_TYPE_UNICAST, if_id, 288 (dev_num, ACCESS_TYPE_UNICAST, if_id, 297 (dev_num, ACCESS_TYPE_UNICAST, if_id, 303 (dev_num, ACCESS_TYPE_UNICAST, if_id, 363 enum hws_access_type access_type = ACCESS_TYPE_UNICAST; 743 (dev_num, ACCESS_TYPE_UNICAST, if_id, DDR3_RANK_CTRL_REG, 776 (dev_num, ACCESS_TYPE_UNICAST, if_id, DDR3_RANK_CTRL_REG, 804 ddr3_tip_bus_read_modify_write(dev_num, ACCESS_TYPE_UNICAST, [all...] |
ddr3_training_ip_engine.c | 716 (dev_num, ACCESS_TYPE_UNICAST, if_id, DUAL_DUNIT_CFG_REG, 719 (dev_num, ACCESS_TYPE_UNICAST, if_id, 744 if (pup_access_type == ACCESS_TYPE_UNICAST) { 793 ACCESS_TYPE_UNICAST, [all...] |
ddr3_training_ip.h | 90 ACCESS_TYPE_UNICAST = 0,
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mv_ddr_plat.c | 622 if (prfa_write(ACCESS_TYPE_UNICAST, i, phy_type, addr, 0, OPERATION_READ) != MV_OK) 928 (0, ACCESS_TYPE_UNICAST, PARAM_NOT_CARE, [all...] |