| /external/u-boot/arch/x86/cpu/broadwell/ |
| power_state.c | 35 outl(ps->pm1_cnt & ~(SLP_TYP), ACPI_BASE_ADDRESS + PM1_CNT);
68 ps->pm1_sts = inw(ACPI_BASE_ADDRESS + PM1_STS);
69 ps->pm1_en = inw(ACPI_BASE_ADDRESS + PM1_EN);
70 ps->pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT);
71 ps->tco1_sts = inw(ACPI_BASE_ADDRESS + TCO1_STS);
72 ps->tco2_sts = inw(ACPI_BASE_ADDRESS + TCO2_STS);
73 ps->gpe0_sts[0] = inl(ACPI_BASE_ADDRESS + GPE0_STS(0));
74 ps->gpe0_sts[1] = inl(ACPI_BASE_ADDRESS + GPE0_STS(1));
75 ps->gpe0_sts[2] = inl(ACPI_BASE_ADDRESS + GPE0_STS(2));
76 ps->gpe0_sts[3] = inl(ACPI_BASE_ADDRESS + GPE0_STS(3))
[all...] |
| pch.c | 43 dm_pci_write_config32(dev, PMBASE, ACPI_BASE_ADDRESS | 1);
88 clrsetio_32(ACPI_BASE_ADDRESS + PM1_CNT, SLP_TYP, SCI_EN);
133 outl(set1, ACPI_BASE_ADDRESS + GPE0_EN(GPE_31_0));
134 outl(set2, ACPI_BASE_ADDRESS + GPE0_EN(GPE_63_32));
135 outl(set3, ACPI_BASE_ADDRESS + GPE0_EN(GPE_94_64));
136 outl(set4, ACPI_BASE_ADDRESS + GPE0_EN(GPE_STD));
468 * setio_16(ACPI_BASE_ADDRESS + TCO1_CNT, TCO_TMR_HLT);
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| sdram.c | 46 pei_data->pmbase = ACPI_BASE_ADDRESS;
|
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformInitPei/ |
| Stall.c | 68 OriginalTick = IoRead32 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_TMR);
92 CurrentTick = IoRead32 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_TMR) & B_PCH_ACPI_PM1_TMR_VAL;
101 CurrentTick = IoRead32 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_TMR) & B_PCH_ACPI_PM1_TMR_VAL;
|
| PchInitPeim.c | 117 Pm1Sts = IoRead16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_STS);
119 IoWrite16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_STS, B_PCH_ACPI_PM1_STS_PWRBTN);
120 IoWrite16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_CNT, V_PCH_ACPI_PM1_CNT_S5);
121 IoWrite16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_CNT, V_PCH_ACPI_PM1_CNT_S5 + B_PCH_ACPI_PM1_CNT_SLP_EN);
159 IoWrite16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_EN, (UINT16) 0x00);
160 IoWrite32 (ACPI_BASE_ADDRESS + R_PCH_ACPI_GPE0a_EN, (UINT32) 0x00);
165 Data16 = IoRead16 (ACPI_BASE_ADDRESS + R_PCH_TCO_CNT);
167 IoWrite16 (ACPI_BASE_ADDRESS + R_PCH_TCO_CNT, Data16);
181 Data32 = IoRead32 (ACPI_BASE_ADDRESS + R_PCH_TCO_STS);
210 Pm1Sts = IoRead16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_STS);
[all...] |
| BootMode.c | 179 Data32 = IoRead32 (ACPI_BASE_ADDRESS + R_PCH_TCO_STS);
359 Pm1Sts = IoRead16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_STS);
360 Pm1Cnt = IoRead16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_CNT);
372 IoWrite16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_CNT, Pm1Cnt);
377 IoWrite16 ((ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_STS), B_PCH_ACPI_PM1_STS_WAK);
|
| MemoryCallback.c | 170 Pm1Cnt = IoRead16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_CNT);
172 IoWrite16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_CNT, Pm1Cnt);
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| PlatformEarlyInit.c | 152 Pm1Sts = IoRead16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_STS);
153 Gpe0Sts = IoRead32 (ACPI_BASE_ADDRESS + R_PCH_ACPI_GPE0a_STS);
[all...] |
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformPei/ |
| Stall.c | 67 OriginalTick = IoRead32 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_TMR);
91 CurrentTick = IoRead32 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_TMR) & B_PCH_ACPI_PM1_TMR_VAL;
100 CurrentTick = IoRead32 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_TMR) & B_PCH_ACPI_PM1_TMR_VAL;
|
| BootMode.c | 287 Pm1Sts = IoRead16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_STS);
288 Pm1Cnt = IoRead16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_CNT);
300 IoWrite16 (ACPI_BASE_ADDRESS + R_PCH_ACPI_PM1_CNT, Pm1Cnt);
|
| Platform.c | 558 (UINT16)((ACPI_BASE_ADDRESS & B_PCH_LPC_ACPI_BASE_BAR) | B_PCH_LPC_ACPI_BASE_EN)
[all...] |
| /external/u-boot/arch/x86/include/asm/arch-braswell/ |
| iomap.h | 41 #define ACPI_BASE_ADDRESS 0x400
|
| /external/u-boot/arch/x86/include/asm/arch-broadwell/ |
| iomap.h | 36 #define ACPI_BASE_ADDRESS 0x1000
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| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/ |
| PlatformBaseAddresses.h | 55 #define ACPI_BASE_ADDRESS 0x0400
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| /external/u-boot/arch/x86/cpu/baytrail/ |
| acpi.c | 21 u16 pmbase = ACPI_BASE_ADDRESS;
166 * FSP 2nd phase API fsp_init() is called. Registers off ACPI_BASE_ADDRESS
183 pm1_sts = inw(ACPI_BASE_ADDRESS + PM1_STS);
184 pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT);
203 pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT);
204 outl(pm1_cnt & ~(SLP_TYP), ACPI_BASE_ADDRESS + PM1_CNT);
|
| /external/u-boot/arch/x86/include/asm/arch-baytrail/ |
| iomap.h | 82 #define ACPI_BASE_ADDRESS 0x0400
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformSmm/ |
| Platform.c | 721 RegData32 = IoRead32(ACPI_BASE_ADDRESS + R_PCH_ALT_GP_SMI_EN);
723 IoWrite32((ACPI_BASE_ADDRESS + R_PCH_ALT_GP_SMI_EN), RegData32);
|
