/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
ISDOpcodes.h | 622 ATOMIC_LOAD_SUB, [all...] |
SelectionDAGNodes.h | [all...] |
/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | [all...] |
SelectionDAGNodes.h | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | [all...] |
SelectionDAGNodes.h | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 68 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
|
LegalizeIntegerTypes.cpp | 143 case ISD::ATOMIC_LOAD_SUB: [all...] |
SelectionDAG.cpp | 467 case ISD::ATOMIC_LOAD_SUB: [all...] |
/external/llvm/lib/Target/Mips/ |
Mips16ISelLowering.cpp | 135 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand);
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 88 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; [all...] |
LegalizeIntegerTypes.cpp | 148 case ISD::ATOMIC_LOAD_SUB: [all...] |
SelectionDAG.cpp | 573 case ISD::ATOMIC_LOAD_SUB: [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
Mips16ISelLowering.cpp | 135 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand);
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
LegalizeIntegerTypes.cpp | 125 case ISD::ATOMIC_LOAD_SUB: [all...] |
SelectionDAG.cpp | 427 case ISD::ATOMIC_LOAD_SUB: [all...] |
LegalizeDAG.cpp | [all...] |
DAGCombiner.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | 427 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_SUB, SYNC_FETCH_AND_SUB) [all...] |
/external/llvm/lib/Target/AMDGPU/ |
SIISelLowering.cpp | 245 setTargetDAGCombine(ISD::ATOMIC_LOAD_SUB); [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | 743 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_SUB, SYNC_FETCH_AND_SUB) [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 175 // Lower ATOMIC_LOAD_SUB into ATOMIC_LOAD_ADD if LAA and LAAG are 177 setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Custom); 206 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Custom); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 184 // Lower ATOMIC_LOAD_SUB into ATOMIC_LOAD_ADD if LAA and LAAG are 186 setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Custom); 218 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Custom); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
SIISelLowering.cpp | 653 setTargetDAGCombine(ISD::ATOMIC_LOAD_SUB); [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
ARMISelLowering.cpp | 626 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i64, Custom); 641 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand); [all...] |